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117 Commits

Author SHA1 Message Date
Bill Wendling
627c00b663 Add "mayHaveSideEffects" and "neverHasSideEffects" flags to some instructions. I 
based what flag to set on whether it was already marked as
"isRematerializable". If there was a further check to determine if it's "really"
rematerializable, then I marked it as "mayHaveSideEffects" and created a check
in the X86 back-end similar to the remat one.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45132 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-17 23:07:56 +00:00
Bill Wendling
041b3f8356 Reverting 44702. It wasn't correct to rename them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44727 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-08 23:58:46 +00:00
Bill Wendling
320c630c1b Renaming: 
isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44702 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-08 07:17:56 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be 
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-11 19:40:01 +00:00
Evan Cheng
b76143cf8f Under 64-bit mode use LEA64_32r instead of LEA64r to save a byte. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42783 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-09 07:14:53 +00:00
Evan Cheng
d47c84c1c9 Allow x86 compare to be commutable by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42761 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 18:27:46 +00:00
Evan Cheng
7ad42d9ec0 Commute x86 cmove instructions by swapping the operands and change the condition 
to its inverse.
Testing this as llcbeta


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42661 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 23:13:21 +00:00
Evan Cheng
ecf80ac68a Enable convertToThreeAddress for X86 by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42655 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 22:31:10 +00:00
Evan Cheng
b75ed322c4 INC64_32r -> LEA64_32r is better than INC64_32r -> LEA32r, but it still can 
cause performance degradation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42653 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 21:55:32 +00:00
Evan Cheng
559dc46d46 In 64-bit mode, avoid using leal with 32-bit 32-bit address size, e.g. 
leal 1(%ecx), %edi, which requires 67H prefix.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42647 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:34:26 +00:00
Evan Cheng
b952d1f5be Add support to convert more 64-bit instructions to 3-address instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42642 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 18:20:36 +00:00
Evan Cheng
3f411c7627 Testing convertToThreeeAddress as X86 llcbeta. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42630 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 08:04:01 +00:00
Evan Cheng
e5f6204cd5 Enabling new condition code modeling scheme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-29 00:00:36 +00:00
Evan Cheng
0488db9b99 Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after 
all the kinks are worked out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 01:57:46 +00:00
Dan Gohman
a0a7c1de9c Add 64-bit jmp instructions to the list of instructions that 
can terminate a block with no fall-through.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42029 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-17 15:19:08 +00:00
Dan Gohman
e47f1f9633 Add patterns for SHLD64* and SHRD64*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41975 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 23:17:45 +00:00
Evan Cheng
24f2ea3971 Add implicit def of EFLAGS on those instructions that may modify flags. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41962 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-14 21:48:26 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 04:06:50 +00:00
Evan Cheng
61d9c861fd Fix a bug in X86InstrInfo::convertToThreeAddress that caused it to codegen: 
leal    (,%rcx,8), %rcx
It should be
leal    (,%rcx,8), %ecx


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41735 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-06 00:14:41 +00:00
Christopher Lamb
b81337117c Add 2-addr to 3-addr promotion code that allows 32-bit LEA to be used via subregisters when 16-bit LEA is disabled. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41007 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-10 21:18:25 +00:00
Evan Cheng
85dce6cf78 Don't pollute the meaning of isUnpredicatedTerminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-26 17:32:14 +00:00
Evan Cheng
14c4655403 isUnpredicatedTerminator should treat conditional branches as unpredicated terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37960 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-06 23:22:03 +00:00
Dale Johannesen
e377d4d142 Refactor X87 instructions. As a side effect, all 
their names are changed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37876 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-04 21:07:47 +00:00
Dale Johannesen
849f214a4e Fix for PR 1505 (and 1489). Rewrite X87 register 
model to include f32 variants.  Some factoring
improvments forthcoming.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37847 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-03 00:53:03 +00:00
Dan Gohman
d45eddd214 Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-26 00:48:07 +00:00
Dan Gohman
82a87a0172 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-19 01:48:05 +00:00
Dale Johannesen
318093b6f8 Do not treat FP_REG_KILL as terminator in branch analysis (X86). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37578 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-14 22:03:45 +00:00
Dan Gohman
c101e95cb6 Add a target hook to allow loads from constant pools to be rematerialized, and an 
implementation for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37576 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-14 20:50:44 +00:00
Dale Johannesen
13e8b51e3e Handle blocks with 2 unconditional branches in AnalyzeBranch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37571 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-13 17:59:52 +00:00
Evan Cheng
bfd2ec4a8e Add a utility routine to check for unpredicated terminator instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37528 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-08 21:59:56 +00:00
Evan Cheng
126f17a176 BlockHasNoFallThrough() now returns true if block ends with a return instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37266 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-21 18:44:17 +00:00
Evan Cheng
6ae3626a4f RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37193 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 00:18:17 +00:00
Evan Cheng
1e341729dd Relex assertions to account for additional implicit def / use operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36430 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-25 07:12:14 +00:00
Bill Wendling
6dd29e08f7 Remove some invalid instructions from this check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36404 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-24 21:17:46 +00:00
Bill Wendling
71bfd11c67 Adding more MMX instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35638 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 23:48:32 +00:00
Bill Wendling
823efee633 Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35616 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-03 06:00:37 +00:00
Chris Lattner
995f55036f Compile CodeGen/X86/lea-3.ll:test2 to: 
_test3:
        leaq (,%rdi,4), %rax
        orq %rdi, %rax
        ret

instead of:
_test2:
        movq %rdi, %rax
        shlq $2, %rax
        orq %rdi, %rax
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35434 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 18:12:31 +00:00
Chris Lattner
f2177b89a1 Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the 
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 00:58:40 +00:00
Chris Lattner
a16b7cb1d3 Two changes: 
1) codegen a shift of a register as a shift, not an LEA.
2) teach the RA to convert a shift to an LEA instruction if it wants something
   in three-address form.

This gives us asm diffs like:

-       leal (,%eax,4), %eax
+       shll $2, %eax

which is faster on some processors and smaller on all of them.

and, more interestingly:

-       movl 24(%esi), %eax
-       leal (,%eax,4), %edi
+       movl 24(%esi), %edi
+       shll $2, %edi

Without #2, #1 was a significant pessimization in some cases.

This implements CodeGen/X86/shift-codegen.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35204 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 06:08:29 +00:00
Bill Wendling
2f88dcdfb3 Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that 
moves, loads, etc. are recognized.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35031 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-08 22:09:11 +00:00
Jim Laskey
1ee2925742 Make LABEL a builtin opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-01-26 14:34:52 +00:00
Evan Cheng
258ff6726d convertToThreeAddress() is now responsible for updating live info as well as inserting the new MI's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-12-01 21:52:41 +00:00
Evan Cheng
c0f64ffab9 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead 
of opcode and number of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-27 23:37:22 +00:00
Evan Cheng
e23fc60854 Fix a potential bug: MOVPDI2DI, etc. are not copy instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31794 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-16 23:22:26 +00:00
Evan Cheng
6ce7dc2a97 Properly transfer kill / dead info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31765 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-15 20:58:11 +00:00
Evan Cheng
7ce4578353 Matches MachineInstr changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31712 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-11-13 23:36:35 +00:00
Chris Lattner
6ce644392e fix wonky indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-30 22:27:23 +00:00
Chris Lattner
c24ff8ed12 add another target hook for branch folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31262 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-28 17:29:57 +00:00
Chris Lattner
9cd6875917 Implement support for branch condition reversal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31099 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-21 05:52:40 +00:00
Chris Lattner
879d09cf13 Simplify code, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31097 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-10-21 05:42:09 +00:00