Evan Cheng
66f7163545
Local spiller optimization:
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Turn a store folding instruction into a load folding instruction. e.g.
xorl %edi, %eax
movl %eax, -32(%ebp)
movl -36(%ebp), %eax
orl %eax, -32(%ebp)
=>
xorl %edi, %eax
orl -36(%ebp), %eax
mov %eax, -32(%ebp)
This enables the unfolding optimization for a subsequent instruction which will
also eliminate the newly introduced store instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43192 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-19 21:23:22 +00:00
Arnold Schwaighofer
48abc5cf6b
Corrected many typing errors. And removed 'nest' parameter handling
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for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Arnold Schwaighofer
c85e1716f0
Added tail call optimization to the x86 back end. It can be
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enabled by passing -tailcallopt to llc. The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
elf/pic enabled + callee is in module + callee has
visibility protected or hidden
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Evan Cheng
7ad42d9ec0
Commute x86 cmove instructions by swapping the operands and change the condition
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to its inverse.
Testing this as llcbeta
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42661 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 23:13:21 +00:00
Evan Cheng
3154cb67d1
ADC and SBB uses EFLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42640 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 17:59:57 +00:00
Evan Cheng
e5f6204cd5
Enabling new condition code modeling scheme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42459 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-29 00:00:36 +00:00
Evan Cheng
fa00feb7f8
Stop inventing new words. :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42429 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 01:35:02 +00:00
Evan Cheng
8decf6bc18
Pessimisively assume ADJCALLSTACKDOWN / ADJCALLSTACKUP (which becomes sub / add) clobbers EFLAGS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42426 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 01:19:48 +00:00
Evan Cheng
bf4f89dc00
Some assemblers do not recognize aliases pushfd, pushfq, popfd, and popfq. Just emit them as pushf and popf.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42371 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 21:28:00 +00:00
Evan Cheng
8d5562be30
Typos: POPQ -> POPFQ, POPD -> POPFD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42348 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 06:38:29 +00:00
Evan Cheng
2f245ba572
Add pushf{d|q}, popf{d|q} to push and pop EFLAGS register.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42335 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-26 01:29:06 +00:00
Evan Cheng
0488db9b99
Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
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all the kinks are worked out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-25 01:57:46 +00:00
Dan Gohman
6b5766e27c
Fix the syntax for the .loc directive in preparation for using it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42268 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-24 19:25:06 +00:00
Dale Johannesen
f1fc3a8fa6
Fix PR 1681. When X86 target uses +sse -sse2,
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keep f32 in SSE registers and f64 in x87. This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42246 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-23 14:52:20 +00:00
Evan Cheng
24f2ea3971
Add implicit def of EFLAGS on those instructions that may modify flags.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-14 21:48:26 +00:00
Evan Cheng
071a279e94
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41863 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-11 19:55:27 +00:00
Evan Cheng
ef61ed3507
TableGen no longer emit CopyFromReg nodes for implicit results in physical
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registers. The scheduler is now responsible for emitting them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41781 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 23:59:02 +00:00
Dan Gohman
1ab79897e2
Avoid storing and reloading zeros and other constants from stack slots
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by flagging the associated instructions as being trivially rematerializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41775 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-07 21:32:51 +00:00
Evan Cheng
2f39426ec9
Mark load instructions with isLoad = 1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41595 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-30 05:49:43 +00:00
Dale Johannesen
59a587337e
Long double patch 4 of N: initial x87 implementation.
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Lots of problems yet but some simple things work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40847 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-05 18:49:15 +00:00
Evan Cheng
7afa166c76
Switch some multiplication instructions over to the new scheme for testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40723 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-02 05:48:35 +00:00
Evan Cheng
f6844ca0e4
Mac OS X X86-64 low 4G address not available.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40701 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 23:45:51 +00:00
Evan Cheng
1c3017c51e
Be more precise.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40689 91177308-0d34-0410-b5e6-96231b3b80d8
2007-08-01 20:22:37 +00:00
Dan Gohman
b1576f56c8
Change the x86 assembly output to use tab characters to separate the
...
mnemonics from their operands instead of single spaces. This makes the
assembly output a little more consistent with various other compilers
(f.e. GCC), and slightly easier to read. Also, update the regression
tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40648 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-31 20:11:57 +00:00
Evan Cheng
c64a1a921c
Redo and generalize previously removed opt for pinsrw: (vextract (v4i32 bc (v4f32 s2v (f32 load ))), 0) -> (i32 load )
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40628 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-31 08:04:03 +00:00
Christopher Lamb
2dc6dc619c
Change the x86 backend to use extract_subreg for truncation operations. Passes DejaGnu, SingleSource and MultiSource.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40578 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-29 01:24:57 +00:00
Dan Gohman
b6bbe39ff9
In the .loc directive, print the fields as "debug" fields, so they
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don't get decorated as if for immediate fields for instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40529 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-26 15:24:15 +00:00
Evan Cheng
ffbaccae02
No more noResults.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40132 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-21 00:34:19 +00:00
Evan Cheng
64d80e3387
Change instruction description to split OperandList into OutOperandList and
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InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-19 01:14:50 +00:00
Anton Korobeynikov
2365f51ed0
Long live the exception handling!
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This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@39855 91177308-0d34-0410-b5e6-96231b3b80d8
2007-07-14 14:06:15 +00:00
Dan Gohman
d45eddd214
Revert the earlier change that removed the M_REMATERIALIZABLE machine
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instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37728 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-26 00:48:07 +00:00
Dan Gohman
82a87a0172
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
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with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-19 01:48:05 +00:00
Nate Begeman
9a22530696
Reference correct header
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36834 91177308-0d34-0410-b5e6-96231b3b80d8
2007-05-06 04:00:55 +00:00
Bill Wendling
3f3a17dd62
Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers
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clobbered by a call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36448 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-25 21:31:48 +00:00
Lauro Ramos Venancio
ede1d78969
X86 TLS: optimize the implementation of "local exec" model.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36359 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-23 01:28:10 +00:00
Lauro Ramos Venancio
7d2cc2b983
X86 TLS: fix and optimize the implementation of "initial exec" model.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36355 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-22 22:50:52 +00:00
Lauro Ramos Venancio
b3a0417cad
Implement "general dynamic", "initial exec" and "local exec" TLS models for
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X86 32 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36283 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-20 21:38:10 +00:00
Anton Korobeynikov
57fc00d5cf
Implemented correct stack probing on mingw/cygwin for dynamic alloca's.
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Also, fixed static case in presence of eax livin. This fixes PR331
PS: Why don't we still have push/pop instructions? :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36195 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-17 09:20:00 +00:00
Bill Wendling
bb1ee05253
Add support for our first SSSE3 instruction "pmulhrsw".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8
2007-04-10 22:10:25 +00:00
Evan Cheng
768143547b
Mark re-materializable instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35230 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-21 00:16:56 +00:00
Jim Laskey
1ee2925742
Make LABEL a builtin opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 14:34:52 +00:00
Chris Lattner
d06b2ab701
Fix a misencoding of CBW and CWD. This fixes PR1030.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33486 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 18:31:00 +00:00
Evan Cheng
28b51439f3
- Switch X86-64 JIT to large code size model.
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- Re-enable some codegen niceties for X86-64 static relocation model codegen.
- Clean ups, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-05 19:50:18 +00:00
Evan Cheng
0085a28d13
- Use a different wrapper node for RIP-relative GV, etc.
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- Proper support for both small static and PIC modes under X86-64
- Some (non-optimal) support for medium modes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32046 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-30 21:55:46 +00:00
Evan Cheng
3fa9dff2c9
Custom lower READCYCLECOUNTER for x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32017 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-29 08:28:13 +00:00
Chris Lattner
3751844b39
remove dead/redundant vars
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31435 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-03 23:48:56 +00:00
Reid Spencer
02b8511364
Add debug support for X86/ELF targets (Linux). This allows llvm-gcc4
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generated object modules to be debugged with gdb. Hopefully this helps
pre-release debugging.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31299 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-30 22:32:30 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Chris Lattner
33e4869ba0
Move the Imp tblgen class from the X86 backend to common code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 17:49:27 +00:00
Chris Lattner
f18c074e1b
Mark ADJCALLSTACKUP/DOWN as clobbering ESP so that virtregmap will notice
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that it can't assume ESP is unmodified across the instrs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30905 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-12 17:42:56 +00:00