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200a435966
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194 Commits

Author SHA1 Message Date
Vikram S. Adve
200a435966 Eliminate most uses of the machine instruction vector for each LLVM instr, 
since some m. instr. may be generated by LLVM instrs. in other blocks.
Handle non-SSA (anti and output) edges and true edges uniformly by
working with machine instructions alone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1269 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-12 18:53:43 +00:00
Ruchira Sasanka
b2490fc4fb Added phi elimination code - not final 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1264 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-12 14:44:50 +00:00
Vikram S. Adve
d9beb975f2 Improved printing routines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1263 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-12 14:19:47 +00:00
Vikram S. Adve
af00d485a4 Major improvement to how nodes are built for a BB. 
LLVM instruction is no longer recorded in each node, but BB is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1262 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-12 14:18:01 +00:00
Vikram S. Adve
5567e942c0 Adjust all stack variable offsets to be aligned by size. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1261 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-12 05:17:23 +00:00
Vikram S. Adve
f1a0a10813 Fix errors in computing downgrowing offsets, and in 
computing size of extra outgoing args.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1256 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-11 21:23:33 +00:00
Vikram S. Adve
5b43af962b Only add true dep. edges from an earlier to a later instruction. 
This wasn't a problem until we started putting copies for Phi values
that produced cycles in the SchedGraph!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1254 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-11 01:23:27 +00:00
Ruchira Sasanka
65480b75af Changed code to ignore Phi Nodes in PhyRegAlloc 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1253 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-10 21:21:36 +00:00
Ruchira Sasanka
efaf9be8a4 Coalesing bug fix - now checks for the same regType instead of the same 
regClass since FP class has two reg Types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1236 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-10 00:20:24 +00:00
Ruchira Sasanka
ad1400924d No major change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1235 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-09 23:49:42 +00:00
Vikram S. Adve
fb1a6c87d6 Use node->getOpCode() instead of node->getMachineInstr()->getOpCode(). 
Much nicer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1223 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-09 02:14:20 +00:00
Chris Lattner
00d91c6cd8 Add method decl 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1217 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 20:55:05 +00:00
Ruchira Sasanka
226f1f0b22 corrected insertCode4Spilled ... bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1212 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 19:11:30 +00:00
Ruchira Sasanka
5a61d85f97 Uncommented LR spill code insertion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1207 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 16:43:25 +00:00
Vikram S. Adve
e64574ce71 Major change to how defs are found when adding dependences (they 
are now found as part of the initial walk of the machine code).
Also memory load/store instructions can be generated for non-memory
LLVM instructions, which wasn't handled before.  It is now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1199 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 05:20:23 +00:00
Vikram S. Adve
af1d2c80e0 MachineCodeForMethod is now an annotation on class Method. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1198 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 05:18:18 +00:00
Vikram S. Adve
38f5d46aff Added two minor methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1187 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 04:49:52 +00:00
Vikram S. Adve
12af164c87 Removed class RegStackOffsets and used class MachineCodeForMethod 
directly to manage stack frame.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1186 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 04:48:50 +00:00
Vikram S. Adve
be49526193 Major overhaul of stack frame management. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1185 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-08 04:47:06 +00:00
Ruchira Sasanka
d1565abd68 Fixed bug - added code in pushUnconstrainedIGNodes() to check whether a node 
is already pushed to stack by a previous call to the same method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1154 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-06 15:25:38 +00:00
Vikram S. Adve
04cc49be65 Bug fix: uninitialized variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1147 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-06 05:11:05 +00:00
Vikram S. Adve
c352d2c530 Modified graph construction to use one pass to find all defs. 
Avoids having to handle some special cases that cause complex interactions
with instr. selection.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1138 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-05 04:04:23 +00:00
Vikram S. Adve
df1c3b8398 Make reg. numbers signed ints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1137 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-05 03:56:02 +00:00
Chris Lattner
8e7f409169 Minor method rename 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1119 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-04 08:08:34 +00:00
Ruchira Sasanka
a9e45c8d66 Added an assertion since it seems like AdjList returns an errornous size in method 
IGNode::pushOnStack().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1116 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-03 22:01:09 +00:00
Ruchira Sasanka
80b1a1a26a Added support for correct spilling of %ccr 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1112 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-03 20:41:22 +00:00
Ruchira Sasanka
51bc0e7994 Arranged stack frame - needs furhter organization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1108 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-03 17:14:44 +00:00
Ruchira Sasanka
ef1b0cb9a5 Arranged stack frame - needs furhter organization 
Moved InsertCallerSaveInstr to the SparcRegInfo.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1106 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-11-03 17:13:27 +00:00
Vikram S. Adve
94e40ef064 Record constants that need to be emitted in the assembly code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1010 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-28 21:46:23 +00:00
Vikram S. Adve
d0d79c01b4 Allow combinations of True/Anti/Output flags for each edge to 
support, e.g., dependences on Call instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1009 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-28 21:45:02 +00:00
Vikram S. Adve
a93bbac606 Add edges between call instructions and (a) load/store instructions, and 
(b) any instructions that use or set CC registers.  Whether or not the
latter are needed really should be machine-dependent.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1008 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-28 21:43:33 +00:00
Ruchira Sasanka
20c82b12c9 Added support for spilling 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@992 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-28 18:15:12 +00:00
Ruchira Sasanka
174bded6ce Added spill code support; moved insertCallerSaving to SparRegInfo since 
we need to handle %ccr reg in a special way.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@990 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-28 18:12:02 +00:00
Ruchira Sasanka
f7434f0e1d added support to move "added instructions" after the delay slot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@968 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-23 21:38:42 +00:00
Ruchira Sasanka
251d8db133 Added support to move "added instructions" after the delay slot 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@967 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-23 21:38:00 +00:00
Vikram S. Adve
c023be29a4 Use class MachineCodeForMethod to print machine code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@948 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-22 13:52:03 +00:00
Vikram S. Adve
1d6158f98f Added class MachineCodeForMethod. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@947 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-22 13:51:33 +00:00
Vikram S. Adve
7ad1046065 Cosmetic changes only. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@946 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-22 13:51:09 +00:00
Vikram S. Adve
fb8c0533b4 Modify code that processes delay slots so that it preserves any 
useful instructions already inserted into delay slots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@945 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-22 13:49:27 +00:00
Ruchira Sasanka
b3b6f5338c Added support for both call/jmpl instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@930 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-21 16:43:41 +00:00
Ruchira Sasanka
44d2b947cb Added code to support unusable Suggested Colors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@922 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-19 21:42:06 +00:00
Ruchira Sasanka
0e62aa6d14 Added code to PhyRegAlloc to mark unusable suggested regs 
Added initialization to AdjList to IGNode constructor - major bug fix


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@920 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-19 21:39:31 +00:00
Ruchira Sasanka
36f7707d2a Changed Call interference info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@917 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-19 17:21:59 +00:00
Ruchira Sasanka
958faf3f5a Corrected call interference bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@916 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-19 17:21:03 +00:00
Ruchira Sasanka
0fd8dc8099 no major change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@914 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-18 23:58:08 +00:00
Ruchira Sasanka
69917e27af Added implict operand printing for operator( ostream, MachineInstr&) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@912 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-18 22:40:02 +00:00
Ruchira Sasanka
97b8b4410a removed some debug messages 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@910 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-18 22:36:26 +00:00
Vikram S. Adve
6d35326cd5 1. Add a bottom-up pass on BURG trees that is used to fix constant operands. 
Needs to be bottom up because constant values may be forward-substituted
   to their uses (i.e., into the parent in the BURG tree).
2. Move most of the constant-fixup code into machine-indepedent file
   InstrSelectionSupport.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@859 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-17 23:57:50 +00:00
Vikram S. Adve
f43e3366ef Separate VM instruction that generates the instructions that compute a value 
from the value itself (the one causing an edge) because the latter may be
a temporary used within the instruction sequence for the VM instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@858 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-17 23:55:16 +00:00
Vikram S. Adve
85b46d6c6d *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@857 91177308-0d34-0410-b5e6-96231b3b80d8
 2001-10-17 23:53:16 +00:00