Commit Graph

5199 Commits

Author SHA1 Message Date
Rafael Espindola
2b3e12d0cb Revert the previous patch while I figure out how to make llvm-gcc
less agressive about disabling cfi on linux :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 23:03:44 +00:00
Rafael Espindola
89fc9e8f5e Enable CFI on OS X.
Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.

The only two differences I know of are:

* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 22:29:54 +00:00
Jakob Stoklund Olesen
8e1e4cf226 Allow folded spills in test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130599 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 08:00:50 +00:00
Jakob Stoklund Olesen
d5b679c8ce Weekly fix of register allocation dependent unit tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-30 01:37:52 +00:00
Eli Friedman
b2b03fc2fa Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 23:34:52 +00:00
Eli Friedman
c573e2c7ea Switch to ImmLeaf (which can be used by FastISel) for a few more common ARM/Thumb2 patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 22:48:03 +00:00
Eli Friedman
51864a1d2b Fix run-line, again. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 21:33:03 +00:00
Eli Friedman
9ebf57ae13 Re-committing r130454, which does not in fact break anything.
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 21:22:56 +00:00
Eric Christopher
bcf26aee86 Add trunc->branch support, this won't help with clang's i8->i1 truncations
for bools, but is a start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 20:02:39 +00:00
Rafael Espindola
7b11a4cbdc Change DwarfCFIException's member variables to track what it actually
emmits: .cfi_personality, .cfi_lsda and the moves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130503 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 14:48:51 +00:00
Andrew Trick
d49ffe8284 Teach Thumb2 isel to fold and->rotr ==> ROR.
Generalization of Nate Begeman's patch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 14:18:15 +00:00
Andrew Trick
e02a1501e7 Combine thumb2-ror tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130498 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-29 14:02:41 +00:00
Eli Friedman
6e6014cfb3 Revert r130454; apparently this doesn't actually work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:55:14 +00:00
Eli Friedman
73359c1327 Fix runline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130455 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:12:24 +00:00
Eli Friedman
2f7fcd7198 Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 23:03:25 +00:00
Eli Friedman
d227eedf82 fast-isel sret calls, try 2. We actually do need to do something on x86-32. rdar://problem/9303592 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130429 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 20:19:12 +00:00
Eli Friedman
3fb6e00238 Actually revert r130348 correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130418 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 18:20:24 +00:00
Eli Friedman
6cf31b0a1a Revert r130348; causing buildbot issues on x86-32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 18:06:10 +00:00
Devang Patel
c26f5447e3 Teach dwarf writer to handle complex address expression for .debug_loc entries.
This fixes clang generated blocks' variables' debug info.
Radar 9279956.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 02:22:40 +00:00
Eli Friedman
bd1253809b Fix a silly mistake in r130338.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:42:03 +00:00
Justin Holewinski
5a3cb924c6 PTX: support for bitwise operations on predicates
- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test

Patch by Dan Bailey

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-28 00:19:51 +00:00
Eli Friedman
8211a6a61d fast-isel sret. We actually don't need to do anything special on x86. :) rdar://problem/9303592 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 23:58:52 +00:00
Eli Friedman
2790ba8e5a Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 22:41:55 +00:00
Evan Cheng
309db7c947 If converter was being too cute. It look for root BBs (which don't have
successors) and use inverse depth first search to traverse the BBs. However
that doesn't work when the CFG has infinite loops. Simply do a linear
traversal of all BBs work just fine.

rdar://9344645


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 19:32:43 +00:00
Jakob Stoklund Olesen
93e110ba34 Also add <imp-def> operands for defined and dead super-registers when rewriting.
We cannot rely on the <imp-def> operands added by LiveIntervals in all cases as
demonstrated by the test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 17:42:31 +00:00
Eli Friedman
547eb4fd56 Fix an edge case involving branches in fast-isel on x86.
rdar://problem/9303306 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130272 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-27 01:34:27 +00:00
Evan Cheng
554daa67bd Be careful about scheduling nodes above previous calls. It increase usages of
more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.

Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.

rdar://9329627


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 21:31:35 +00:00
Evan Cheng
90fab0f9d8 This test should be in MC. It breaks with changes to scheduling / register allocation so it's being removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130243 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 21:09:04 +00:00
Benjamin Kramer
efa81404a5 Force a triple on this test to unbreak windows buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 18:47:43 +00:00
Dan Gohman
a61e73bda5 Fast-isel support for simple inline asms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 17:18:34 +00:00
Rafael Espindola
cace5b8caf Add test for PR9743.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 14:17:42 +00:00
Chris Lattner
bffc2b4af1 don't emit the symbol name twice for local bss and common
symbols.  For example, don't emit:
        .comm   _i,4,2                  ## @i
                                        ## @i

instead emit:
        .comm   _i,4,2                  ## @i



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130192 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-26 06:14:13 +00:00
Eric Christopher
546c1ffe5f Make this test disable fast isel as it's not needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130165 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 22:39:46 +00:00
Akira Hatanaka
f48eb533d5 Lower BlockAddress node when relocation-model is static.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 17:10:45 +00:00
Devang Patel
06104e3743 A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130129 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 16:33:52 +00:00
Benjamin Kramer
a42a757176 Make tests more useful.
lit needs a linter ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-25 10:12:01 +00:00
Andrew Trick
83eb906906 Accidental function name mangling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 04:08:15 +00:00
Andrew Trick
1c3af779fc Thumb2 and ARM add/subtract with carry fixes.
Fixes Thumb2 ADCS and SBCS lowering: <rdar://problem/9275821>.
t2ADCS/t2SBCS are now pseudo instructions, consistent with ARM, so the
assembly printer correctly prints the 's' suffix.

Fixes Thumb2 adde -> SBC matching to check for live/dead carry flags.

Fixes the internal ARM machine opcode mnemonic for ADCS/SBCS.
Fixes ARM SBC lowering to check for live carry (potential bug).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 03:55:32 +00:00
Andrew Trick
5adfba283d whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 03:24:11 +00:00
NAKAMURA Takumi
624dc1d4ab test/CodeGen/X86/shrink-compare.ll: Relax expressions for Win64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 00:15:45 +00:00
Chris Lattner
b686af053e Recommit the fix for rdar://9289512 with a couple tweaks to
fix bugs exposed by the gcc dejagnu testsuite:
1. The load may actually be used by a dead instruction, which
   would cause an assert.
2. The load may not be used by the current chain of instructions,
   and we could move it past a side-effecting instruction. Change
   how we process uses to define the problem away.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 21:59:37 +00:00
Benjamin Kramer
e7cf062537 DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.
On x86 this allows to fold a load into the cmp, greatly reducing register pressure.
  movzbl	(%rdi), %eax
  cmpl	$47, %eax
->
  cmpb	$47, (%rdi)

This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 18:47:44 +00:00
Benjamin Kramer
b20a8fc8a6 X86: Try to use a smaller encoding by transforming (X << C1) & C2 into (X & (C2 >> C1)) & C1. (Part of PR5039)
This tends to happen a lot with bitfield code generated by clang. A simple example for x86_64 is
uint64_t foo(uint64_t x) { return (x&1) << 42; }
which used to compile into bloated code:
	shlq	$42, %rdi               ## encoding: [0x48,0xc1,0xe7,0x2a]
	movabsq	$4398046511104, %rax    ## encoding: [0x48,0xb8,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00]
	andq	%rdi, %rax              ## encoding: [0x48,0x21,0xf8]
	ret                             ## encoding: [0xc3]

with this patch we can fold the immediate into the and:
	andq	$1, %rdi                ## encoding: [0x48,0x83,0xe7,0x01]
	movq	%rdi, %rax              ## encoding: [0x48,0x89,0xf8]
	shlq	$42, %rax               ## encoding: [0x48,0xc1,0xe0,0x2a]
	ret                             ## encoding: [0xc3]

It's possible to save another byte by using 'andl' instead of 'andq' but I currently see no way of doing
that without making this code even more complicated. See the TODOs in the code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 15:30:40 +00:00
Evan Cheng
db6cbe1ff1 In Thumb2 mode, lower frame indix references to:
add <rd>, sp, #<imm8>
ldr <rd>, [sp, #<imm8>]
When the offset from sp is multiple of 4 and in range of 0-1020.
This saves code size by utilizing 16-bit instructions.

rdar://9321541


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129971 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-22 01:42:52 +00:00
Devang Patel
71f3f1146f Fix DWARF description of Q registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 23:22:35 +00:00
Devang Patel
27f5acb7d4 Fix DWARF description of S registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 22:48:26 +00:00
Devang Patel
8859df5911 Test case for r129922
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 20:16:43 +00:00
Daniel Dunbar
63c21deee1 Revert r1296656, "Fix rdar://9289512 - not folding load into compare at -O0...",
which broke a couple GCC test suite tests at -O0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129914 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 16:14:46 +00:00
Che-Liang Chiou
5efde18dd2 ptx: fix parameter ordering
This patch depends on the prior fix r129908 that changes to use std::find,
rather than std::binary_search, on unordered array.

Patch by Dan Bailey


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-21 10:56:58 +00:00
Evan Cheng
c8578948c9 Remove -use-divmod-libcall. Let targets opt in when they are available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-20 22:20:12 +00:00