Reid Spencer
3ed469ccd7
For PR786:
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Turn on -Wunused and -Wno-unused-parameter. Clean up most of the resulting
fall out by removing unused variables. Remaining warnings have to do with
unused functions (I didn't want to delete code without review) and unused
variables in generated code. Maintainers should clean up the remaining
issues when they see them. All changes pass DejaGnu tests and Olden.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31380 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-02 20:25:50 +00:00
Chris Lattner
dba1aeedd8
Change the prototype for TargetLowering::isOperandValidForConstraint
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-31 19:40:43 +00:00
Evan Cheng
8b2794aeff
Merge ISD::TRUNCSTORE to ISD::STORE. Switch to using StoreSDNode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-13 21:14:26 +00:00
Evan Cheng
2e49f090f9
Naming consistency.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30878 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-11 07:10:22 +00:00
Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Chris Lattner
cf9668f23d
initialize ivar
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30780 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-06 22:52:08 +00:00
Evan Cheng
c548428c5d
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
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extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
Chris Lattner
7acf5f39fe
Change the default to 0, which means 'default'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30114 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 17:39:15 +00:00
Duraid Madina
0c9e0ff249
forgot this
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30097 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 07:44:11 +00:00
Evan Cheng
42f75a926a
Fix a typo that causes 2006-07-07-ComputeMaskedBits.ll to fail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29072 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 21:37:21 +00:00
Chris Lattner
c4fa603347
Port some bugfixes in shift handling from SimplifyDemandedBits over to
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ComputeMaskedBits. DemandedMasks and KnownZero/One masks should never have
bits set out of the range of the base datatype.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28768 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 16:52:37 +00:00
Jim Laskey
9bfa2dcff6
TargetLowering::ComputeMaskedBits was not clearing reciprocal bits on shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28765 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-13 13:08:58 +00:00
Andrew Lenharth
232c910b8a
Start on my todo list
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-12 16:07:18 +00:00
Evan Cheng
7e399c14ab
Another typo. Pointed out by Nate Begeman.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28353 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 18:22:14 +00:00
Evan Cheng
e9b3da17cd
Fix an obvious bug in getPackedTypeBreakdown. Return 1 if type is legal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 18:10:06 +00:00
Andrew Lenharth
3e348494bb
this should be 128 I think
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28330 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:45:23 +00:00
Andrew Lenharth
dae9cbe8d4
Move this code to a common place
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28329 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:42:15 +00:00
Owen Anderson
07000c6f01
Refactor a bunch of includes so that TargetMachine.h doesn't have to include
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TargetData.h. This should make recompiles a bit faster with my current
TargetData tinkering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 06:33:49 +00:00
Chris Lattner
1b7371331f
When tracking demanded bits, if any bits from the sext of an SRA are demanded,
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then so is the input sign bit. This fixes mediabench/g721 on X86.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28166 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-08 17:22:53 +00:00
Chris Lattner
822db93e57
Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us
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to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.
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2006-05-06 23:48:13 +00:00
Chris Lattner
e60351bb72
Add some more sign propagation cases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28154 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 23:40:29 +00:00
Chris Lattner
d6f7fe76a6
Add some more simple sign bit propagation cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28149 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 22:39:59 +00:00
Chris Lattner
5c3e21d687
Add some really really simple code for computing sign-bit propagation.
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This will certainly be enhanced in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28145 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 09:27:13 +00:00
Chris Lattner
c93dfda905
Fold (trunc (srl x, c)) -> (srl (trunc x), c)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28138 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:11:52 +00:00
Chris Lattner
fe8babf689
Implement ComputeMaskedBits/SimplifyDemandedBits for ISD::TRUNCATE
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28135 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 22:32:12 +00:00
Owen Anderson
a69571c799
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 01:29:57 +00:00
Chris Lattner
1b5232a937
relax assertion
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27358 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:19:46 +00:00
Chris Lattner
1482b5fc7a
Allow targets to compute masked bits for intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27357 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-02 06:15:09 +00:00
Chris Lattner
a6c9de4293
Was returning the wrong type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27277 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 01:50:09 +00:00
Chris Lattner
79227e2906
Modify the TargetLowering::getPackedTypeBreakdown method to also return the
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unpromoted element type.
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2006-03-31 00:46:36 +00:00
Chris Lattner
dc87929609
Implement TargetLowering::getPackedTypeBreakdown
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27270 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-31 00:28:56 +00:00
Evan Cheng
677274b1cb
Typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27008 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-23 23:24:51 +00:00
Chris Lattner
3a59358499
set TransformToType correctly for vector types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26797 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-16 19:50:01 +00:00
Evan Cheng
30b37b5f29
Add LSR hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26740 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 23:18:16 +00:00
Chris Lattner
b6b17ffbc6
I can't convince myself that this is safe, remove the recursive call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26725 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 06:42:16 +00:00
Chris Lattner
c1d9f1de41
Do not fold (add (shl x, c1), (shl c2, c1)) -> (shl (add x, c2), c1),
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we want to canonicalize the other way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26547 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-05 19:52:57 +00:00
Evan Cheng
33143dce15
Number of NodeTypes now exceeds 128.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26503 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-03 06:58:59 +00:00
Chris Lattner
00ffed0468
Add interfaces for targets to provide target-specific dag combiner optimizations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-01 04:52:55 +00:00
Chris Lattner
a6bc5a4d21
Implement bit propagation through sub nodes, this (re)implements
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PowerPC/div-2.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 01:00:42 +00:00
Chris Lattner
81cd35586f
Check RHS simplification before LHS simplification to avoid infinitely looping
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on PowerPC/small-arguments.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:36:27 +00:00
Chris Lattner
5f0c658aa4
Just like we use the RHS of an AND to simplify the LHS, use the LHS to
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simplify the RHS. This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:
_test2:
srwi r2, r3, 1
xori r3, r2, 40961
blr
instead of this:
_test2:
rlwinm r2, r3, 31, 17, 31
xori r2, r2, 40961
rlwinm r3, r2, 0, 16, 31
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-27 00:22:28 +00:00
Chris Lattner
ec665151b8
Add a bunch of missed cases. Perhaps the most significant of which is that
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assertzext produces zero bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-26 23:36:02 +00:00
Chris Lattner
2b7401e28e
Recognize memory operand codes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-24 01:10:46 +00:00
Chris Lattner
b3befd41b4
Don't return registers from register classes that aren't legal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 23:00:51 +00:00
Chris Lattner
1efa40f6a4
split register class handling from explicit physreg handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 00:56:39 +00:00
Chris Lattner
4217ca8dc1
Updates to match change of getRegForInlineAsmConstraint prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:11:00 +00:00
Nate Begeman
003a272319
Add a fold for add that exchanges it with a constant shift if possible, so
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that the shift may be more easily folded into other operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26286 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 02:43:25 +00:00
Jeff Cohen
5755b17044
Fix bug noticed by VC++.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26252 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 02:12:18 +00:00
Nate Begeman
368e18d56a
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Evan Cheng
a03a5dc7ce
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-14 08:38:30 +00:00