Jim Grosbach
3f51147d44
Update test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86614 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 22:59:01 +00:00
Jim Grosbach
e5165490b7
Use Unified Assembly Syntax for the ARM backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-09 00:11:35 +00:00
Anton Korobeynikov
f0b47b7f6d
Add and-not (bic) patterns. Based heavily on patch by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86471 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 15:33:12 +00:00
Anton Korobeynikov
52f28e9b63
Fix invalid operand updates & implement post-inc memory operands
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86466 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 14:27:38 +00:00
Anton Korobeynikov
c2fd919ea2
It is invalid to infer the value type from the result #0 of the node
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since the instruction might use the other result of different type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86462 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-08 12:14:54 +00:00
Nate Begeman
0b10b91465
x86 vector shuffle cleanup/fixes:
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1. rename the movhp patfrag to movlhps, since thats what it actually matches
2. eliminate the bogus movhps load and store patterns, they were incorrect. The load transforms are already handled (correctly) by shufps/unpack.
3. revert a recent test change to its correct form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86415 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 23:17:15 +00:00
Anton Korobeynikov
6534f83ae8
Add some dummy support for post-incremented loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:15:06 +00:00
Anton Korobeynikov
8983da729a
Add 8 bit libcalls and make use of them for msp430
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:14:39 +00:00
Anton Korobeynikov
123ed8f099
Initial support for addrmode handling. Tests by Brian Lucas!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 17:13:35 +00:00
Anton Korobeynikov
e8ea011cc7
It turns out that the testcase in question uncovered subreg-handling bug.
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Add assert in asmprinter to catch such cases and xfail the tests.
PR is to be filled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 15:20:32 +00:00
Eric Christopher
761411c21b
Fix a couple of shuffle patterns to use movhlps instead
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of movhps as the constraint. Changes optimizations so
update testcases as appropriate as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86360 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 08:45:53 +00:00
Chris Lattner
e880efe446
Fix PR5421 by APInt'izing switch lowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86354 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 07:50:34 +00:00
Chris Lattner
e503871315
merge cmp1 into cmp0 and filecheckize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86345 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 06:19:20 +00:00
Evan Cheng
d457e6e9a5
Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 04:04:34 +00:00
Evan Cheng
78e5c1140a
- Add TargetInstrInfo::isIdentical(). It's similar to MachineInstr::isIdentical
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except it doesn't care if the definitions' virtual registers differ. This is
used by machine LICM and other MI passes to perform CSE.
- Teach Thumb2InstrInfo::isIdentical() to check two t2LDRpci_pic are identical.
Since pc relative constantpool entries are always different, this requires it
it check if the values can actually the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86328 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-07 03:52:02 +00:00
Evan Cheng
b9803a8fa6
- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic which does a pc-relative
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load of a GV from constantpool and then add pc. It allows the code sequence to
be rematerializable so it would be hoisted by machine licm.
- Add a late pass to break these pseudo instructions into a number of real
instructions. Also move the code in Thumb2 IT pass that breaks up t2MOVi32imm
to this pass. This is done before post regalloc scheduling to allow the
scheduler to proper schedule these instructions. It also allow them to be
if-converted and shrunk by later passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86304 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:52:48 +00:00
Anton Korobeynikov
fc2cba8362
Honour subreg machine operands during asmprinting
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:45:15 +00:00
Bob Wilson
54c78ef2fe
Print VMOV (immediate) operands as hexadecimal values. Apple's assembler
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will not accept negative values for these. LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates. Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86301 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:33:28 +00:00
Bob Wilson
d51722a7e3
Fix a broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86298 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 23:06:42 +00:00
Evan Cheng
e7e0d62efd
Remove ARMPCLabelIndex from ARMISelLowering. Use ARMFunctionInfo::createConstPoolEntryUId() instead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86294 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 22:24:13 +00:00
Eric Christopher
ef1fad533e
Fix PR5315, original patch by Nicolas Capens!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86203 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-06 00:11:57 +00:00
Dan Gohman
3f131328ff
Update these tests for the new label names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86192 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 23:31:40 +00:00
Bob Wilson
5a225cc85a
Add -mtriple to llc commands, attempting to fix buildbot failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 00:51:31 +00:00
Bob Wilson
8a008cc49d
Attempt again to fix buildbot failures: make expected output less specific
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and compile with -mtriple to specify *-apple-darwin targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86081 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-05 00:30:35 +00:00
Bob Wilson
3d90dbee69
Add PowerPC codegen for indirect branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86050 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 21:31:18 +00:00
Bob Wilson
1709dd73d6
Fix broken test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 20:04:11 +00:00
Bob Wilson
0d48d6106e
Add test for ARM indirectbr codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86042 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 19:25:34 +00:00
Evan Cheng
50608bac2f
RangeIsDefinedByCopyFromReg() should check for subreg_to_reg, insert_subreg,
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and extract_subreg as a "copy" that defines a valno.
Also fixes a typo. These two issues prevent a simple subreg coalescing from
happening before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86022 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 08:33:14 +00:00
Evan Cheng
ad95ff9fab
Fix test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85986 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-04 00:42:33 +00:00
Evan Cheng
b23b2015eb
fconsts / fconstd immediate should be proceeded with #.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:59:33 +00:00
Evan Cheng
777c6b7caa
Re-apply 85799. It turns out my code isn't buggy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85947 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 21:40:02 +00:00
Kenneth Uildriks
b908f8ad6a
Make opt default to not adding a target data string and update tests that depend on target data to supply it within the test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85900 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 15:29:06 +00:00
Evan Cheng
ba908640b3
Fix PR5367. QPR_8 is the super regclass of DPR_8 and SPR_8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 05:52:54 +00:00
Nate Begeman
e4a9f9c450
Declare sin & cos as readonly so they match the code in SelectionDAGBuild
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85853 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 02:19:31 +00:00
Anton Korobeynikov
7b360e7f29
Temporary xfail until PR5367 will be resolved
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85848 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:37:36 +00:00
Anton Korobeynikov
ab453e0641
Revert r85049, it is causing PR5367
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85847 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-03 00:24:48 +00:00
Evan Cheng
454ac8961b
Revert 85799 for now. It might be breaking llvm-gcc driver.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 21:49:14 +00:00
Evan Cheng
72ed88feac
Initilize the machine LICM CSE map upon the first time an instruction is hoisted to
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the loop preheader. Add instructions which are already in the preheader block that
may be common expressions of those that are hoisted out. These does get a few more
instructions CSE'ed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85799 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 08:09:49 +00:00
Evan Cheng
580e791ded
Remove an irrelevant and poorly reduced test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85794 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 07:11:54 +00:00
Evan Cheng
7baae87d8f
Unbreak ARMBaseRegisterInfo::copyRegToReg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85787 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 04:44:55 +00:00
Anton Korobeynikov
2ae0eec1c0
Handle splats of undefs properly. This includes the testcase for PR5364 as well.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:12:06 +00:00
Anton Korobeynikov
2e1da9fea4
64-bit FP loads & stores operate on both NEON and VFP pipelines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85765 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-02 00:11:06 +00:00
Evan Cheng
48d8afab73
Make use of imm12 version of Thumb2 ldr / str instructions more aggressively.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85743 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 21:12:51 +00:00
Evan Cheng
1107f03ef4
Fix tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85723 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 18:13:29 +00:00
Chris Lattner
43f44aa160
improve x86 codegen support for blockaddress. We now compile
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the testcase into:
_test1: ## @test1
## BB#0: ## %entry
leaq L_test1_bb6(%rip), %rax
jmpq *%rax
L_test1_bb: ## Address Taken
LBB1_1: ## %bb
movb $1, %al
ret
L_test1_bb6: ## Address Taken
LBB1_2: ## %bb6
movb $2, %al
ret
Note, it is very very strange that BlockAddressSDNode doesn't carry
around TargetFlags. Dan, please fix this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85703 91177308-0d34-0410-b5e6-96231b3b80d8
2009-11-01 03:25:03 +00:00
Evan Cheng
de17fb6e4d
Use cbz and cbnz instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85698 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 23:46:45 +00:00
Jim Grosbach
8cd0a8cb82
vml[as].f32 cause stalls in following advanced SIMD instructions. Avoid using
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them for scalar floating point operations for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85697 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:57:36 +00:00
Jim Grosbach
1820ec5e7a
Consolidate test files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85696 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:20:56 +00:00
Jim Grosbach
91c0aebe68
Change to use FileCheck
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85695 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:16:14 +00:00
Jim Grosbach
0e5c9beeed
Make tests more explicit about which instructions are expected.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85694 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-31 22:14:17 +00:00