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57 Commits

Author SHA1 Message Date
Chris Lattner
420736dc85 #include Intrinsics.h into all dag isels 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27109 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-25 06:47:10 +00:00
Evan Cheng
c4c6257c1a Added getTargetLowering() to TargetMachine. Refactored targets to support this. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-13 23:20:37 +00:00
Evan Cheng
8c03fe4aca Don't match x << 1 to LEAL. It's better to emit x + x. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26429 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 21:13:57 +00:00
Evan Cheng
51a9ed9b41 * Cleaned up addressing mode matching code. 
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 10:09:08 +00:00
Evan Cheng
020d2e8e7a - Clean up the lowering and selection code of ConstantPool, GlobalAddress, 
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26335 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 20:41:18 +00:00
Evan Cheng
a0ea0539e3 PIC related bug fixes. 
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 02:43:52 +00:00
Evan Cheng
224ec39cab X86 codegen tweak to use lea in another case: 
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 00:13:58 +00:00
Evan Cheng
7ccced634a x86 / Darwin PIC support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26273 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-18 00:15:05 +00:00
Evan Cheng
2486af1b53 Prevent certain nodes that have already been selected from being folded into 
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-11 02:05:36 +00:00
Evan Cheng
23addc061c Nicer code. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26111 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-10 22:46:26 +00:00
Evan Cheng
f597dc78f8 Added X86 isel debugging stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-10 22:24:32 +00:00
Evan Cheng
7d82d607c5 Match tblgen change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 22:12:53 +00:00
Evan Cheng
7e9b26fc73 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 07:17:49 +00:00
Evan Cheng
34167215a8 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 00:37:58 +00:00
Evan Cheng
5e35168b11 - Update load folding checks to match those auto-generated by tblgen. 
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26012 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 06:02:33 +00:00
Evan Cheng
ba2f0a9ee5 Use SelectRoot() as entry of any tblgen based isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 06:46:41 +00:00
Evan Cheng
7dd281b3e5 Re-commit the last bit of change that was backed out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25983 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 05:25:07 +00:00
Chris Lattner
b46ef67679 Temporarily revert this patch, which probably breaks with the 
tblgen patch reverted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25971 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 09:24:16 +00:00
Evan Cheng
9c4815a036 Complex pattern's custom matcher should not call Select() on any operands. 
Select them afterwards if it returns true.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25968 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 08:50:49 +00:00
Evan Cheng
223547ab31 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*. 
- Use XORP* to implement fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25857 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:28:30 +00:00
Evan Cheng
559806f575 x86 CPU detection and proper subtarget support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 08:10:46 +00:00
Chris Lattner
2c2c6c61f1 Add explicit #includes of <iostream> 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25515 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-22 23:41:00 +00:00
Evan Cheng
d9c45e9af9 Didn't mean to check that in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25436 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 01:52:56 +00:00
Evan Cheng
b7b5706340 A obvious typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-19 01:46:14 +00:00
Evan Cheng
0cc3945efe Fix FP_TO_INT**_IN_MEM lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-16 21:21:29 +00:00
Chris Lattner
e112552b5a Use the default lowering of ISD::DYNAMIC_STACKALLOC, delete now dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-15 09:00:21 +00:00
Chris Lattner
b47fad9892 silence a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25322 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-14 20:11:13 +00:00
Evan Cheng
38262cad0a Select DYNAMIC_STACKALLOC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25225 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 22:15:18 +00:00
Evan Cheng
8700e14ba1 * Add special entry code main() (to set x87 to 64-bit precision). 
* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25207 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 06:09:51 +00:00
Chris Lattner
92cb0af675 implement FP_REG_KILL insertion for the dag-dag instruction selector 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 01:15:34 +00:00
Chris Lattner
a2b694ce35 Fit into 80 cols 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25191 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-11 00:46:55 +00:00
Evan Cheng
aaca22ca91 FP_TO_INT*_IN_MEM and x87 FP Select support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25188 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-10 20:26:56 +00:00
Evan Cheng
510e478098 * Added undef patterns. 
* Some reorg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25163 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-09 23:10:28 +00:00
Evan Cheng
948f343a2f * Added integer div / rem. 
* Fixed a load folding bug.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25136 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 23:19:29 +00:00
Evan Cheng
0114e94903 ISEL code for MULHU, MULHS, and UNDEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25132 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 20:36:21 +00:00
Evan Cheng
da95a84a11 fold (shl x, 1) -> (add x, x) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25120 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-06 01:06:31 +00:00
Evan Cheng
650d688db6 Added ConstantFP patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25108 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-05 02:08:37 +00:00
Evan Cheng
d90eb7fb24 DAG based isel call support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25103 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-05 00:27:02 +00:00
Evan Cheng
3a03ebb377 * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 23:05:39 +00:00
Evan Cheng
8263c5e920 Remove ISD::RET select code. Now tblgen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24889 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 02:41:57 +00:00
Evan Cheng
b077b842b6 * Added lowering hook for external weak global address. It inserts a load 
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-21 02:39:21 +00:00
Evan Cheng
fcaa9957c9 It's essential we clear CodeGenMap after isel every basic block! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24867 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-19 22:36:02 +00:00
Evan Cheng
bdce7b4090 Darwin API issue: indirect load of external and weak symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24775 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 09:13:43 +00:00
Evan Cheng
45f37bc527 Added truncate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24760 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 02:02:50 +00:00
Evan Cheng
aed7c721df Added support for cmp, test, and conditional move instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24756 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-17 01:24:02 +00:00
Evan Cheng
cb17bac3a3 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24726 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 19:49:23 +00:00
Evan Cheng
def941b41f Handling zero extension of 1 bit value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24722 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-15 01:02:48 +00:00
Evan Cheng
e5280536a3 When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24674 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 21:49:40 +00:00
Evan Cheng
cbd6ed4d6b For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24673 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-12 20:32:18 +00:00
Evan Cheng
b51a059b2c * Added X86 store patterns. 
* Added X86 dec patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-12-10 00:48:20 +00:00