Evan Cheng
466685d41a
Reflects ISD::LOAD / ISD::LOADX / LoadSDNode changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30844 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-09 20:57:25 +00:00
Evan Cheng
786225adf0
Make use of getStore().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30759 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 23:01:46 +00:00
Chris Lattner
1907a7b37b
Lower some min/max idioms to minss/maxss when unsafe fp math is enabled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-05 04:11:26 +00:00
Evan Cheng
e111303408
Added option -disable-x86-shuffle-opti to disable X86 specific vector shuffle optimizations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30723 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 18:33:38 +00:00
Chris Lattner
83e6c9925e
Pattern match min/max nodes when we have sse. This implements
...
CodeGen/X86/scalar_sse_minmax.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30719 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 06:57:07 +00:00
Evan Cheng
c548428c5d
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-04 00:56:09 +00:00
Chris Lattner
13bf6c1350
Fix PR933 and CodeGen/X86/2006-10-02-BoolRetCrash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30703 91177308-0d34-0410-b5e6-96231b3b80d8
2006-10-03 17:18:42 +00:00
Chris Lattner
f38f543e01
silence warnings in release build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30631 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-27 18:29:38 +00:00
Chris Lattner
e87e1154a1
Various random and minor code cleanups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30608 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-26 03:57:53 +00:00
Nick Lewycky
70084fd53a
Fix compile error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30553 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-21 02:08:31 +00:00
Anton Korobeynikov
f824868ed9
Adding codegeneration for StdCall & FastCall calling conventions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30549 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-20 22:03:51 +00:00
Anton Korobeynikov
bcb9770efe
Added some eye-candy for Subtarget type checking
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Added X86 StdCall & FastCall calling conventions. Codegen will follow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30446 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-17 20:25:45 +00:00
Anton Korobeynikov
93c2b37340
Small fixes for supporting dll* linkage types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30441 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-17 13:06:18 +00:00
Anton Korobeynikov
b74ed07bfd
Adding dllimport, dllexport and external weak linkage types.
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DLL* linkages got full (I hope) codegeneration support in C & both x86
assembler backends.
External weak linkage added for future use, we don't provide any
codegeneration, etc. support for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-14 18:23:27 +00:00
Chris Lattner
bfd68a7858
Turn X < 0 -> TEST X,X js
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30294 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 17:04:54 +00:00
Chris Lattner
7a6366de86
The sense of this branch was inverted :(
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30293 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 16:56:12 +00:00
Chris Lattner
f95705163f
Compile X > -1 -> text X,X; js dest
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This implements CodeGen/X86/jump_sign.ll.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30283 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-13 03:22:10 +00:00
Evan Cheng
c356a572e3
Reflects MachineConstantPoolEntry changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30279 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-12 21:04:05 +00:00
Evan Cheng
734503be59
X86ISD::CMP now produces a chain as well as a flag. Make that the chain
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operand of a conditional branch to allow load folding into CMP / TEST
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30241 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-11 02:19:56 +00:00
Evan Cheng
25ab690a43
Committing X86-64 support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 06:48:29 +00:00
Evan Cheng
8cf723d8eb
- Identify a vector_shuffle that can be turned into an undef, e.g.
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shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
optimal code by failing to identify MOVL (move to lowest element of a
vector).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 01:50:06 +00:00
Chris Lattner
ffc0b2663e
Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns
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using test, which provides nice simplifications like:
- movl %edi, %ecx
- andl $2, %ecx
- cmpl $0, %ecx
+ testl $2, %edi
je LBB1_11 #cond_next90
There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 20:33:45 +00:00
Chris Lattner
5ea7a68e15
Revert this patch, the front-end has been fixed to make it unneccesary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29752 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 18:43:24 +00:00
Chris Lattner
b5bc04d38a
'g' is handled by the front-end.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 18:12:28 +00:00
Andrew Lenharth
ad1ed016ce
Fix handling of 'g'. Closes 883
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 17:50:12 +00:00
Andrew Lenharth
d337295fb0
Add the 'c' constraint as needed by the linux kernel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29747 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 16:07:50 +00:00
Andrew Lenharth
c63e56ee5f
Add support for S and D constraints, as needed to compile the linux kernel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29746 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-17 15:35:43 +00:00
Chris Lattner
e219945348
Eliminate use of getNode that takes a vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29614 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:38:39 +00:00
Evan Cheng
64a752f7c7
Match tablegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:08:15 +00:00
Evan Cheng
311ace0391
Convert more calls of getNode() that takes a vector to pass in the start of an array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29601 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 07:35:45 +00:00
Chris Lattner
bd564bfc63
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
...
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 02:23:42 +00:00
Chris Lattner
f76d180c95
Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
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The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 23:26:50 +00:00
Chris Lattner
35d86fef1f
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:12:04 +00:00
Evan Cheng
625518002d
This opt is now handled in DAG combine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc
A splat of a vector constant of all zero or all one is the vector constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 23:09:47 +00:00
Chris Lattner
6d3465793f
Add information preventing several register class constraints from working.
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This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 16:59:49 +00:00
Chris Lattner
f4dff84c86
Implement the inline asm 'A' constraint. This implements PR825 and
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CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 02:54:03 +00:00
Evan Cheng
1e60c098cc
Fixed stack objects do not specify alignments, but their offsets are known.
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Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 21:37:44 +00:00
Chris Lattner
5c5f4ca6f1
Mark internal function static
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 19:53:12 +00:00
Evan Cheng
206ee9d86c
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
...
(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 08:33:52 +00:00
Evan Cheng
60c07e1aea
Reorg. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-05 22:17:51 +00:00
Evan Cheng
da08d2c39a
Simplify X86CompilationCallback: always align to 16-byte boundary; don't save EAX/EDX if unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28910 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-24 08:36:10 +00:00
Evan Cheng
015188ffbc
Type of vector extract / insert index operand should be iPTR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-15 08:14:54 +00:00
Evan Cheng
b69d113201
Add argument registers to the end of call operand list (partial fix).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-14 18:17:40 +00:00
Evan Cheng
b12223e284
Minor compilation speed improvement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-09 06:24:42 +00:00
Evan Cheng
e8bd0a332a
Added X86FunctionInfo subclass of MachineFunction to record whether the
...
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-06 23:30:24 +00:00
Evan Cheng
2675534b7f
Typos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28617 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 05:53:27 +00:00
Evan Cheng
04b2562502
Remove a warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-06-01 00:30:39 +00:00
Evan Cheng
8f692e2457
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28581 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-31 00:50:42 +00:00
Evan Cheng
6848be1a27
Change RET node to include signness information of the return values. i.e.
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RET chain, value1, sign1, value2, sign2, ...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 23:10:12 +00:00
Evan Cheng
3fddf241d8
Vector argument must be passed in memory location aligned on 16-byte boundary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28505 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 20:37:47 +00:00
Evan Cheng
1d6a9b3b6c
Mac OS X ABI document lied. The first four XMM registers are used to pass
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vector arguments, not three.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28504 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 19:22:06 +00:00
Evan Cheng
052fb5110f
Minor update to make the code more clear
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:39:59 +00:00
Evan Cheng
f9d62dc6e5
Update more comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28498 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:37:16 +00:00
Evan Cheng
f9ff7c54be
Fix some comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28497 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:25:43 +00:00
Evan Cheng
6f707999a1
No need to handle illegal types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28496 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-26 18:22:49 +00:00
Evan Cheng
cc1fc220a0
Consistency
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28488 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 23:31:23 +00:00
Evan Cheng
25e71d10a0
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28483 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:38:31 +00:00
Evan Cheng
a9bb445db0
Remove some dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28481 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 22:25:52 +00:00
Evan Cheng
6b5783d0b1
Build breakage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28475 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 18:56:34 +00:00
Evan Cheng
32fe1035a7
Switch X86 over to a call-selection model where the lowering code creates
...
the copyto/fromregs instead of making the X86ISD::CALL selection code create
them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28463 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-25 00:59:30 +00:00
Chris Lattner
c6d0567324
Fix file header comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28441 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 23:20:42 +00:00
Evan Cheng
4db3af3511
Better way to check for vararg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28440 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 21:08:24 +00:00
Evan Cheng
25caf63cd2
Remove PreprocessCCCArguments and PreprocessFastCCArguments now that
...
FORMAL_ARGUMENTS nodes include a token operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28439 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 21:06:34 +00:00
Chris Lattner
2d2970905c
Implement an annoying part of the Darwin/X86 abi: the callee of a struct
...
return argument pops the hidden struct pointer if present, not the caller.
For example, in this testcase:
struct X { int D, E, F, G; };
struct X bar() {
struct X a;
a.D = 0;
a.E = 1;
a.F = 2;
a.G = 3;
return a;
}
void foo(struct X *P) {
*P = bar();
}
We used to emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
addl $28, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
ret
This is correct on Linux/X86 but not Darwin/X86. With this patch, we now
emit:
_foo:
subl $28, %esp
movl 32(%esp), %eax
movl %eax, (%esp)
call _bar
*** addl $24, %esp
ret
_bar:
movl 4(%esp), %eax
movl $0, (%eax)
movl $1, 4(%eax)
movl $2, 8(%eax)
movl $3, 12(%eax)
*** ret $4
For the record, GCC emits (which is functionally equivalent to our new code):
_bar:
movl 4(%esp), %eax
movl $3, 12(%eax)
movl $2, 8(%eax)
movl $1, 4(%eax)
movl $0, (%eax)
ret $4
_foo:
pushl %esi
subl $40, %esp
movl 48(%esp), %esi
leal 16(%esp), %eax
movl %eax, (%esp)
call _bar
subl $4, %esp
movl 16(%esp), %eax
movl %eax, (%esi)
movl 20(%esp), %eax
movl %eax, 4(%esi)
movl 24(%esp), %eax
movl %eax, 8(%esi)
movl 28(%esp), %eax
movl %eax, 12(%esi)
addl $40, %esp
popl %esi
ret
This fixes SingleSource/Benchmarks/CoyoteBench/fftbench with LLC and the
JIT, and fixes the X86-backend portion of PR729. The CBE still needs to
be updated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28438 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-23 18:50:38 +00:00
Chris Lattner
cdbaeb52ae
CSRet allows varargs
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28409 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-19 21:34:04 +00:00
Evan Cheng
4ac8974d02
Should pass by reference.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28357 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-17 19:07:40 +00:00
Chris Lattner
aa9406b0c4
Implement the custom lowering hook right, returning values for all of the
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arguments at once.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28327 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:14:26 +00:00
Chris Lattner
e7746c9084
Fix a bug I introduced yesterday, which broke functions with *no* arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28326 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 17:08:35 +00:00
Evan Cheng
069287d460
X86 integer register classes naming changes. Make them consistent with FP, vector classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 07:21:53 +00:00
Chris Lattner
8c0c10c2b9
Add a chain to FORMAL_ARGUMENTS. This is a minimal port of the X86 backend,
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it doesn't currently use/maintain the chain properly. Also, make the
X86ISelLowering.cpp file 80-col clean.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28320 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-16 06:45:34 +00:00
Chris Lattner
03ea4c8326
Dead variable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28265 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-12 21:12:22 +00:00
Chris Lattner
80a7ecc923
Teach the X86 backend about non-i32 inline asm register classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-06 00:29:37 +00:00
Chris Lattner
bd04aa5796
Teach the code generator to use cvtss2sd as extload f32 -> f64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-05 21:35:18 +00:00
Owen Anderson
a69571c799
Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses. This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.
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This fixes PR 759.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28074 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-03 01:29:57 +00:00
Evan Cheng
347d5f789a
Initial caller side support (for CCC only, not FastCC) of 128-bit vector
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passing by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28015 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 21:29:37 +00:00
Evan Cheng
43f3bd310b
Implement four-wide shuffle with 2 shufps if no more than two elements come
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from each vector. e.g.
shuffle(G1, G2, 7, 1, 5, 2)
==>
movaps _G2, %xmm0
shufps $151, _G1, %xmm0
shufps $216, %xmm0, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 07:03:38 +00:00
Evan Cheng
020c41f21e
TargetLowering::LowerArguments should return a VBIT_CONVERT of
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FORMAL_ARGUMENTS SDOperand in the return result vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 05:25:15 +00:00
Evan Cheng
fea89c14ec
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
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for now.
Patch contributed by Alexander Friedman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27994 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:40:39 +00:00
Evan Cheng
2fdd95eee7
Support for passing 128-bit vector arguments via XMM registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27992 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:31:10 +00:00
Evan Cheng
5fb03ce905
Oops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27989 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:44:50 +00:00
Evan Cheng
85e3800e42
Bug fix: not updating NumIntRegs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27988 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:35:28 +00:00
Evan Cheng
eda65fa20b
- Clean up formal argument lowering code. Prepare for vector pass by value work.
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- Fixed vararg support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27985 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 01:32:22 +00:00
Evan Cheng
9191dbba8e
Fix fastcc failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-26 18:21:31 +00:00
Evan Cheng
1bc7804e4c
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-26 01:20:17 +00:00
Evan Cheng
0db9fe6775
Separate LowerOperation() into multiple functions, one per opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27972 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 20:13:52 +00:00
Evan Cheng
37d1d9bc66
Special case handling two wide build_vector(0, x).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27961 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 22:58:52 +00:00
Evan Cheng
c78d3b43f5
A little bit more build_vector enhancement for v8i16 cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 18:01:45 +00:00
Evan Cheng
9293451e3f
MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 06:35:19 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Evan Cheng
1900c012f5
Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 08:34:05 +00:00
Evan Cheng
a083af14c8
Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 06:21:46 +00:00
Evan Cheng
ba05f728b5
Revamp build_vector lowering to take advantage of movss and movd instructions.
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movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.
__m128i test(int a, int b) {
return _mm_set_epi32(0, 0, b, a);
}
compiles to
_test:
movd 8(%esp), %xmm1
movd 4(%esp), %xmm0
punpckldq %xmm1, %xmm0
ret
compare to gcc:
_test:
subl $12, %esp
movd 20(%esp), %xmm0
movd 16(%esp), %xmm1
punpckldq %xmm0, %xmm1
movq %xmm1, %xmm0
movhps LC0, %xmm0
addl $12, %esp
ret
or icc:
_test:
movd 4(%esp), %xmm0 #5.10
movd 8(%esp), %xmm3 #5.10
xorl %eax, %eax #5.10
movd %eax, %xmm1 #5.10
punpckldq %xmm1, %xmm0 #5.10
movd %eax, %xmm2 #5.10
punpckldq %xmm2, %xmm3 #5.10
punpckldq %xmm3, %xmm0 #5.10
ret #5.10
There are still room for improvement, for example the FP variant of the above example:
__m128 test(float a, float b) {
return _mm_set_ps(0.0, 0.0, b, a);
}
_test:
movss 8(%esp), %xmm1
movss 4(%esp), %xmm0
unpcklps %xmm1, %xmm0
xorps %xmm1, %xmm1
movlhps %xmm1, %xmm0
ret
The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 23:03:30 +00:00
Evan Cheng
017dcc6e55
Now generating perfect (I think) code for "vector set" with a single non-zero
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scalar value.
e.g.
_mm_set_epi32(0, a, 0, 0);
==>
movd 4(%esp), %xmm0
pshufd $69, %xmm0, %xmm0
_mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
movzbw 4(%esp), %ax
movzwl %ax, %eax
pxor %xmm0, %xmm0
pinsrw $5, %eax, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 01:05:10 +00:00
Evan Cheng
39623daef6
- Added support to turn "vector clear elements", e.g. pand V, <-1, -1, 0, -1>
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to a vector shuffle.
- VECTOR_SHUFFLE lowering change in preparation for more efficient codegen
of vector shuffle with zero (or any splat) vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27875 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 08:58:49 +00:00
Evan Cheng
72cd9a9439
Handle v2i64 BUILD_VECTOR custom lowering correctly. v2i64 is a legal type,
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but i64 is not. If possible, change a i64 op to a f64 (e.g. load, constant)
and then cast it back.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27849 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 00:11:39 +00:00
Evan Cheng
94fe5eb14a
isSplatMask() bug: first element can be an undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27847 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 23:28:59 +00:00
Evan Cheng
80d428c370
- Added support to do aribitrary 4 wide shuffle with no more than three
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instructions.
- Fixed a commute vector_shuff bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27845 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 22:48:17 +00:00
Evan Cheng
533a0aa9ba
Commute vector_shuffle to match more movlhps, movlp{s|d} cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-19 20:35:22 +00:00
Evan Cheng
cdfc3c82a7
Use movss to insert_vector_elt(v, s, 0).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27782 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-17 22:45:49 +00:00