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146 Commits

Author SHA1 Message Date
Chris Lattner
1c3e1e2ed0 fix typo duncan noticed! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45459 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-30 21:21:10 +00:00
Chris Lattner
4ee451de36 Remove attribution from file headers, per discussion on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45418 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 20:36:04 +00:00
Chris Lattner
63079f0757 Fold comparisons against a constant nan, and optimize ORD/UNORD 
comparisons with a constant.  This allows us to compile isnan to:

_foo:
	fcmpu cr7, f1, f1
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

instead of:

LCPI1_0:					;  float
	.space	4
_foo:
	lis r2, ha16(LCPI1_0)
	lfs f0, lo16(LCPI1_0)(r2)
	fcmpu cr7, f1, f0
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45405 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-29 08:37:08 +00:00
Chris Lattner
2ceb2cfa8e initial code for forming an FGETSIGN node. This is disabled until 
legalizer support goes in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45323 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-22 21:35:38 +00:00
Chris Lattner
1a3048bb8e Add a new FGETSIGN operation, which defaults to expand on all 
targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45320 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-12-22 20:47:56 +00:00
Nate Begeman
d73ab8884f Support returning non-power-of-2 vectors to unblock some work 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44371 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-27 19:28:48 +00:00
Evan Cheng
cc41586b9d Much improved pic jumptable codegen: 
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-09 01:32:10 +00:00
Evan Cheng
2dfdefd282 Didn't mean to check these in. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43923 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-09 01:28:33 +00:00
Evan Cheng
7da8f399bf Bug fix. Passive nodes are not in SUnitMap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43922 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-09 01:27:11 +00:00
Rafael Espindola
f1ba1cad38 Move the LowerMEMCPY and LowerMEMCPYCall to a common place. 
Thanks for the suggestions Bill :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 23:12:20 +00:00
Dale Johannesen
eb57ea7ea2 Make labels work in asm blocks; allow labels as 
parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43734 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-11-05 21:20:28 +00:00
Dan Gohman
e54be10418 Add runtime library names for pow. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-11 23:09:10 +00:00
Dan Gohman
525178cdbf Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to 
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-08 18:33:35 +00:00
Dale Johannesen
161e897b0f First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-10-05 20:04:43 +00:00
Dale Johannesen
317096ab37 Add sqrt and powi intrinsics for long double. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42423 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-28 01:08:20 +00:00
Dan Gohman
c3b0b5ca1d Move the setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand) and 
the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-25 15:10:49 +00:00
Chris Lattner
dfe8934258 initialize SetCCResultContents, fixing PR1693 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42193 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-21 17:06:39 +00:00
Dale Johannesen
73328d14ac More long double fixes. x86_64 should build now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42155 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-19 23:55:34 +00:00
Owen Anderson
718cb665ca Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41758 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-09-07 04:06:50 +00:00
Chris Lattner
48884cd80b rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41384 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-25 00:47:38 +00:00
Dale Johannesen
5411a3937f long double 9 of N. This finishes up the X86-32 bits 
(constants are still not handled).  Adds ConvertActions
to control fp-to-fp conversions (these are currently
defaulted for all other targets, so no changes there).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40958 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-08-09 01:04:01 +00:00
Dan Gohman
93f81e2822 Initialize the IndexedModeActions array with memset before 
updating it with calls to setIndexedLoadAction/setIndexedStoreAction,
which only update a few bits at a time. This avoids ostensible
undefined behavior of operationg on values which may be
trap-representations, and as a practical matter fixes errors from
valgrind, which doesn't track uninitialized memory with bit
granularity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@38468 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-07-09 20:49:44 +00:00
Dan Gohman
b6f5b00c3b Add new TargetLowering code to provide the final register type that an 
illegal value type will be transformed to, for code that needs the
register type after all transformations instead of just after the first
transformation.

Factor out the code that uses this information to do copy-from-regs and
copy-to-regs for various purposes into separate functions so that they
are done consistently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37781 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-28 23:29:44 +00:00
Dan Gohman
7f32156bb9 Generalize MVT::ValueType and associated functions to be able to represent 
extended vector types. Remove the special SDNode opcodes used for pre-legalize
vector operations, and the special MVT::Vector type used with them. Adjust
lowering and legalize to work with the normal SDNode kinds instead, and to
use the normal MVT functions to work with vector types instead of using the
two special operands that the pre-legalize nodes held.

This allows pre-legalize and post-legalize DAGs, and the code that operates
on them, to be more consistent. Pre-legalize vector operators can be handled
more consistently with scalar operators. And, -view-dag-combine1-dags and
-view-legalize-dags now look prettier for vector code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37719 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-25 16:23:39 +00:00
Dan Gohman
ea859be53c Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37704 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-22 14:59:07 +00:00
Dan Gohman
2d74a318de Tidy up ValueType names in comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37688 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-21 14:48:26 +00:00
Dan Gohman
b9f1019696 Rename TargetLowering::getNumElements and friends to 
TargetLowering::getNumRegisters and similar, to avoid confusion with
the actual number of elements for vector types.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37687 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-06-21 14:42:22 +00:00
Chris Lattner
4e7e6cd13a Fix CodeGen/PowerPC/2007-05-30-dagcombine-miscomp.ll, and PR1473. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37362 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-30 16:30:06 +00:00
Chris Lattner
7667c0bac3 same patch as the previous one, but the symmetric case 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37249 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-19 00:46:51 +00:00
Chris Lattner
2ad913b342 Disable the (A == (B-A)) -> 2*A == B xform when the sub has multiple uses (in 
this case, the xform introduces an extra operation).  This compiles
PowerPC/compare-duplicate.ll into:

_test:
        subf r2, r3, r4
        cmplw cr0, r2, r3
        bne cr0, LBB1_2 ;F

instead of:

_test:
        slwi r2, r3, 1
        subf r3, r3, r4
        cmplw cr0, r4, r2
        bne cr0, LBB1_2 ;F

This is target independent of course.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37246 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-19 00:43:44 +00:00
Dan Gohman
b55757ec5f Qualify several calls to functions in the MVT namespace, for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37230 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 17:52:13 +00:00
Chris Lattner
3fc5b01d38 disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for 
i128 integers.  The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37169 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 18:19:23 +00:00
Evan Cheng
d60483ef99 Add target hook to specify block size limit for if-conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 23:45:53 +00:00
Chris Lattner
75c7d2bd55 Allow i/s to match (gv+c). This fixes CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll 
and PR1382


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36672 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-03 16:54:34 +00:00
Chris Lattner
0a16a1f738 fix a pasto 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36242 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-18 03:01:40 +00:00
Chris Lattner
8c7d2d56bf Fix a bug in my previous patch, grabbing the shift amount width from the 
wrong operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36223 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 22:53:02 +00:00
Chris Lattner
895c4ab564 Fold (x << c1)>> c2 into a single shift if the bits shifted out aren't used. 
This compiles:
int baz(long long a) { return (short)(((int)(a >>24)) >> 9); }

into:
_baz:
        srwi r2, r3, 1
        extsh r3, r2
        blr

on PPC, instead of:
_baz:
        slwi r2, r3, 8
        srwi r2, r2, 9
        extsh r3, r2
        blr

GCC produces:
_baz:
        srwi r10,r4,24
        insrwi r10,r3,24,0
        srawi r9,r3,24
        srawi r3,r10,9
        extsh r3,r3
        blr

This implements CodeGen/PowerPC/shl_elim.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36221 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-17 21:14:16 +00:00
Anton Korobeynikov
bed2946a96 Removed tabs everywhere except autogenerated & external files. Add make 
target for tabs checking.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36146 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-16 18:10:23 +00:00
Chris Lattner
c2941779c3 Fix weirdness handling single element vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35941 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-12 04:44:28 +00:00
Chris Lattner
2b95fd67da remove dead target hooks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35847 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 23:34:08 +00:00
Chris Lattner
b445d0cbb9 remove some dead target hooks, subsumed by isLegalAddressingMode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35840 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-04-09 22:27:04 +00:00
Chris Lattner
d2f340b746 switch TL::getValueType to use MVT::getValueType. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35527 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-31 04:05:24 +00:00
Chris Lattner
1436bb657d add one addressing mode description hook to rule them all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35520 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-30 23:14:50 +00:00
Evan Cheng
caaf69107e Remove isLegalAddressImmediate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35406 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-28 01:53:55 +00:00
Chris Lattner
c13dd1cf4c implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 04:35:41 +00:00
Chris Lattner
065421f99f Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:18:14 +00:00
Chris Lattner
4234f57fa0 switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-25 02:14:49 +00:00
Dale Johannesen
fa4bce2b76 repair x86 performance, dejagnu problems from previous change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35245 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-21 21:51:52 +00:00
Dale Johannesen
8e59e163db do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35227 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-20 21:54:54 +00:00
Evan Cheng
14245a9d62 Added isLegalAddressExpression hook to test if the given expression can be 
folded into target addressing mode for the given type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-03-16 08:42:32 +00:00