Chris Lattner
2d592d10a5
add a bunch of aliases for fp operations with no operand,
...
rdar://8431422
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113929 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 04:04:33 +00:00
Michael J. Spencer
00002796bb
test: Fix coff-dump section array indicies to 1 based to match file format.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113928 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-15 03:58:51 +00:00
Jim Grosbach
05ae0c6026
Reapply r113875 with additional cleanups.
...
"The register specified for a dregpair is the corresponding Q register, so to
get the pair, we need to look up the sub-regs based on the qreg. Create a
lookup function since we don't have access to TargetRegisterInfo here to
be able to use getSubReg(ARM::dsub_[01])."
Additionaly, fix the NEON VLD1* and VST1* instruction patterns not to use
the dregpair modifier for the 2xdreg versions. Explicitly specifying the two
registers as operands is more correct and more consistent with the other
instruction patterns. This enables further cleanup of special case code in the
disassembler as a nice side-effect.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113903 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14 23:54:06 +00:00
Chris Lattner
ef63c9a9b6
add a terrible hack to allow out with dx is parens, a gas bug.
...
This fixes PR8114
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113894 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-14 23:34:29 +00:00
Chris Lattner
0989d29d09
add a missed cmov alias, part of rdar://8416805
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113693 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 17:08:22 +00:00
Chris Lattner
697d37a436
add support for all the setCC aliases. Part of rdar://8416805
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 17:06:05 +00:00
Rafael Espindola
b98ac2a71e
Add support for leb128 of absolute expressions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 16:45:15 +00:00
Chris Lattner
dfa3c9d982
add support for pushfd/popfd which are aliases for pushfl/popfl.
...
This fixes rdar://8408129 - pushfd and popfd get invalid instruction mnemonic errors
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 16:39:16 +00:00
Chris Lattner
ee211d0ed6
implement rdar://8407928 - support for in/out with a missing "a" register.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113689 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 16:32:12 +00:00
Rafael Espindola
228290c0d1
Change section_data dumping to print hex numbers instead of using
...
python's %r.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113685 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-11 15:25:58 +00:00
Daniel Dunbar
1ab6f2fa7a
llvm-mc: Don't crash when using -n and we see a directive before the initial section.
...
- This is annoying, because we have to scatter this check everywhere that could emit real data, but I see no better solution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113552 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 22:42:59 +00:00
Daniel Dunbar
93bd4d1e6b
llvm-mc: Make sure we exit != 0 if any errors are encountered.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113551 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 22:42:56 +00:00
Benjamin Kramer
a754be42da
Add an elf-dumper utility.
...
- Output format and some of the code stolen from macho-dump.
- Somewhat incomplete and probably buggy.
- Comes with a very basic test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113488 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-09 15:00:41 +00:00
Chris Lattner
90b54547d9
fix rdar://8407548, I missed the commuted form of xchg/test without a suffix.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:27:05 +00:00
Chris Lattner
373c458850
fix bugs in push/pop segment support, rdar://8407242
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113422 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 22:13:08 +00:00
Chris Lattner
c8ae35a8e8
add support for the commuted form of the test instruction, rdar://8018260.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:51:12 +00:00
Chris Lattner
ba8e81cca2
implement proper support for sysret{,l,q}, rdar://8403907
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:45:34 +00:00
Chris Lattner
ba8cea450f
implement the iret suite of instructions properly,
...
fixing rdar://8403974
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113349 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:38:31 +00:00
Chris Lattner
2544f42692
add support for instruction prefixes on the same line as the instruction,
...
implementing rdar://8033482 and PR7254.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113348 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 05:17:37 +00:00
Chris Lattner
9607c40601
gas accepts xchg <mem>, <reg> as a synonym for xchg <reg>, <mem>.
...
Add this to the mc assembler, fixing PR8061
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113346 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 04:53:27 +00:00
Chris Lattner
a247685b30
fix the encoding of the "jump on *cx" family of instructions,
...
rdar://8061602
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113343 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-08 04:30:51 +00:00
Chris Lattner
e9e0fc5eed
add missing cmov aliases, this resolves rdar://8208499
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113189 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-07 00:05:45 +00:00
Chris Lattner
c5cebeb3cb
"sldt <mem>" is ambiguous in 64-bit mode, but should
...
always be disambiguated as sldtw. sldtw and sldtq with
a mem operands have the same effect, but sldtw is more
compact. Force it to sldtw, resolving rdar://8017530
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113186 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:51:44 +00:00
Chris Lattner
d68c474ec5
fix rdar://8017621 - llvm-mc can't guess encoding for "push $(1000)"
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:40:56 +00:00
Chris Lattner
9389b60a03
fix the operand constraints of the immediate form of in/out,
...
allowing unsigned 8-bit operands. This fixes rdar://8208481
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113182 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-06 23:29:05 +00:00
Benjamin Kramer
1674b0b0e4
Add AsmParser support for the ELF .previous directive. Patch by Roman Divacky.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-02 18:53:37 +00:00
Michael J. Spencer
2ad12a0e2a
COFF: Update tests to reflect changes in last commit.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-09-01 14:15:31 +00:00
Chris Lattner
a5729aae5d
fixme accomplished
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112386 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-28 20:40:28 +00:00
Daniel Dunbar
3d6e4c3111
X86: Fix misencode of RI64mi8. This fixes OpenSSL / x86_64-apple-darwin10 / clang -O3.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-25 21:11:02 +00:00
Michael J. Spencer
82c84fdd23
Fix COFF x86-64 relocations. PR7960.
...
Multiple symbol reloc handling part of the patch by Cameron Esfahani.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111963 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 21:04:52 +00:00
Daniel Dunbar
fba88d49e3
MC/X86: Tweak imul recognition, previous hack only applies for the imul form
...
taking immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:37:56 +00:00
Daniel Dunbar
ae528f65ba
MC/X86: Add custom hack for recognizing "imul $12, %eax" and friends.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:24:18 +00:00
Daniel Dunbar
e17edff28f
MC/AsmParser: Change ParseExpression to use ParseIdentifier(), to support
...
dollars in identifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:13:42 +00:00
Daniel Dunbar
ee9102587e
MC/X86: Warn on scale factors > 1 without index register, instead of erroring,
...
for 'as' compatibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111945 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 19:13:38 +00:00
Daniel Dunbar
1f1b865c40
MC/Parser: Accept leading dollar signs in identifiers.
...
- Implemented by manually splicing the tokens. If this turns out to be
problematically platform specific, a more elegant solution would be to
implement some context dependent lexing support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 18:12:12 +00:00
Chris Lattner
a78c67e9bb
fix rdar://7997827 - Accept and ignore LL and ULL suffixes on integer literals.
...
Also fix 0b010 syntax to actually work while we're at it :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-24 00:43:25 +00:00
Chris Lattner
59f8a6a666
fix PR7465, mishandling of lcall and ljmp: intersegment long
...
call and jumps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111496 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-19 01:18:43 +00:00
Daniel Dunbar
c983b20661
MC/ELF: Allow null values in virtual sections, ELF doesn't use special
...
directives for putting contents in .bss, for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111376 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-18 18:22:37 +00:00
Bob Wilson
f955f290c9
Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid
...
printing "lsl #0 ". This fixes the remaining parts of pr7792. Make
corresponding changes for encoding/decoding these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111251 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-17 17:23:19 +00:00
Bob Wilson
20d8e4e7aa
Add a Thumb2 t2RSBrr instruction for disassembly only.
...
This fixes another part of PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111057 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 23:24:25 +00:00
Bob Wilson
38aa2871fc
Move the Thumb2 SSAT and USAT optional shift operator out of the
...
instruction opcode. This fixes part of PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-13 21:48:10 +00:00
Johnny Chen
1adc40cac3
Cleaned up the for-disassembly-only entries in the arm instruction table so that
...
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 20:46:17 +00:00
Johnny Chen
270159fcc2
The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .td
...
entry for ARM STRBT is actually a super-instruction for A8.6.199 STRBT A1 & A2.
Recover by looking for ARM:USAT encoding pattern before delegating to the auto-
gened decoder.
Added a "usat" test case to arm-tests.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110894 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 01:40:54 +00:00
Daniel Dunbar
09062b1672
MC/X86/AsmParser: Give an explicit error message when we reject an instruction
...
because it could have an ambiguous suffix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-12 00:55:42 +00:00
Johnny Chen
7def14f40f
Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.
...
Added two test cases to arm-tests.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:35:12 +00:00
Bob Wilson
eaf1c98a7c
Move the ARM SSAT and USAT optional shift amount operand out of the
...
instruction opcode. This also fixes part of PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110875 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 23:10:46 +00:00
Daniel Dunbar
345a9a6269
MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-11 06:37:20 +00:00
Daniel Dunbar
e25c6b95ce
MC/AsmParser: Fix a bug in macro argument parsing, which was dropping
...
parentheses from argument lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110692 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-10 17:38:52 +00:00
Bob Wilson
a1d410d512
Add an ARM RSCrr instruction for disassembly only.
...
Partial fix for PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110361 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 18:59:36 +00:00
Bob Wilson
cff7178844
Add an ARM RSBrr instruction for disassembly only.
...
Partial fix for PR7792.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110358 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 18:23:43 +00:00
Daniel Dunbar
079515f382
tests: Mark MC/AsmParser tests as requiring x86 for now -- almost all of them
...
rely on using a specific x86 triple to test what they want to test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 15:44:15 +00:00
Bob Wilson
1d9125a6ff
ARM "rrx" shift operands do not have an immediate. PR7790.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110292 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-05 00:34:42 +00:00
Michael J. Spencer
237f8fe5df
MC: Fix symbol fragment offsets in COFF.
...
Patch by Cameron Esfahani!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110104 91177308-0d34-0410-b5e6-96231b3b80d8
2010-08-03 05:02:46 +00:00
Bob Wilson
98e1479575
Add support for disassembling VMVN (immediate) instructions. PR7747.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109946 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-31 05:57:44 +00:00
Michael J. Spencer
dfd30187c6
Make MC use Windows COFF on Windows and add tests.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-27 06:46:15 +00:00
Bruno Cardoso Lopes
3c8e1bee63
Support x86 "eiz" and "riz" pseudo index registers in the assembler.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109295 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-24 00:06:39 +00:00
Matt Fleming
19d92fcae2
Consolidate the ELF section directive tests into a single file as
...
suggested by Chris Lattner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109290 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 23:40:41 +00:00
Bruno Cardoso Lopes
6d7019bcc4
Move AVX encoding tests to different files
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109269 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 21:25:26 +00:00
Bruno Cardoso Lopes
f528d2b438
Add AVX version of CLMUL instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109248 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 18:41:12 +00:00
Bruno Cardoso Lopes
6b7e9168a4
Add complete assembler support for FMA3 instructions, with descriptions and encodings taken from the AVX manual
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-23 00:54:35 +00:00
Bruno Cardoso Lopes
fb583a9842
Add remaining AVX instructions (most of them dealing with GR64 destinations. This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-22 21:18:49 +00:00
Bruno Cardoso Lopes
2b69143083
Add more 256-bit forms for a bunch of regular AVX instructions
...
Add 64-bit (GR64) versions of some instructions (which are not
described in their SSE forms, but are described in AVX)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109063 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 23:53:50 +00:00
Bruno Cardoso Lopes
e29f37f6a1
Add missing AVX convert instructions. Those instructions are not described in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 21:37:59 +00:00
Bruno Cardoso Lopes
cf6ca03128
Add AVX only vzeroall and vzeroupper instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 08:56:24 +00:00
Bruno Cardoso Lopes
7d7d15a159
Add new AVX vpermilps, vpermilpd and vperm2f128 instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 03:07:42 +00:00
Bruno Cardoso Lopes
4b13f3cf3d
Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to support it
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-21 02:46:58 +00:00
Bruno Cardoso Lopes
1154f426d7
Add new AVX vextractf128 instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 23:19:02 +00:00
Matt Fleming
a7f9563c01
Include some tests for the recently committed ELF section directive
...
handlers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 21:37:30 +00:00
Bruno Cardoso Lopes
e1c29be6f0
Add new AVX instruction vinsertf128
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 19:44:51 +00:00
Bruno Cardoso Lopes
7a2b701ef6
x86_32 tests for vbroadcast
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 00:11:50 +00:00
Bruno Cardoso Lopes
43945d99de
Add AVX vbroadcast new instruction
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-20 00:11:13 +00:00
Bruno Cardoso Lopes
94143ee625
Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 23:32:44 +00:00
Daniel Dunbar
77e2dd7bb2
X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the same
...
instruction, we only want to allow the one for the current subtarget.
- This also fixes suffix matching for jmp instructions, because it eliminates
the ambiguity between 'jmpl' and 'jmpq'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 20:44:16 +00:00
Daniel Dunbar
926f2bb3d8
X86-64: Mark WINCALL and more tail call instructions as code gen only.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108685 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 07:21:07 +00:00
Daniel Dunbar
90b374cded
MC/X86: We now match instructions like "incl %eax" correctly for the arch we are
...
assembling; remove crufty custom cleanup code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 06:14:54 +00:00
Daniel Dunbar
9ece46d172
tests: Force another triple.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108666 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-19 00:43:58 +00:00
Daniel Dunbar
030794bd87
tests: Force triples.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108658 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 21:16:10 +00:00
Daniel Dunbar
6a46d571b4
MC/AsmParser: Fix .abort and .secure_log_unique to accept arbitrary token
...
sequences, not just strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108655 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 20:15:59 +00:00
Daniel Dunbar
7a570d09ac
MC/AsmParser: Add macro argument substitution support.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108654 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 19:00:10 +00:00
Daniel Dunbar
c64a0d7c3e
MC/AsmParser: Add basic support for macro instantiation.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108653 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 18:54:11 +00:00
Daniel Dunbar
6d8cf082f6
MC/AsmParser: Add basic parsing support for .macro definitions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108652 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 18:47:21 +00:00
Daniel Dunbar
3c802de01a
MC/AsmParser: Add .macros_{off,on} support, not that makes sense since we don't
...
support macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108649 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-18 18:38:02 +00:00
Eli Friedman
879259faa3
Test for ELF .size directive.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108607 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-17 03:15:24 +00:00
Bruno Cardoso Lopes
7dbf7d8b1c
Add AVX 256-bit compare instructions and a bunch of testcases
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108286 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 22:06:38 +00:00
Bruno Cardoso Lopes
87a85c7ef0
AVX 256-bit conversion instructions
...
Add the x86 VEX_L form to handle special cases where VEX_L must be set.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108274 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 21:07:28 +00:00
Chris Lattner
37a746bc85
my work on adding segment registers to LEA missed the
...
disassembler. Remove some code from the disassembler to
compensate, unbreaking disassembly of lea's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108226 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 04:23:55 +00:00
Bruno Cardoso Lopes
fd920fa59a
Add AVX 256-bit packed logical forms
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108224 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 02:38:35 +00:00
Bruno Cardoso Lopes
6991623dd7
Add AVX 256-bit unop arithmetic instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108223 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-13 01:53:31 +00:00
Bruno Cardoso Lopes
a0d09a85e2
Add AVX 256 binary arithmetic instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108207 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 23:04:15 +00:00
Bruno Cardoso Lopes
aa099be71f
Add AVX 256-bit MOVMSK forms
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108184 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 20:06:32 +00:00
Daniel Dunbar
b6c3a607ac
MC/AsmParser: Move .tbss and .zerofill parsing to Darwin specific parser.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108180 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 19:37:35 +00:00
Daniel Dunbar
492b7a21cb
MC/AsmParser: Move .desc parsing to Darwin specific parser.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108179 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 19:22:53 +00:00
Daniel Dunbar
9ac66b008d
MC/AsmParser: Move some misc. Darwin directive handling to DarwinAsmParser.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-12 18:49:22 +00:00
Bruno Cardoso Lopes
d52e78efac
Add AVX 256-bit packed MOVNT variants
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:42:42 +00:00
Bruno Cardoso Lopes
2bfb8f6ef8
Add AVX 256-bit unpack and interleave
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:20:35 +00:00
Bruno Cardoso Lopes
e86b01c153
Start the support for AVX instructions with 256-bit %ymm registers. A couple of
...
notes:
- The instructions are being added with dummy placeholder patterns using some 256
specifiers, this is not meant to work now, but since there are some multiclasses
generic enough to accept them, when we go for codegen, the stuff will be already
there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:27:43 +00:00
Chris Lattner
834df19452
Rework segment prefix emission code to handle segments
...
in memory operands at the same type as hard coded segments.
This fixes problems where we'd emit the segment override after
the REX prefix on instructions like:
mov %gs:(%rdi), %rax
This fixes rdar://8127102. I have several cleanup patches coming
next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-08 22:28:12 +00:00
Chris Lattner
9fc05227a2
Implement the major chunk of PR7195: support for 'callw'
...
in the integrated assembler. Still some discussion to be
done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 22:27:31 +00:00
Bruno Cardoso Lopes
cc69e13a36
Add more assembly opcodes for SSE compare instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107823 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 22:24:03 +00:00
Bruno Cardoso Lopes
ced9ec9bac
Add AVX AES instructions
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107798 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-07 18:24:20 +00:00