Commit Graph

1933 Commits

Author SHA1 Message Date
Chris Lattner
7a3c85583d remove misleading comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42970 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 20:35:12 +00:00
Chris Lattner
fb5b11046b If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
without lo/hi set.  Fall through to making a libcall instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42969 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 18:35:05 +00:00
Dale Johannesen
5927d8e94d Disable some compile-time optimizations on PPC
long double.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 01:56:47 +00:00
Chris Lattner
e33544ce55 Enhance the truncstore optimization code to handle shifted
values and propagate demanded bits through them in simple cases.

This allows this code:
void foo(char *P) {
   strcpy(P, "abc");
}
to compile to:

_foo:
        ldrb r3, [r1]
        ldrb r2, [r1, #+1]
        ldrb r12, [r1, #+2]!
        ldrb r1, [r1, #+1]
        strb r1, [r0, #+3]
        strb r2, [r0, #+1]
        strb r12, [r0, #+2]
        strb r3, [r0]
        bx lr

instead of:

_foo:
        ldrb r3, [r1, #+3]
        ldrb r2, [r1, #+2]
        orr r3, r2, r3, lsl #8
        ldrb r2, [r1, #+1]
        ldrb r1, [r1]
        orr r2, r1, r2, lsl #8
        orr r3, r2, r3, lsl #16
        strb r3, [r0]
        mov r2, r3, lsr #24
        strb r2, [r0, #+3]
        mov r2, r3, lsr #16
        strb r2, [r0, #+2]
        mov r3, r3, lsr #8
        strb r3, [r0, #+1]
        bx lr

testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll

This also helps occasionally for X86 and other cases not involving 
unaligned load/stores.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 06:58:48 +00:00
Chris Lattner
2b4c279a8e Add a simple optimization to simplify the input to
truncate and truncstore instructions, based on the 
knowledge that they don't demand the top bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42952 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 06:35:54 +00:00
Arnold Schwaighofer
48abc5cf6b Corrected many typing errors. And removed 'nest' parameter handling
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Dale Johannesen
f646774edd ppc long double. Implement fabs and fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 19:02:17 +00:00
Dale Johannesen
6e63e09236 Implement i64->ppcf128 conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42919 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 17:52:03 +00:00
Dan Gohman
a9b511187b Fix some corner cases with vectors in copyToRegs and copyFromRegs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42907 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:33:11 +00:00
Dan Gohman
9e04c82c0e Add support to SplitVectorOp for powi, where the second operand
is a scalar integer.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42906 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:13:46 +00:00
Evan Cheng
32dfbeada7 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:50:34 +00:00
Dale Johannesen
ca68aaa0e5 PPC long double. Implement a couple more conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42888 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 01:37:08 +00:00
Dan Gohman
ac9385a555 Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
may be overloaded with vector types. And add a testcase for codegen for
these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42885 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 00:01:22 +00:00
Dan Gohman
8266952813 Codegen support for vector intrinsics.
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.

Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42884 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:57:53 +00:00
Dale Johannesen
fcf4d24ffb Implement ppc long double->uint conversion.
Make ppc long double constants print.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42882 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:32:15 +00:00
Dan Gohman
e54be10418 Add runtime library names for pow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:09:10 +00:00
Dan Gohman
07f04fd574 Add an ISD::FPOW node type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42879 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:06:37 +00:00
Arnold Schwaighofer
c85e1716f0 Added tail call optimization to the x86 back end. It can be
enabled by passing -tailcallopt to llc.  The optimization is
performed if the following conditions are satisfied:
* caller/callee are fastcc
* elf/pic is disabled OR
  elf/pic enabled + callee is in module + callee has
  visibility protected or hidden


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42870 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 19:40:01 +00:00
Dale Johannesen
a471c2ecda Next PPC long double bits. First cut at constants.
No compile-time support for constant operations yet,
just format transformations.  Make readers and
writers work.  Split constants into 2 doubles in
Legalize.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42865 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 18:07:22 +00:00
Duncan Sands
272dce0137 Correct swapped arguments to getConstant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42824 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10 09:54:50 +00:00
Dale Johannesen
6eaeff29b8 Next PPC long double bits: ppcf128->i32 conversion.
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42822 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-10 01:01:31 +00:00
Dan Gohman
525178cdbf Migrate X86 and ARM from using X86ISD::{,I}DIV and ARMISD::MULHILO{U,S} to
use ISD::{S,U}DIVREM and ISD::{S,U}MUL_HIO. Move the lowering code
associated with these operators into target-independent in LegalizeDAG.cpp
and TargetLowering.cpp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42762 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 18:33:35 +00:00
Dan Gohman
389079b59f DAGCombiner support for UDIVREM/SDIVREM and UMUL_LOHI/SMUL_LOHI.
Check if one of the two results unneeded so see if a simpler operator
could bs used. Also check to see if each of the two computations could be
simplified if they were split into separate operators. Factor out the code
that calls visit() so that it can be used for this purpose.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42759 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 17:57:15 +00:00
Dan Gohman
08ce976971 Add convenience overloads of SelectionDAG::getNode that take a SDVTList
and individual SDOperand operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42753 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 15:49:58 +00:00
Dan Gohman
417e11b9bf In -debug mode, dump SelectionDAGs both before and after the
optimization passes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42749 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-08 15:12:17 +00:00
Neil Booth
ccf596a53e convertFromInteger, as originally written, expected sign-extended
input.  APInt unfortunately zero-extends signed integers, so Dale
modified the function to expect zero-extended input.  Make this
assumption explicit in the function name.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42732 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-07 11:45:55 +00:00
Evan Cheng
513da43c9c Reapply 42677.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42692 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 08:19:55 +00:00
Chris Lattner
5349de1372 revert evan's patch until the header is committed
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42686 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 06:08:17 +00:00
Evan Cheng
c231e8c8a5 Added DAG xforms. e.g.
(vextract (v4f32 s2v (f32 load $addr)), 0) -> (f32 load $addr) 
(vextract (v4i32 bc (v4f32 s2v (f32 load $addr))), 0) -> (i32 load $addr)
Remove x86 specific patterns.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42677 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 02:46:29 +00:00
Dale Johannesen
638ccd52b9 Next powerpc long double bits. Comparisons work,
although not well, and shortening FP converts.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42672 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-06 01:24:11 +00:00
Dale Johannesen
161e897b0f First round of ppc long double. call/return and
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42644 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 20:04:43 +00:00
Dan Gohman
e14ea86744 Legalize support for MUL_LOHI and DIVREM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42636 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 14:17:22 +00:00
Dan Gohman
2eb4ebd953 Fix a typo in a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42635 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 14:11:58 +00:00
Dan Gohman
ccd60799cd Provide names for MUL_LOHI and DIVREM operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42634 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 14:11:04 +00:00
Evan Cheng
d5cb5a462b Chain producing nodes cannot be moved, not chain reading nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42627 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:42:35 +00:00
Evan Cheng
117c366219 Oops. Didn't mean to leave this in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42626 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:39:40 +00:00
Evan Cheng
f10c973797 If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42625 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:39:18 +00:00
Evan Cheng
39305cf553 Add a variant of getTargetNode() that takes a vector of MVT::ValueType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42620 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:10:49 +00:00
Evan Cheng
daccea18ca Silence a warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42619 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-05 01:09:32 +00:00
Dan Gohman
cb406c2597 Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42585 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-03 19:26:29 +00:00
Dale Johannesen
9ab7fb3ba4 Rewrite sqrt and powi to use anyfloat. By popular demand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42537 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-02 17:43:59 +00:00
Dale Johannesen
a7ac2bd407 Fix stride computations for long double arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42508 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 23:08:35 +00:00
Evan Cheng
450ff01faf Remove simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42499 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-01 20:44:07 +00:00
Dale Johannesen
d89b117850 remove dup comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42486 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-30 19:08:12 +00:00
Dale Johannesen
88216af3ea Constant fold int-to-long-double conversions;
use APFloat for int-to-float/double; use
round-to-nearest for these (implementation-defined,
seems to match gcc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-30 18:19:03 +00:00
Dan Gohman
9fe4662d9a Teach SplitVectorOp how to split INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42457 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 23:53:40 +00:00
Evan Cheng
22a529990b If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42453 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 22:32:30 +00:00
Evan Cheng
ddde335cb7 Remove a poor scheduling heuristic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42443 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 19:37:35 +00:00
Evan Cheng
74d2fd8dd8 Trim some unneeded fields.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42442 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 19:24:24 +00:00
Dale Johannesen
72292f0712 Fix long double -> uint64 conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42440 91177308-0d34-0410-b5e6-96231b3b80d8
2007-09-28 18:44:17 +00:00