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18484 Commits

Author SHA1 Message Date
Cameron Zwarich
de64aaf6c8 Fix the remaining atomic intrinsics to use the right register classes on Thumb2, 
and add some basic tests for them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132235 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 23:54:00 +00:00
Bruno Cardoso Lopes
be64b39431 ARM asm parser wasn't able to parse a "mov" instruction while in Thumb 
mode (only the "mov.w" variant). Now, when parsing "mov" in thumb mode,
default to the Thumb 1 versions/encodings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132233 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 23:46:09 +00:00
Rafael Espindola
157371f376 It looks like 132187 might have broken the llvm-gcc bootstrap. Revert while I check. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132230 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 23:36:02 +00:00
Cameron Zwarich
f5e771db37 Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass() 
was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132225 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 22:26:04 +00:00
Rafael Espindola
5b23b7fe31 Make size computation less brittle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 22:05:41 +00:00
Evan Cheng
4abce0c90b Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132211 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 20:11:27 +00:00
Jakob Stoklund Olesen
11f6cc96bf Delete MethodBodies that only filtered reserved registers. 
The register allocators know to filter reserved registers from the allocation
orders, so we don't need all of this boilerplate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132199 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 18:27:13 +00:00
Eli Friedman
a4d487fc1e Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 18:02:04 +00:00
Rafael Espindola
25b15d8502 Remove DwarfRegNum from the individual bits of the condition register. 
These should be DW_OP_bit_piece of CR (64).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132192 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 16:15:27 +00:00
Rafael Espindola
81a2745830 Remove DwarfRegNum from CARRY. I should be encoded with DW_OP_bit_piece. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132190 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 16:01:08 +00:00
Rafael Espindola
81e193cc1f Remove dwarf numbers from subregs. We should use DW_OP_bit_piece to 
refer to them.

I tested this with both check-all and the gdb testsuite.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132187 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 15:08:24 +00:00
Eric Christopher
33281b2361 Make the branch encoding for tBcc more obvious that it's a 4-byte opcode 
followed by a conditional and imm8.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132179 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 03:50:53 +00:00
Eric Christopher
86bbcbf4b0 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132178 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-27 03:46:51 +00:00
Chad Rosier
62660310d9 Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist. 
crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 23:13:19 +00:00
Akira Hatanaka
33458fedb6 Use MachineFrameInfo::hasCalls instead of MipsFunctionInfo::hasCall to check if 
a function has any function calls.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132140 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 20:30:31 +00:00
Rafael Espindola
a5e62019d7 Fix some dwarf register numbers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132136 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 19:25:47 +00:00
Akira Hatanaka
cf0cd8005c Add support for C++ exception handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132131 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 18:59:03 +00:00
Eric Christopher
32bfb2c513 Reorganize these slightly according to operand type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132128 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 18:22:26 +00:00
Akira Hatanaka
78e72d60ec Set HasSetDirective to true. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132127 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 18:16:18 +00:00
Stuart Hastings
2aa0f23e1c Reverting 132105: it broke some LLVM-GCC DejaGNU tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132108 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 04:09:49 +00:00
Cameron Zwarich
421b106872 Mark tBX as an indirect branch rather than a return. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 03:41:12 +00:00
Stuart Hastings
aa4e6afc9b Correctly handle a one-word struct passed byval on x86_64. 
rdar://problem/6920088


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 02:44:56 +00:00
Eli Friedman
76927d7303 Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 23:49:02 +00:00
Akira Hatanaka
37d22d92df Define WeakRefDirective. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132098 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 23:30:30 +00:00
Cameron Zwarich
ad70f6d2b1 Convert tBX_CALL / tBXr9_CALL to actual pseudoinstructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132086 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 21:53:50 +00:00
Eric Christopher
7bb1c40549 Clean up comment a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132083 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 21:19:19 +00:00
Eric Christopher
8f89463894 Implement the 'm' modifier. Note that it only works for memory operands. 
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 20:51:58 +00:00
Akira Hatanaka
d85b3ecbb3 Remove MipsTargetLowering::LowerFP_TO_SINT. Patterns for fp_to_sint have already 
been defined in MipsInstrFPU.td.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132076 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 20:08:05 +00:00
Akira Hatanaka
9c3d57c45e Custom-lower FCOPYSIGN nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 19:32:07 +00:00
Eli Friedman
783c66414a Prepare ARMFastISel::SelectSIToFP for getRegForValue returning registers for i8 and i16 values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132073 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 19:09:45 +00:00
Akira Hatanaka
4c62f765a3 Update MaxCallFrameSize regardless of the relocation model selected. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132070 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 18:08:32 +00:00
Akira Hatanaka
f15f498507 Change initial value of MaxCallFrameSize. MipsFI::getMaxCallFrameSize() should 
return 0 if there are no function calls made. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132065 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 17:52:48 +00:00
Akira Hatanaka
edacba83dc Coding style fixes. Added comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132063 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 17:32:06 +00:00
Francois Pichet
1b47720391 Remove unused OpcodeMask enumerator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132062 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 17:02:53 +00:00
Francois Pichet
d9e57c146d Fix MSVC warning: "is out of range for enum constant" 
MSVC doesn't support 64 bit enum. 
OpcodeMask is not used anywhere in the code base.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132057 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 15:58:10 +00:00
Cameron Zwarich
da86a08284 Restore an accidentally removed comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:48:17 +00:00
Cameron Zwarich
8e9bace414 Move some code to a more logical place. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132043 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:29 +00:00
Cameron Zwarich
106acd4158 Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. This 
fixes <rdar://problem/9495913>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:27 +00:00
Cameron Zwarich
328634598f Change the order of tBX's operands so that the predicate operands come after the 
target register, matching BX. I filed this bug because I was confused at first:

PR10007 - ARM branch instructions have inconsistent predicate operand placement
<http://llvm.org/bugs/show_bug.cgi?id=10007>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132041 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:23 +00:00
Cameron Zwarich
8f161c3a95 Rename tBX_Rm to tBX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:20 +00:00
Cameron Zwarich
b36c1ae6d5 Rename the existing tBX/tBXr9 instructions to tBX_CALL/tBXr9_CALL to better 
reflect their actual meaning and match the ARM instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132039 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 04:45:14 +00:00
Rafael Espindola
fc2bb8c444 Replace the -unwind-tables option with a per function flag. This is more 
LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132033 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 03:44:17 +00:00
Akira Hatanaka
053546c31e Fix lowering of DYNAMIC_STACKALLOC nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 02:20:00 +00:00
Bruno Cardoso Lopes
56926a3961 Fix PR9762 
Enable the parsing of the operand "cpsr_all" for the ARM msr instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132026 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 00:35:03 +00:00
Eric Christopher
4db7dec70b Implement the arm 'L' asm modifier. 
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 23:27:13 +00:00
Eric Christopher
e1739d598d Implement the immediate part of the 'B' modifier. 
Part of rdar://9119939


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 23:15:43 +00:00
Eric Christopher
fef50062ea Add more unimplemented asm modifiers and some documentation of what they 
do.

Part of rdar://9119939.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 22:27:43 +00:00
Eric Christopher
0628d38085 Add support for the arm 'y' asm modifier. 
Fixes part of rdar://9444657


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 22:10:34 +00:00
Akira Hatanaka
ce98deb9f5 Enable printing of immediates that do not fit in 16-bit. .cprestore can have 
offsets that are larger than 0x10000.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132003 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 21:22:21 +00:00
Akira Hatanaka
4231c7ea6d Implement byval structure argument passing. The following limitations or 
deficiencies exist:

- Works only if ABI is o32.
- Zero-sized structures cannot be passed.
- There is a lot of redundancy in generated code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131986 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 19:18:33 +00:00