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Author SHA1 Message Date
Devang Patel
3f932a74be Simplify array bound checks and clarify comments. One element array can have same non-zero number as lower bound as well as upper bound. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129170 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 23:39:38 +00:00
Nick Lewycky
918035f802 Add a function for profiling to run at shutdown. Unlike the existing API, this 
can be used even when main() isn't present in the Module, but it means that you
don't get to read argv[].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 22:19:52 +00:00
Matt Beaumont-Gay
7c90e46622 Fix an apparent typo that made GCC complain 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129160 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 21:59:49 +00:00
Devang Patel
fb6e8d6554 Do not emit DW_AT_upper_bound and DW_AT_lower_bound for unbouded array. 
If lower bound is more then upper bound then consider it is an unbounded array.
An array is unbounded if non-zero lower bound is same as upper bound.
If lower bound and upper bound are zero than array has one element.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129156 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 21:55:10 +00:00
Evan Cheng
4da0c7c0c9 Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is lowered into a call to the specified trap function at sdisel time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129152 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 21:37:21 +00:00
Jim Grosbach
e2e777b0e7 Workaround g++ 4.2.1 warning diagnostic false positive. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129149 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 21:11:20 +00:00
Johnny Chen
ee10b13a44 Check opcoe (dmb, dsb) instead of bitfields matching. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129148 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 20:03:46 +00:00
Johnny Chen
c636074afc Hanlde the checking of bad regs for SMMLAR properly, instead of asserting. 
PR9650
rdar://problem/9257565


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129147 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 19:41:22 +00:00
Johnny Chen
40de2b3f15 Sanity check the option operand for DMB/DSB. 
PR9648
rdar://problem/9257634


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129146 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 19:18:07 +00:00
Jim Grosbach
5b03a3a59a Mark hasExtraDefRegAllocReq=1 on LDRD. 
The previous cleanup of LDRD got overzealous and removed it, causing post-RA
scheduling to get overzealous in breaking antidependencies and invalidate these instructions. Hilarity and invalid assembly ensued.

rdar://9244161


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129144 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 18:47:05 +00:00
Jim Grosbach
b027105fa5 Refactor MCJIT 32-bit section loading. 
Teach 32-bit section loading to use the Memory Manager interface, just like
the 64-bit loading does. Tidy up a few other things here and there.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129138 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 17:31:24 +00:00
Nick Lewycky
2c44a80d99 llvm.global_[cd]tor is defined to be either external, or appending with an array 
of { i32, void ()* }. Teach the verifier to verify that, deleting copies of
checks strewn about.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129128 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 07:30:21 +00:00
Johnny Chen
97fdff1d3f Add sanity checking for bad register specifier(s) for the DPFrm instructions. 
Add more test cases to exercise the logical branches related to the above change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129117 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-08 00:29:09 +00:00
Rafael Espindola
d5321da8d2 Micro optimization and improved similarity with gas' output: 
When two section names share a suffix, reuse the entry in shstrtab.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129115 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 23:21:52 +00:00
Devang Patel
60d490cdc7 Do not let debug info interfer with branch folding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129114 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 23:11:25 +00:00
Bill Wendling
44dcfd3625 Replace the old algorithm that emitted the "print the alias for an instruction" 
with the newer, cleaner model. It uses the IAPrinter class to hold the
information that is needed to match an instruction with its alias. This also
takes into account the available features of the platform.

There is one bit of ugliness. The way the logic determines if a pattern is
unique is O(N**2), which is gross. But in reality, the number of items it's
checking against isn't large. So while it's N**2, it shouldn't be a massive time
sink.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129110 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 21:20:06 +00:00
Evan Cheng
274d8d4eba Add option to emit @llvm.trap as a function call instead of a trap instruction. rdar://9249183. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129107 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 20:31:12 +00:00
Rafael Espindola
ce8463f1fb Add support for .skip. 
Patch by Roman Divacky.
Fixes PR9361.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129106 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 20:26:23 +00:00
Akira Hatanaka
8d580659f9 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 20:25:10 +00:00
Akira Hatanaka
3f92b439d9 Update ATUsed every time after expandRegLargeImmPair is called. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129104 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 20:23:26 +00:00
Mon P Wang
e32cdef38e Fixed encoding for VEXTqf 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129101 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:56:12 +00:00
Andrew Trick
5469976506 Added a check in the preRA scheduler for potential interference on a 
induction variable. The preRA scheduler is unaware of induction vars,
so we look for potential "virtual register cycles" instead.

Fixes <rdar://problem/8946719> Bad scheduling prevents coalescing


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129100 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:54:57 +00:00
Akira Hatanaka
9777e7afd4 Fix handling of functions with internal linkage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129099 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:51:44 +00:00
Johnny Chen
22dc4d9f59 Add sanity checking for invalid register encodings for signed/unsigned extend instructions. 
Add some test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129098 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:28:58 +00:00
Johnny Chen
8dbda0b51b Add sanity checking for invalid register encodings for saturating instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129096 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 19:02:08 +00:00
Jakob Stoklund Olesen
e815dab69f Recompute hasPHIKill flags when shrinking live intervals. 
PHI values may be deleted, causing the flags to be wrong. This fixes PR9616.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129092 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 18:43:14 +00:00
Johnny Chen
4d4e25740b Add some more comments about checkings of invalid register numbers. 
And two test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129090 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 18:33:19 +00:00
Rafael Espindola
45e1a53efd Expose more passes to the C API. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129087 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 18:20:46 +00:00
Jakob Stoklund Olesen
f34ae32a6b Avoid moving iterators when the previous block was just visited. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129081 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:50 +00:00
Jakob Stoklund Olesen
0bd2bd9ecc Prefer multiplications to divisions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129080 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:48 +00:00
Jakob Stoklund Olesen
7b41fbe872 Extract SpillPlacement::addLinks for handling the special transparent blocks. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129079 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:46 +00:00
Devang Patel
949666ea16 While hoisting common code from if/else, hoist debug info intrinsics if they match. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129078 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 17:27:36 +00:00
Tanya Lattner
0433b21c98 Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector type (vectors of size 3). Also included test cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129074 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 15:24:20 +00:00
Sean Callanan
5c3a245f3c Fixed a bug where missing EDInstInfo would cause 
tokenization to crash and burn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129051 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:56:01 +00:00
Johnny Chen
f16f4e09ec Sanity check MSRi for invalid mask values and reject it as invalid. 
rdar://problem/9246844


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129050 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:37:34 +00:00
Eli Friedman
0e382192c1 PR9634: Don't unconditionally tell the AliasSetTracker that the PreheaderLoad 
is equivalent to any other relevant value; it isn't true in general.
If it is equivalent, the LoopPromoter will tell the AST the equivalence.
Also, delete the PreheaderLoad if it is unused.

Chris, since you were the last one to make major changes here, can you check
that this is sane?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129049 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:35:06 +00:00
Johnny Chen
8424a60fc9 The ARM disassembler was not recognizing USADA8 instruction. Need to add checking for register values 
for USAD8 and USADA8.

rdar://problem/9247060


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 01:05:52 +00:00
Evan Cheng
2c69f8eec6 Change -arm-divmod-libcall to a target neutral option. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129045 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:58:44 +00:00
Evan Cheng
1adb47cc11 Remove dead code. rdar://9221736. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129044 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:56:37 +00:00
Johnny Chen
2455268cdd Should also check SMLAD for invalid register values. 
rdar://problem/9246650


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129042 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:50:25 +00:00
Devang Patel
ae6c95b58e Simplify. isIdenticalToWhenDefined() checks opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129041 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:30:15 +00:00
Nick Lewycky
84025ba08f Set unnamed_addr on strings created through the IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-07 00:14:29 +00:00
Owen Anderson
df298c9ea6 Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for folded comparisons, just like ADD and SUB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129038 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 23:35:59 +00:00
Owen Anderson
ef7fb17936 Cleanups from Jim: remove redundant constraints and a dead FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129036 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:45:55 +00:00
Devang Patel
d418194036 While folding branch to a common destination into a predecessor, copy dbg values also. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129035 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:37:20 +00:00
Jim Grosbach
f22eefba68 Tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129034 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:35:47 +00:00
Johnny Chen
d8b4c4d74f A8.6.393 
The ARM disassembler should reject invalid (type, align) encodings as invalid instructions.

So, instead of:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

	vst2.32	{d0, d2}, [r3, :256], r3

we now have:
Opcode=1641 Name=VST2b32_UPD Format=ARM_FORMAT_NLdSt(30)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 1| 0: 1: 0: 0| 0: 0: 0: 0| 0: 0: 1: 1| 0: 0: 0: 0| 1: 0: 0: 1| 1: 0: 1: 1| 0: 0: 1: 1|
-------------------------------------------------------------------------------------------------

mc-input.txt:1:1: warning: invalid instruction encoding
0xb3 0x9 0x3 0xf4
^


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129033 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:14:48 +00:00
Jim Grosbach
01ccab4012 tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129032 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 22:13:52 +00:00
Jakob Stoklund Olesen
9a54352879 Also account for the spill code that would be inserted in live-through blocks with interference. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129030 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 21:32:41 +00:00
Jakob Stoklund Olesen
1b400e840f Abort the constraint calculation early when all positive bias is lost. 
Without any positive bias, there is nothing for the spill placer to to. It will
spill everywhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129029 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 21:32:38 +00:00
Johnny Chen
4d81c9a6ba A8.6.92 MCR (Encoding A1): if coproc == '101x' then SEE "Advanced SIMD and VFP" 
Since these "Advanced SIMD and VFP" instructions have more specfic encoding bits
specified, if coproc == 10 or 11, we should reject the insn as invalid.

rdar://problem/9239922
rdar://problem/9239596


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129027 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:49:02 +00:00
Nick Lewycky
a040d47c74 Fix comment to use llvm 2.x syntax. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129025 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:38:44 +00:00
Nick Lewycky
ec5d1800f9 Replace const std::vector& with ArrayRef in the type creation APIs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129024 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 20:28:34 +00:00
Jakob Stoklund Olesen
70d4370b47 Keep track of the number of positively biased nodes when adding constraints. 
If there are no positive nodes, the algorithm can be aborted early.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129021 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 19:14:00 +00:00
Jakob Stoklund Olesen
9efa2a263e Break the spill placement algorithm into three parts: prepare, addConstraints, and finish. 
This will allow us to abort the algorithm early if it is determined to be futile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129020 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 19:13:57 +00:00
Johnny Chen
a9611549fe Fix a bug in the disassembly of VGETLNs8 where the lane index was wrong. 
Also set the encoding bits (for A8.6.303, A8.6.328, A8.6.329) Inst{3-0} = 0b0000,
in class NVLaneOp.

rdar://problem/9240648


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129015 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 18:27:46 +00:00
Rafael Espindola
3d195faaad Add another case we are not optimizing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129012 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 17:35:32 +00:00
Rafael Espindola
8617897aaa The original issue has been fixed by not doing unnecessary sign extensions. 
Change the test to force a sign extension and expose the problem again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129011 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 17:19:35 +00:00
Devang Patel
f3480a8015 face+palm 
Keep track of llvm.dbg.value intrinsics with non null values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129010 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 17:08:15 +00:00
Rafael Espindola
f5a90561b0 Do a topological sort of the types before writing them out. 
This takes the linking of libxul on linux from 6m54.931s to 5m39.840s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129009 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 16:49:37 +00:00
Frits van Bommel
090771fa26 Fix a few instances of "warning: extra ';' outside of a function [-pedantic]". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129002 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 12:29:56 +00:00
Nick Lewycky
4841121580 Add an empty key for DebugLoc so that you can store an empty DebugLoc in a 
DenseMap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128994 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 06:49:59 +00:00
Nick Lewycky
af4db5fc95 Support using DebugLoc's in a DenseMap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128988 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 05:36:52 +00:00
Jakob Stoklund Olesen
49460bc499 Oops. Scary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128986 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 04:07:14 +00:00
Jakob Stoklund Olesen
db529a8a5d Analyze blocks with uses separately from live-through blocks without uses. 
About 90% of the relevant blocks are live-through without uses, and the only
information required about them is their number. This saves memory and enables
later optimizations that need to look at only the use-blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128985 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 03:57:00 +00:00
Johnny Chen
6a1220eeca Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function. 
Add more complete sanity check for LdStFrm instructions where if IBit (Inst{25})
is 1, Inst{4} should be 0.  Otherwise, we should reject the insn as invalid.

rdar://problem/9239347
rdar://problem/9239467


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128977 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 01:18:32 +00:00
Jim Grosbach
c41ab789a0 RuntimeDyld should use the memory manager API. 
Start teaching the runtime Dyld interface to use the memory manager API
for allocating space. Rather than mapping directly into the MachO object,
we extract the payload for each object and copy it into a dedicated buffer
allocated via the memory manager. For now, just do Segment64, so this works
on x86_64, but not yet on ARM.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128973 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-06 01:11:05 +00:00
Owen Anderson
b48c791515 Reapply r128946 (pseudoization of various instructions), and fix the extra imp-def of CPSR it was adding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128965 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:55:28 +00:00
Chandler Carruth
53c5e7b2e7 Make the virtual destructor out-of-line so we have a key function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128964 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:54:31 +00:00
Jakob Stoklund Olesen
71d9e65ee7 Sign error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128963 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:43:16 +00:00
Jakob Stoklund Olesen
b3dd82670a Don't crash when a value is defined after the last split point. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128962 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:43:14 +00:00
Jakob Stoklund Olesen
3e22897fa9 Permit blocks to branch directly to a landing pad. 
Treat the landing pad as a normal successor when that happens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128961 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:43:11 +00:00
Jim Grosbach
caf767bb02 Remove extraneous 'return'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128959 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:39:08 +00:00
Johnny Chen
2c868d1eef Fix a typo in the handling of PKHTB opcode, plus add sanity check for illegal register 
encodings for DisassembleArithMiscFrm().

rdar://problem/9238659


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128958 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:28:00 +00:00
Bob Wilson
61f3cf3bc9 Clean up some code for clarity. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:03:25 +00:00
Owen Anderson
493cba1b32 Revert r128946 while I figure out why it broke the buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128951 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 23:03:06 +00:00
Johnny Chen
c3281c10c9 A7.3 register encoding 
Qd -> bit[12] == 0
    Qn -> bit[16] == 0
    Qm -> bit[0]  == 0

If one of these bits is 1, the instruction is UNDEFINED.

rdar://problem/9238399
rdar://problem/9238445


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128949 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:57:07 +00:00
Devang Patel
da19475328 Add support to encode function's template parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128947 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:52:06 +00:00
Owen Anderson
76634dfabb Give RSBS and RSCS the pseudo treatment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128946 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:42:54 +00:00
Johnny Chen
5438d76416 ARM disassembler was erroneously accepting an invalid RSC instruction. 
Added checks for regs which should not be 15.

rdar://problem/9237734


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128945 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 22:18:07 +00:00
Chris Lattner
1a8b9dd7fb remove postdom frontiers, because it is dead. Forward dom frontiers are 
still used by RegionInfo :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128943 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:57:17 +00:00
Johnny Chen
c584e317e9 ARM disassembler was erroneously accepting an invalid LSL instruction. 
For register-controlled shifts, we should check that the encoding constraint
Inst{7} = 0 and Inst{4} = 1 is satisfied.

rdar://problem/9237693


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128941 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:49:44 +00:00
Owen Anderson
7670601313 Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doing the expansion earlier (using a custom inserter) to allow for the chance of predicating these instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128940 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:48:57 +00:00
Jakob Stoklund Olesen
cfafc54040 Run LiveDebugVariables in RegAllocBasic and RegAllocGreedy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128935 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:40:37 +00:00
Devang Patel
b4c2bc2543 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 21:08:24 +00:00
Bob Wilson
bdaa9dc4a4 Add an assertion instead of crashing when the scavenger goes past the end 
of a basic block.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128925 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:44:15 +00:00
Nick Lewycky
06d2b4223f Fix typos. Adjust some whitespace for style. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128924 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:39:27 +00:00
Johnny Chen
2c2130bc64 The r128085 checkin modified the operand ordering for MRC/MRC2 instructions. 
Modify DisassembleCoprocessor() of ARMDisassemblerCore.cpp to react to the change.

rdar://problem/9236873


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128922 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:32:23 +00:00
Roman Divacky
2a121b92bb Add support for detection of Intel SandyBridge. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128920 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:25:36 +00:00
Jakob Stoklund Olesen
3520019931 When dead code elimination removes all but one use, try to fold the single def into the remaining use. 
Rematerialization can leave single-use loads behind that we might as well fold whenever possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128918 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:20:26 +00:00
Devang Patel
e050f50443 Do not emit empty name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128914 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 20:14:13 +00:00
Johnny Chen
bbc65bbb90 ARM disassembler should flag (rGPRRegClassID, r13|r15) as an error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128913 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 19:42:11 +00:00
Andrew Trick
ce96902d88 Added *hidden* flags -print-options and -print-all-options so 
developers can see if their driver changed any cl::Option's. The
current implementation isn't perfect but handles most kinds of
options. This is nice to have when decomposing the stages of
compilation and moving between different drivers. It's also a good
sanity check when comparing results produced by different command line
invocations that are expected to produce the comparable results.

Note: This is not an attempt to prolong the life of cl::Option. On the
contrary, it's a placeholder for a feature that must exist when
cl::Option is replaced by a more appropriate framework. A new
framework needs: a central option registry, dynamic name lookup,
non-global containers of option values (e.g. per-module,
per-function), *and* the ability to print options values and their defaults at
any point during compilation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128910 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:54:36 +00:00
Shantonu Sen
0da9f13faa An MCDisassembler has the option to not implement 
getEDInfo(), in which case this code would dereference
NULL. EDInst can already handle NULL info, so avoid
the dereference and pass NULL through.

Reviewed by Sean Callanan


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:40:45 +00:00
Jim Grosbach
215e4fdbf9 Make second source operand of LDRD pre/post explicit. 
Finish what r128736 started.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:40:13 +00:00
Johnny Chen
12bb2958c4 Constants with multiple encodings (ARM): 
An alternative syntax is available for a modified immediate constant that permits the programmer to specify
the encoding directly. In this syntax, #<const> is instead written as #<byte>,#<rot>, where:

    <byte> is the numeric value of abcdefgh, in the range 0-255
    <rot> is twice the numeric value of rotation, an even number in the range 0-30.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128897 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 18:02:46 +00:00
Johnny Chen
b26d8d7c49 Check for invalid register encodings for UMAAL and friends where: 
if dLo == 15 || dHi == 15 || n == 15 || m == 15 then UNPREDICTABLE;
    if dHi == dLo then UNPREDICTABLE;

rdar://problem/9230202


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128895 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 17:43:10 +00:00
Owen Anderson
15b81b51d6 Convert ADCS and SBCS instructions into pseudos that are expanded to the ADC/ABC with the appropriate S-bit input value. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 17:24:25 +00:00
Jakob Stoklund Olesen
b793bc1cca Ensure all defs referring to a virtual register are marked dead by addRegisterDead(). 
There can be multiple defs for a single virtual register when they are defining
sub-registers.

The missing <dead> flag was stopping the inline spiller from eliminating dead
code after rematerialization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128888 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 16:53:50 +00:00
Rafael Espindola
8439747236 Print visibility info for external variables. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128887 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-05 15:51:32 +00:00