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Author SHA1 Message Date
Jim Grosbach
81bb6551e6 Remove dead code. These ARM instruction definitions don't exist. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:38:18 +00:00
Jim Grosbach
8b8515c225 ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32q 
and VDUPLN32d, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:31:17 +00:00
Jim Grosbach
1558df79b4 ARM VREV64df and VREV64qf can just be patterns. The instruction is the same 
as for VREV64d32 and VREV64q32, respectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:18:05 +00:00
Jim Grosbach
f0112a224f This FIXME has been fixed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127483 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 20:07:37 +00:00
Jim Grosbach
e672ff8430 Properly pseudo-ize ARM MVNCCi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 19:55:55 +00:00
Jim Grosbach
6a44adade2 Add missing 'return on failure'. Previously we'd crash after emitting 
the diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127480 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 19:52:52 +00:00
Jan Sjödin
e4f6d7461a Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127478 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 19:37:02 +00:00
Daniel Dunbar
950d3db5f4 Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get 
created from the", it broke some GCC test suite tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127477 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 19:30:30 +00:00
Oscar Fuentes
4839ded3bd Force re-linking of LLVMgold.so when its exports file changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127473 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 18:27:13 +00:00
Oscar Fuentes
aa1fbb40ad Fix processing of gold.exports. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127471 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 18:07:46 +00:00
Devang Patel
027f0995d4 While printing annotations, print line number and variable name if debug info is present. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127470 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 18:07:33 +00:00
Jim Grosbach
eb582d7ba2 Fix MOVCCi32imm to be have ARM-mode Requires and a proper size (8 bytes, was 4). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127469 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 18:00:42 +00:00
Andrew Trick
778583ad28 Replace -dag-chain-limit flag with constant. It has survived a release cycle without being touched, so no longer needs to pollute the hidden-help text. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127468 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 17:46:59 +00:00
Oscar Fuentes
1dc550b383 Add LTO and gold plugin to the CMake build. Linux-only, support for 
other systems pending.

PR9456.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127466 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 15:44:24 +00:00
Benjamin Kramer
2715a58149 ComputeMaskedBits: sub falls through to add, and sub doesn't have the same overflow semantics as add. 
Should fix the selfhost failures that started with r127463.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127465 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 14:46:49 +00:00
Benjamin Kramer
6b4972518c InstCombine: Fix a thinko where transform an icmp under the assumption that it's a zero comparison when it's not. 
Fixes PR9454.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127464 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 11:37:40 +00:00
Nick Lewycky
b69050a94c Teach ComputeMaskedBits about nsw on add. I don't think there's anything we can 
do with nuw here, but sub and mul should be given similar treatment.
Fixes PR9343 #15!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127463 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 09:00:19 +00:00
John Wiegley
6fd2472b1b Fix use of CompEnd predicate to be standards conforming 
The existing CompEnd predicate does not define a strict weak order as required
by the C++03 standard; therefore, its use as a predicate to std::upper_bound
is invalid. For a discussion of this issue, see
http://www.open-std.org/jtc1/sc22/wg21/docs/lwg-defects.html#270

This patch replaces the asymmetrical comparison with an iterator adaptor that
achieves the same effect while being strictly standard-conforming by ensuring
an apples-to-apples comparison.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127462 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 08:54:34 +00:00
Cameron Zwarich
592ca3fda9 Optimize trivial branches in CodeGenPrepare, which often get created from the 
lowering of objectsize intrinsics. Unfortunately, a number of tests were relying
on llc not optimizing trivial branches, so I had to add an option to allow them
to continue to test what they originally tested.

This fixes <rdar://problem/8785296> and <rdar://problem/9112893>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127459 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 04:54:27 +00:00
Jim Grosbach
4a6d735105 Teach TableGen to pre-calculate register enum values when creating the 
CodeGenRegister entries. Use this information to more intelligently build
the literal register entires in the DAGISel matcher table. Specifically,
use a single-byte OPC_EmitRegister entry for registers with a value of
less than 256 and OPC_EmitRegister2 entry for registers with a larger value.

rdar://9066491



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127456 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 02:19:02 +00:00
Chris Lattner
109d6dbe50 silence a conditional assignment -Wuninitialized warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127453 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 02:12:51 +00:00
Jim Grosbach
17fad045cc Make the register enum value part of the CodeGenRegister struct. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127448 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:33:54 +00:00
Jim Grosbach
510207cb1e Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127447 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:27:24 +00:00
Jim Grosbach
5d4314ef72 Trailing whitespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127446 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:19:05 +00:00
Jim Grosbach
7e0e82dcd5 Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127445 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:16:49 +00:00
Jim Grosbach
3906276a8d Properly pseudo-ize ARM MOVCCi and MOVCCi16. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127442 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:09:28 +00:00
Eric Christopher
de5e101b0d Change the x86 32-bit scheduler to register pressure and fix up the 
corresponding testcases back to the previous versions.

Fixes some performance regressions only seen on 32-bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127441 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 01:05:58 +00:00
Evan Cheng
9ef82ce4fe Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127440 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-11 00:48:56 +00:00
Jim Grosbach
d4a16ad85d Properly pseudo-ize MOVCCr and MOVCCs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 23:56:09 +00:00
Dan Gohman
c9f2f61d34 RecursivelyDeleteTriviallyDeadInstructions only needs a 
Value, not an Instruction, so casting is not necessary. Also,
it's theoretically possible that the Value is not an
Instruction, since WeakVH follows RAUWs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127427 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 20:57:44 +00:00
Rafael Espindola
9d2234d6a0 Don't compute the file size if we don't need to. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127426 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 20:54:07 +00:00
Dan Gohman
fa0e6facc7 Fix reassociate to postpone certain instruction deletions until 
after it has finished all of its reassociations, because its
habit of unlinking operands and holding them in a datastructure
while working means that it's not easy to determine when an
instruction is really dead until after all its regular work is
done. rdar://9096268.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 19:51:54 +00:00
Jim Grosbach
a4f809d8db DMB can just be a pat referencing MCR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127423 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 19:27:17 +00:00
Jim Grosbach
bc908cfcc1 Reorganize a bit. No functional change, just moving patterns up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127422 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 19:21:08 +00:00
Jim Grosbach
a768c3d45f Pseudo-instructions are codegenonly by definition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127420 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 19:06:39 +00:00
Jim Grosbach
5e97338c8d Memory barrier instructions don't need special handling in tblgen anymore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127419 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 19:05:48 +00:00
Benjamin Kramer
6b96fe7e14 InstCombine: Turn umul_with_overflow into mul nuw if we can prove that it cannot overflow. 
This happens a lot in clang-compiled C++ code because it adds overflow checks to operator new[]:
  unsigned *foo(unsigned n) { return new unsigned[n]; }
We can optimize away the overflow check on 64 bit targets because (uint64_t)n*4 cannot overflow.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127418 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 18:40:14 +00:00
Rafael Espindola
f7fdad15d9 Add r127409 back now that the windows file was updated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127417 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 18:33:29 +00:00
Rafael Espindola
b78e2ae4ca Try to fix the windows build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127416 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 18:30:48 +00:00
Jakob Stoklund Olesen
4b0e1f1278 Revert r127409 which broke all the Windows bots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127413 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 18:01:43 +00:00
Justin Holewinski
fca9efcbc4 PTX: Add preliminary support for floating-point divide and multiply-and-add 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127410 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 16:57:18 +00:00
Rafael Espindola
7deb187736 Add support for MemoryBuffers that are not null terminated and add 
support for creating buffers that cover only a part of a file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127409 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 16:10:30 +00:00
Chris Lattner
be2e1b50c4 rip out llvm 2.8 release notes to make room for llvm 2.9 notes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127399 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 07:43:44 +00:00
Cameron Zwarich
6a951ac63f Add an option to disable critical edge splitting in PHIElimination. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127398 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 05:59:17 +00:00
Che-Liang Chiou
2f5565d21c ptx: add the rest of special registers of ISA version 2.0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127397 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 04:05:57 +00:00
Jakob Stoklund Olesen
47dbf6cef7 Change the Spiller interface to take a LiveRangeEdit reference. 
This makes it possible to register delegates and get callbacks when the spiller
edits live ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127389 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 01:51:42 +00:00
Jakob Stoklund Olesen
38f6bd0fc8 Make SpillIs an optional pointer. Avoid creating a bunch of temporary SmallVectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127388 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 01:21:58 +00:00
Francois Pichet
581d535af9 Unbreak the CMake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127383 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 00:51:01 +00:00
Stuart Hastings
03d5826164 Revert 127359; it broke lencod. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127382 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 00:25:53 +00:00
Devang Patel
6af531febe Introduce DebugInfoProbe. This is used to monitor how llvm optimizer is treating debugging information. 
It generates output that lools like

8 times line number info lost by Scalar Replacement of Aggregates (SSAUp) 
1 times line number info lost by Simplify well-known library calls 
12 times variable info lost by Jump Threading



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127381 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-10 00:21:25 +00:00