Commit Graph

1863 Commits

Author SHA1 Message Date
Johnny Chen
2d16a67b94 Now that Evan Cheng has fixed the coalescer bug (r100804), the workaround code
to avoid memcpy() call is no longer necessary.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100811 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 21:23:54 +00:00
Benjamin Kramer
454c4ce479 Various MSVC warning fixes about truncated 64 bit shifts and const pointers passed to free.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 15:25:57 +00:00
Benjamin Kramer
127dc5e615 Use errs instead of fprintf.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100754 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 09:42:29 +00:00
Sean Callanan
8f993b8c24 Added support for ARM disassembly to edis.
I also added a rule to the ARM target's Makefile to
build the ARM-specific instruction information table
for the enhanced disassembler.

I will add the test harness for all this stuff in
a separate commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-08 00:48:21 +00:00
Chris Lattner
75361b69f3 rename llvm::llvm_report_error -> llvm::report_fatal_error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 22:58:41 +00:00
Sean Callanan
5edca81626 Fixed a bug where the disassembler would allow an immediate
argument that had to be between 0 and 7 to have any value,
firing an assert later in the AsmPrinter.  Now, the
disassembler rejects instructions with out-of-range values
for that immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100694 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 21:42:19 +00:00
Eric Christopher
72666f2be9 Fix typo and correct comment somewhat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 20:58:16 +00:00
Johnny Chen
3c500e6947 Re-enable ARM/Thumb disassembler and add a workaround for a memcpy() call in
ARMDecoderEmitter.cpp, with FIXME comment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100690 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 20:53:12 +00:00
Anton Korobeynikov
96085a36db Initial support for different kinds of FU reservation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100645 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-07 18:19:32 +00:00
Jakob Stoklund Olesen
fddb7667ca Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-05 03:10:20 +00:00
Chris Lattner
35c33bd772 change a ton of code to not implicitly use the "O" raw_ostream
member of AsmPrinter.  Instead, pass it in explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-04 04:47:45 +00:00
Chandler Carruth
1e86e3fb4b Fix a warning in GCC about a pointless typedef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100268 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03 04:45:24 +00:00
Chandler Carruth
b421640efa Add the new ARMDecodeEmitter to CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100267 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-03 04:36:43 +00:00
Johnny Chen
55f71187a5 Move variable "Bits" declaration/definition into the DEBUG block where its usage
is expected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100247 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 23:13:52 +00:00
Johnny Chen
493a441391 Fixed build warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100244 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:51:04 +00:00
Johnny Chen
9981814a40 Change from .../Support/DataTypes.h to .../System/DataTypes.h.
(Fix build failure)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100243 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:41:06 +00:00
Johnny Chen
b68a3ee82a Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:27:38 +00:00
Chris Lattner
283d1ceb57 Switch pattern sorting predicate from stable sort -> sort, it
doesn't need to be stable because the patterns are fully ordered.

Add a first level sort predicate that orders patterns in this
order:  1) scalar integer operations 2) scalar floating point 
3) vector int 4) vector float.  This is a trivial sort on their
top level pattern type so it is nice and transitive.  The
benefit of doing this is that simple integer operations are
much more common than insane vector things and isel was trying
to match the big complex vector patterns before the simple
ones because the complexity of the vector operations was much
higher.  Since they can't both match, it is best (for compile
time) to try the simple integer ones first.

This cuts down the # failed match attempts on real code by
quite a bit, for example, this reduces backtracks on crafty
(as a random example) from 228285 -> 188369.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99797 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29 02:02:45 +00:00
Chris Lattner
4810736134 revert 99795, as mentioned, it is disabled anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99796 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29 01:58:15 +00:00
Chris Lattner
a0401249e8 Check in a (disabled) failed attempt to improve the ordering of
patterns within the generated matcher.  This works great except
that the sort fails because the relation defined isn't 
transitive.  I have a much simpler solution coming next, but want
to archive the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99795 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29 01:56:19 +00:00
Chris Lattner
48e86dbe29 print the complexity of the pattern being matched in the
comment in the generated table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99794 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29 01:40:38 +00:00
Chris Lattner
2a22cdc716 improve type checking of SDNode operand count. This rejects all cases
where an incorrect number of operands is provided to an sdnode instead
of just a few cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 08:48:47 +00:00
Chris Lattner
caa8870fe0 finally remove the immAllOnesV_bc/immAllZerosV_bc patterns
and those derived from them.  These are obnoxious because
they were written as: PatLeaf<(bitconvert).  Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99759 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 08:43:23 +00:00
Chris Lattner
7a0eb91b4c teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4),
transforming it into (add (i32 GPR), 4).  This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align.  This allows us to fold an extra load
in the changed testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 08:38:32 +00:00
Chris Lattner
b775b1e20b validate that input sdnodes don't exist in an output pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 06:57:56 +00:00
Chris Lattner
c217305f76 eliminate a bunch of code duplication in ParseTreePattern
by rotating it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 06:50:34 +00:00
Chris Lattner
c812261221 SDTCisVT<0, isVoid> is not valid, reject it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 06:04:39 +00:00
Chris Lattner
aa4e3391c8 add an optimized form of OPC_EmitMergeInputChains for the 1, 0 and
1, 1 cases which are by-far the most frequent.  This shrinks the X86
isel table from 77014 -> 74657 bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-28 05:50:16 +00:00
Chris Lattner
b4a52b04bd fix a long standing fixme, which required fixing a bunch of other
issues to get here.  We now trim the result type list of the
CompleteMatch or MorphNodeTo operation to be the same size as the
thing we're matching.  this means that if you match (add GPR, GPR)
with an instruction that produces a normal result and a flag that
we now trim the result in tblgen instead of having to do it 
dynamically.  This exposed a bunch of inconsistencies in result
counting that happened to be getting lucky since the days of the
old isel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 20:45:15 +00:00
Chris Lattner
0d7952ed5a fix CodeGenTarget::getRegisterVTs to not return the
same vt multiple times for a register.  For example,
ECX is in 5 different i32 reg classes, just return 
1 i32 instead of 5.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 20:32:26 +00:00
Chris Lattner
9414ae5291 hoist some funky logic into CodeGenInstruction
from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 20:09:24 +00:00
Chris Lattner
0be6fe7139 continue pushing tblgen's support for nodes with multiple
results forward.  We can now handle an instruction that 
produces one implicit def and one result instead of one or
the other when not at the root of the pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 19:15:02 +00:00
Chris Lattner
5d3569e93c fix a bug in my recent patch that increased opcode size to 2 bytes:
the index comments nested under OPC_SwitchOpcode were off by one.
This fixes the comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 18:49:33 +00:00
Dan Gohman
f65f294c99 Remove an unnecessary #include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 16:33:36 +00:00
Chris Lattner
310adf1c6f remove parallel support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-27 02:53:27 +00:00
Jakob Stoklund Olesen
70feca409e Teach TableGen to understand X.Y notation in the TSFlagsFields strings.
Remove much horribleness from X86InstrFormats as a result. Similar
simplifications are probably possible for other targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 18:52:01 +00:00
Chris Lattner
d5d5a3dcba Change tblgen to emit FOOISD opcode names as two
bytes instead of one byte.  This is important because
we're running up to too many opcodes to fit in a byte
and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE
making the numbering sparse.  This just bites the
bullet and bloats out the table.  In practice, this
increases the size of the x86 isel table from 74.5K
to 76K.  I think we'll cope :)

This fixes rdar://7791648


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 06:33:05 +00:00
Jakob Stoklund Olesen
d1baa252c4 Fix evil TableGen bug in template parameters with defaults.
If a TableGen class has an initializer expression containing an X.Y subexpression,
AND X depends on template parameters,
AND those template parameters have defaults,
AND some parameters with defaults are beyond position 1,
THEN parts of the initializer expression are evaluated prematurely with the default values when the first explicit template parameter is substituted, before the remaining explicit template parameters have been substituted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 06:23:34 +00:00
Chris Lattner
084df627c8 add plumbing for handling multiple result nodes
in some more places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99366 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 00:41:19 +00:00
Chris Lattner
cc87830732 implement SDTCisVTSmallerThanOp with EnforceSmallerThan
instead of reimplementing it wrong and poorly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99357 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 00:06:46 +00:00
Chris Lattner
66fb9d26c6 bring sanity to EnforceVectorEltType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99354 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 00:01:16 +00:00
Chris Lattner
640a3f5309 Cleanup getImplicitType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99353 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23 23:50:31 +00:00
Chris Lattner
9972aff7da reject void in intrinsic type lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99347 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-23 23:46:27 +00:00
Chris Lattner
93dc92e412 Change intrinsic result type for void to store it as an empty list
instead of as a single element list with VoidTy.  Now with a fix
for the verifier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99206 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-22 20:56:36 +00:00
Daniel Dunbar
32f6a8b8bb Fix suggested parentheses warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99111 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-21 01:38:21 +00:00
Eric Christopher
d7de54068c Revert r99009 temporarily it seems to be breaking the bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 23:04:23 +00:00
Chris Lattner
26e763753b Change intrinsic result type for void to store it as an empty list
instead of as a single element list with VoidTy.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99009 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 22:40:56 +00:00
Chris Lattner
2e68a02c26 make getOperandNum a static function (since it's just used by
ApplyTypeConstraint) and make it handle multiple result nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99003 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 21:56:21 +00:00
Chris Lattner
d734919465 major surgery on tblgen: generalize TreePatternNode
to maintain a list of types (one for each result of
the node) instead of a single type.  There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98999 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 21:37:09 +00:00
Chris Lattner
774ce29399 make FillWithPossibleTypes take a predicate to filter types so that
we don't blow the smallvector as often.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98968 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 17:41:26 +00:00
Chris Lattner
1e50631675 resolve fixme: we now infer the instruction-level 'isvariadic' bit
from the pattern if present, and we use it instead of the bit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 05:34:15 +00:00
Chris Lattner
e8cabf3c2e add a new SDNPVariadic SDNP node flag, and use it in
dag isel gen instead of instruction properties.  This
allows the oh-so-useful behavior of matching a variadic
non-root node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 05:07:09 +00:00
Chris Lattner
5a9b8fb95c rewrite EnforceSmallerThan to be less bone headed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98933 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 04:54:36 +00:00
Daniel Dunbar
65f35d5703 Fix -Asserts warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98927 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 03:18:20 +00:00
Chris Lattner
aac5b5b2e5 eliminate the last use of EEVT::isUnknown
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 01:14:27 +00:00
Chris Lattner
e14d2e210d Finally change the instruction looking map to be a densemap from
record* -> instrinfo instead of std::string -> instrinfo.

This speeds up tblgen on cellcpu from 7.28 -> 5.98s with a debug
build (20%).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98916 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 01:07:44 +00:00
Chris Lattner
6a91b18e57 make inst_begin/inst_end iterate over InstructionsByEnumValue.
Use CodeGenTarget::getInstNamespace in one place and fix it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98915 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 01:00:55 +00:00
Chris Lattner
01dcecc214 revert 98912
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98914 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:50:47 +00:00
Chris Lattner
a28bc686fa make inst_begin/inst_end iterate over InstructionsByEnumValue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:40:22 +00:00
Chris Lattner
f65027842e change Target.getInstructionsByEnumValue to return a reference
to a vector that CGT stores instead of synthesizing it on every 
call.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98910 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:34:35 +00:00
Chris Lattner
e4e8bb1541 factor copy and paste code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98908 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:23:20 +00:00
Chris Lattner
b61e09de6d don't go through getInstructions().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:18:23 +00:00
Chris Lattner
f30187a363 look up instructions by record, not by name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 00:07:20 +00:00
Chris Lattner
928795387f expand tblgen's support for instructions with implicit defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98900 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 23:57:40 +00:00
Chris Lattner
6c6ba36493 infer results of a pattern from implicit defs. This allows you to do something
like this:

 def : Pat<(add ...),
           (FOOINST)>;

When fooinst only has a single implicit def (e.g. to R1).  This will be handled
as if written as (set R1, (FOOINST ...))



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98897 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 23:15:10 +00:00
Chris Lattner
f506b6b471 capture implicit uses and defs in CodeGenInstruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98879 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:42:03 +00:00
Chris Lattner
ef988984d7 simplify this code, the # of sets in the pattern for an instruction
shouldn't change this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98872 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:15:05 +00:00
Chris Lattner
0b6c926856 disallow concatenation of two dags with different operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98871 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:07:51 +00:00
Chris Lattner
f55eed299b rewrite this to not artificially force concat the ins/outs list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98870 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:07:39 +00:00
Chris Lattner
b0be4d261b eliminate support for "ops" in the input/output list of an
instruction.  Instructions must use 'ins' and 'outs' now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:56:35 +00:00
Chris Lattner
cedef1ccf0 remove some code that was working around old sparc v9 backend bugs.
Add checking that the input/output operand list in spelled right.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98865 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:50:52 +00:00
Daniel Dunbar
8cc9c0c487 MC/AsmMatcher: Add support for target specific "instruction cleanup" functions,
to allow custom post-processing of matched instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98857 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:05:56 +00:00
Kovarththanan Rajaratnam
e7e891f6af Add an extra newline to separate PP directives from the contents
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98820 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 13:16:38 +00:00
Bob Wilson
49d9dc4dd2 --- Reverse-merging r98637 into '.':
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98640 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16 16:59:47 +00:00
Johnny Chen
d30a98e43a Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98637 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16 16:36:54 +00:00
Chris Lattner
5f19c43161 don't form a RecordChild or CheckChildType for child #'s over 7, we don't
have enums for them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-16 00:35:11 +00:00
Chris Lattner
e002da34ef eliminate some #if 0 code I added in r96905, type inference
now enforces that input/output named values have hte same type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98535 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15 06:03:22 +00:00
Chris Lattner
2cacec55f9 Completely rewrite tblgen's type inference mechanism,
changing the primary datastructure from being a 
"std::vector<unsigned char>" to being a new TypeSet class
that actually has (gasp) invariants!

This changes more things than I remember, but one major
innovation here is that it enforces that named input 
values agree in type with their output values.

This also eliminates code that transparently assumes (in 
some cases) that SDNodeXForm input/output types are the
same, because this is wrong in many case.

This also eliminates a bug which caused a lot of ambiguous
patterns to go undetected, where a register class would
sometimes pick the first possible type, causing an
ambiguous pattern to get arbitrary results.

With all the recent target changes, this causes no 
functionality change!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98534 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15 06:00:16 +00:00
Evan Cheng
5e81716425 Check in tablegen changes to fix disassembler related failures caused by r98465.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98468 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 05:15:39 +00:00
Chris Lattner
43e4754817 Node arguments to type casts can have names too. This code
needs to be majorly refactored, but this spot bugfix allows
things like:

 def vmrghw_shuffle : PatFrag<(ops node:$lhs, node:$rhs),
                             (vector_shuffle (v4i32 node:$lhs), node:$rhs), [{
...



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 18:36:19 +00:00
Chris Lattner
81d6d52592 turn off debug spew
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-07 07:21:24 +00:00
Chris Lattner
6fd326b7ff more factoring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-07 07:20:49 +00:00
Chris Lattner
9cdd9659c3 teach tblgen to be more aggressive when factoring CheckType nodes.
Now it will factor things like this:

CheckType i32
  ...
CheckOpcode ISD::AND
  CheckType i64
  ...

into:

SwitchType:
  i32: ...
  i64:
    CheckOpcode ISD::AND
    ...

This shrinks hte table by a few bytes, nothing spectacular.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97908 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-07 07:01:28 +00:00
Chris Lattner
48aa5756a2 add some helper functions and implement isContradictory
for CheckValueTypeMatcher.  The isContradictory implementation
helps us factor better, shrinking x86 table from 79144 -> 78896
bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97905 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-07 06:29:26 +00:00
Mikhail Glushenkov
b5c4239606 Make it not an error to specify -O* options several times.
As in 'llvmc -O2 -O2 test.c'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-05 04:46:39 +00:00
Chris Lattner
57fcd03611 so hey, it turns out that the histogram was completely wrong, because
we sometimes emit nodes multiple times to string buffers to size them.
Compute the histogram correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97708 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:34:29 +00:00
Chris Lattner
6b4ae71725 zap fixme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:26:00 +00:00
Chris Lattner
9752fb10a4 now that complexpatterns are all emitted at the end of the match
sequence, just emit instruction predicates right before them.  This
exposes yet more factoring opportunitites, shrinking the X86 table 
to 79144 bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:25:36 +00:00
Chris Lattner
57bf8a483e change the new isel matcher to emit ComplexPattern matches
as the very last thing before node emission.  This should
dramatically reduce the number of times we do 'MatchAddress'
on X86, speeding up compile time.  This also improves comments
in the tables and shrinks the table a bit, now down to 
80506 bytes for x86.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 01:23:08 +00:00
Chris Lattner
d1aca7c8b4 enhance comment output to specify what recorded slot
numbers a ComplexPat will match into.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97696 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-04 00:28:05 +00:00
Chris Lattner
cfe2eab744 introduce a new SwitchTypeMatcher node (which is analogous to
SwitchOpcodeMatcher) and have DAGISelMatcherOpt form it.  This
speeds up selection, particularly for X86 which has lots of 
variants of instructions with only type differences.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97645 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-03 06:28:15 +00:00
Chris Lattner
d272fee398 the sorting predicate should work for comparing an element
to itself, even though this isn't wildly useful.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97574 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 18:15:02 +00:00
Chris Lattner
4a3ac62332 eliminate CodeGen/DAGISelHeader.h, it is empty now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 06:36:28 +00:00
Chris Lattner
c6d7ad3c7d Rewrite chain handling validation and input TokenFactor handling
stuff now that we don't care about emulating the old broken 
behavior of the old isel.  This eliminates the 
'CheckChainCompatible' check (along with IsChainCompatible) which
did an incorrect and inefficient scan *up* the chain nodes which
happened as the pattern was being formed and does the validation
at the end in HandleMergeInputChains when it forms a structural 
pattern.  This scans "down" the graph, which means that it is
quickly bounded by nodes already selected.  This also handles
token factors that get "trapped" in the dag.

Removing the CheckChainCompatible nodes also shrinks the 
generated tables by about 6K for X86 (down to 83K).

There are two pieces remaining before I can nuke PreprocessRMW:
1. I xfailed a test because we're now producing worse code in a 
   case that has nothing to do with the change: it turns out that
   our use of MorphNodeTo will leave dead nodes in the graph
   which (depending on how the graph is walked) end up causing
   bogus uses of chains and blocking matches.  This is really 
   bad for other reasons, so I'll fix this in a follow-up patch.

2. CheckFoldableChainNode needs to be improved to handle the TF.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 02:22:10 +00:00
Chris Lattner
38fd96731c add some missing \n's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97527 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-02 00:13:03 +00:00
Chris Lattner
8b30b8dd33 fixme resolved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97517 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01 23:08:51 +00:00
Chris Lattner
e60f7b4412 remove a little hack I did for the old isel, not needed
now that it is gone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97516 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01 22:51:11 +00:00
Chris Lattner
67ea6a7111 resolve some fixmes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97515 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01 22:49:06 +00:00
Chris Lattner
01bcd947bf resolve a fixme and simplify code by moving insertion of the
EmitMergeInputChainsMatcher node up into EmitResultCode.  This
doesn't have much of an effect on the generated code, the X86
table is exactly the same size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01 22:46:42 +00:00
Chris Lattner
405f1252b9 resolve a fixme by having the .td file parser reject thigns like
(set GPR, somecomplexpattern)

if somecomplexpattern doesn't declare what it can match.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-01 22:29:19 +00:00