Evan Cheng
bc4832bc64
Support for scalar to vector with zero extension.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 23:15:12 +00:00
Evan Cheng
386031a06f
Handle BUILD_VECTOR with all zero elements.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27056 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 07:29:27 +00:00
Evan Cheng
2c0dbd01d2
More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27040 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 02:58:06 +00:00
Evan Cheng
14aed5e66b
Handle more shuffle cases with SHUFP* instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-24 01:18:28 +00:00
Evan Cheng
ca6e8eafd2
Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do
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64-bit vector shuffle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 22:07:06 +00:00
Evan Cheng
0188ecba85
- Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support
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splat and PSHUFD cases.
- Clean up shuffle / splat matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 18:59:22 +00:00
Evan Cheng
63d3300da1
- VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches
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PSHUFD. We can make permutes entries which point to the undef pointing
anything we want.
- Change some names to appease Chris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26951 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 08:01:21 +00:00
Evan Cheng
b9df0ca67b
Some splat and shuffle support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26940 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-22 02:53:00 +00:00
Evan Cheng
48090aa814
- Use movaps to store 128-bit vector integers.
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- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26932 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-21 23:01:21 +00:00
Evan Cheng
c4c6257c1a
Added getTargetLowering() to TargetMachine. Refactored targets to support this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
2006-03-13 23:20:37 +00:00
Evan Cheng
020d2e8e7a
- Clean up the lowering and selection code of ConstantPool, GlobalAddress,
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and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
mentioned leaf nodes. Do not mutate and nodes and do not record the
selection in CodeGenMap. These nodes should be safe to duplicate. This is
a performance win.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26335 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 20:41:18 +00:00
Evan Cheng
a0ea0539e3
PIC related bug fixes.
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1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-23 02:43:52 +00:00
Chris Lattner
1efa40f6a4
split register class handling from explicit physreg handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-22 00:56:39 +00:00
Chris Lattner
4217ca8dc1
Updates to match change of getRegForInlineAsmConstraint prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-21 23:11:00 +00:00
Evan Cheng
7ccced634a
x86 / Darwin PIC support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26273 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-18 00:15:05 +00:00
Nate Begeman
551bf3f800
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
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and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26255 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-17 05:43:56 +00:00
Nate Begeman
368e18d56a
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
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and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-16 21:11:51 +00:00
Evan Cheng
e3de85b447
Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a
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flag so it can be flagged to a FST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-04 02:20:30 +00:00
Evan Cheng
223547ab31
- Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
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- Use XORP* to implement fneg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25857 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:28:30 +00:00
Chris Lattner
259e97cc72
* Fix 80-column violations
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* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 19:43:35 +00:00
Evan Cheng
ef6ffb17c7
Added custom lowering of fabs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25831 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 03:14:29 +00:00
Evan Cheng
6dab05363f
Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
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conversions. SSE does not have instructions to handle these tasks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25817 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 08:02:57 +00:00
Chris Lattner
c6fd6cd65c
Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:09:27 +00:00
Chris Lattner
87c890a9c2
adjust prototype
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:49:07 +00:00
Nate Begeman
ee625573b5
Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
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the same functionality. This addresses another piece of bug 680. Next,
on to fixing Alpha VAARG, which I broke last time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
Evan Cheng
559806f575
x86 CPU detection and proper subtarget support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 08:10:46 +00:00
Nate Begeman
acc398c195
First part of bug 680:
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Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:21:52 +00:00
Evan Cheng
a3195e8643
Fix sint_to_fp (fild*) support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25257 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-12 22:54:21 +00:00
Evan Cheng
67f92a7649
Support for MEMCPY and MEMSET.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25226 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 22:15:48 +00:00
Evan Cheng
4a46080fe0
SSE cmov support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25190 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-11 00:33:36 +00:00
Evan Cheng
e3413160ca
Support for ADD_PARTS, SUB_PARTS, SHL_PARTS, SHR_PARTS, and SRA_PARTS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25158 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-09 18:33:28 +00:00
Evan Cheng
d9558e0ba6
* Fast call support.
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* FP cmp, setcc, etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 00:43:03 +00:00
Evan Cheng
d90eb7fb24
DAG based isel call support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-05 00:27:02 +00:00
Evan Cheng
38bcbaf23e
More X86 floating point patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24990 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-23 07:31:11 +00:00
Evan Cheng
3a03ebb377
* Fix a GlobalAddress lowering bug.
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* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24921 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 23:05:39 +00:00
Evan Cheng
d5781fca4f
* Added support for X86 RET with an additional operand to specify number of
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bytes to pop off stack.
* Added support for X86 SETCC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24917 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 20:21:51 +00:00
Evan Cheng
b077b842b6
* Added lowering hook for external weak global address. It inserts a load
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for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
value (or store / fld / copy to ST(0) for floating point value). This
eliminate the need to write C++ code to handle RET with variable number
of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24888 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-21 02:39:21 +00:00
Evan Cheng
7226158d7e
Added a hook to print out names of target specific DAG nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24877 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-20 06:22:03 +00:00
Evan Cheng
898101c15f
X86 conditional branch support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 23:12:38 +00:00
Evan Cheng
7df96d6672
X86 lowers SELECT to a cmp / test followed by a conditional move.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:21:05 +00:00
Andrew Lenharth
b873ff322c
The second patch of X86 support for read cycle counter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 21:41:10 +00:00
Chris Lattner
dbdbf0ce2e
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 00:40:23 +00:00