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49855 Commits

Author SHA1 Message Date
Bill Wendling
ad027053fe If we are extracting a basic block that ends in an invoke call, we must also 
extract the landing pad block. Otherwise, there will be a situation where the
invoke's unwind edge lands on a non-landing pad.

We also forbid the user from extracting the landing pad block by itself. Again,
this is not a valid transformation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140083 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 23:00:52 +00:00
Owen Anderson
04c7877894 Thumb2 TBB and TBH instructions are only allowed at the end of IT blocks, not in the middle. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140079 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 22:34:23 +00:00
Jim Grosbach
7f739bee26 Thumb2 assembly parsing and encoding for TBB/TBH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140078 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 22:21:13 +00:00
Eli Friedman
c6b8ba8673 Fix an infinite loop where a transform in InstCombiner::visitAnd claims a construct is changed when it is not. (See included testcase.) 
Patch by Xiaoyi Guo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140072 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 21:58:15 +00:00
Bruno Cardoso Lopes
97dc60b759 Match X86ISD::FSETCCsd and X86ISD::FSETCCss while in AVX mode. This fix 
PR10955 and PR10948.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140069 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 21:29:24 +00:00
Eric Christopher
627445f3e6 Rename LLVM_MULTITHREADED define and fix build without threads. 
Patch by Arrowdodger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140064 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 20:43:23 +00:00
Jim Grosbach
bc80e94865 Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140050 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 20:31:59 +00:00
Jim Grosbach
326efe5891 Thumb2 assembly parsing and encoding for SXTB/SXTB16/SXTH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140047 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 20:29:33 +00:00
Akira Hatanaka
da7f5f1c1d Make changes to avoid creating nested CALLSEQ_START/END constructs, which aren't 
yet legal according to comments in LegalizeDAG.cpp:227. 

Memcpy nodes created for copying byval arguments are inserted before
CALLSEQ_START.

The two failing tests reported in PR10876 pass after applying this patch.  


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140046 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 20:26:02 +00:00
Benjamin Kramer
586a55a290 Silence -Wsign-compare warnings from GCC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140043 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 20:08:54 +00:00
Owen Anderson
061c3c4506 Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140041 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 20:00:02 +00:00
Eli Friedman
c3d3598425 Fix a typo in the bitcode reader in the handling of atomic stores. Reported by David Meyer on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140040 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 19:41:28 +00:00
Jim Grosbach
fb12f35545 ARM asm parsing should handle pre-indexed writeback w/o immediate. 
For example, 'ldrb r9, [sp]!' is odd, but valid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140035 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 18:42:21 +00:00
Owen Anderson
ecd1c55790 Handle STRT (and friends) like LDRT (and friends) for decoding purposes. Port over additional encoding tests to decoding tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140032 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 18:07:10 +00:00
Jim Grosbach
8a8d28b039 Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140029 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 17:56:37 +00:00
Benjamin Kramer
a182be9b6c MCInstrAnalysis: Don't crash on instructions with no operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140027 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 17:56:00 +00:00
Andrew Trick
24f48ece52 [indvars] Fix PR10946: SCEV cannot handle Vector IVs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140026 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 17:54:39 +00:00
NAKAMURA Takumi
92ec8e1427 Add Win32 support to llvm::llvm_execute_on_thread(). Thanks to Aaron Ballman! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140011 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-19 07:41:43 +00:00
Nadav Rotem
ca6f296b48 Fix typos in my prev commit, found by Tobi. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140003 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-18 19:00:23 +00:00
Nadav Rotem
354efd88db setOperationAction should be done on the return value of the type, not the operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140001 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-18 14:57:03 +00:00
Nadav Rotem
91e43fd17a When promoting integer vectors we often create ext-loads. This patch adds a 
dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139995 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-18 10:39:32 +00:00
Nadav Rotem
b6266fb602 white space cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139994 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-18 10:29:29 +00:00
Craig Topper
89af15ee11 Fix typo by changing Lower256IntVETCC to Lower256IntVSETCC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139993 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-18 08:03:58 +00:00
Duncan Sands
6bcd2196e5 Synthesize x86 max/min instructions also for vectors (i.e. produce 
maxps and maxpd).  This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it.  Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139986 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-17 16:49:39 +00:00
Bruno Cardoso Lopes
2c693dc126 Describe more AVX 128-bit convert instructions without patterns to have 
mayLoad = 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139973 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 23:41:29 +00:00
Owen Anderson
cb77551927 Bitfield mask instructions are unpredictable if the encoded LSB is higher than the encoded MSB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139972 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 23:30:01 +00:00
Owen Anderson
8b22778431 Fix bitfield decoding based on Eli's feedback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139969 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 23:04:48 +00:00
Jim Grosbach
f67e8554bf Thumb2 assembly parsing and encoding for SUB(immediate). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139966 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 22:58:42 +00:00
Owen Anderson
e4f2df945a Thumb2 pre-indexed loads/stores use the restricted GPR set for Rt. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139965 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 22:42:36 +00:00
Owen Anderson
89db0f690c Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139964 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 22:29:48 +00:00
Owen Anderson
8a28bdcbcc Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139958 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 22:17:02 +00:00
Bruno Cardoso Lopes
7291272ab2 Add mayLoad attribute to AVX convert instructions, since non of them 
are declared with load patterns. This fix the crash in PR10941. No testcases,
since a fold is triggered and then converted back to the register form
afterwards.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139953 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 22:02:14 +00:00
Jim Grosbach
ee2c2a4f98 Thumb2 assembly parsing and encoding for STR. 
More addressing mode encoding bits. Handle pre increment for STR/STRB/STRH
and STR(register).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139949 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 21:55:56 +00:00
Jim Grosbach
947a24cd64 Tidy up. 80 columns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139944 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 21:09:00 +00:00
Owen Anderson
705b48ff86 Fix disassembly of Thumb2 LDRSH with a #-0 offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139943 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 21:08:33 +00:00
Jim Grosbach
642caea2c6 Thumb2 assembly parsing and encoding for STR(immediate). 
Add aliases for STRB/STRH while there. Tests forthcoming for those.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139942 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 21:06:12 +00:00
Bruno Cardoso Lopes
08ecb711ac Fix PR10884. 
This PR basically reports a problem where a crash in generated code
happened due to %rbp being clobbered:

  pushq %rbp
  movq  %rsp, %rbp
  ....
  vmovmskps %ymm12, %ebp
  ....
  movq  %rbp, %rsp
  popq  %rbp
  ret

Since Eric's r123367 commit, the default stack alignment for x86 32-bit
has changed to be 16-bytes. Since then, the MaxStackAlignmentHeuristicPass
hasn't been really used, but with AVX it becomes useful again, since per
ABI compliance we don't always align the stack to 256-bit, but only when
there are 256-bit incoming arguments.

ReserveFP was only used by this pass, but there's no RA target hook that
uses getReserveFP() to check for the presence of FP (since nothing was
triggering the pass to run, the uses of getReserveFP() were removed
through time without being noticed). Change this pass to use
setForceFramePointer, which is properly called by MachineFunction
hasFP method.

The testcase is very big and dependent on RA, not sure if it's worth
adding to test/CodeGen/X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139939 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 20:58:28 +00:00
Jim Grosbach
8213c96655 Thumb2 assembly parsing and encoding for STMIA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139938 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 20:50:13 +00:00
Jim Grosbach
50bd470d85 Thumb2 assembly parsing and encoding for SSAX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139929 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:37:10 +00:00
Eli Friedman
ecc9b5ec23 Fix a minor bug in fs::create_directories. Patch by Albert Wong. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139928 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:36:31 +00:00
Jim Grosbach
b105b997a4 Thumb2 assembly parsing and encoding for SSAT. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139926 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:32:30 +00:00
Jim Grosbach
05ec8f7ac9 Thumb2 assembly parsing and encoding for SRS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139925 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:25:22 +00:00
Jim Grosbach
3443ed525a Thumb2 assembly parsing and encoding for SMMULL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139921 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 18:05:48 +00:00
Jim Grosbach
7ff2472b82 Thumb2 assembly parsing and encoding for SMLSLD/SMLSLDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139909 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 17:10:44 +00:00
Jim Grosbach
231948f860 Thumb2 assembly parsing and encoding for SMLALD/SMLALDX. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139906 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:58:03 +00:00
Jim Grosbach
db7e2e59dd Kill some dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139904 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:45:40 +00:00
Jim Grosbach
fb9cffea4a Tidy up a bit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139903 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:39:25 +00:00
Jim Grosbach
837fc5e9d5 Thumb2 assembly parsing and encoding for SMLAL. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139902 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 16:38:00 +00:00
Benjamin Kramer
76f58d2031 Namespacify. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139892 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 00:35:06 +00:00
Jakob Stoklund Olesen
ebac0c1747 Spill mode: Hoist back-copies locally. 
The leaveIntvAfter() function normally inserts a back-copy after the
requested instruction, making the back-copy kill the live range.

In spill mode, try to insert the back-copy before the last use instead.
That means the last use becomes the kill instead of the back-copy.  This
lowers the register pressure because the last use can now redefine the
same register it was reading.

This will also improve compile time: The back-copy isn't a kill, so
hoisting it in hoistCopiesForSize() won't force a recomputation of the
source live range.  Similarly, if the back-copy isn't hoisted by the
splitter, the spiller will not attempt hoisting it locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139883 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-16 00:03:35 +00:00