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b5cdaa257e
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18918 Commits

Author SHA1 Message Date
Evan Cheng
b5cdaa257e RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37192 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-18 00:05:48 +00:00
Evan Cheng
4f098788d3 Move isSuccessor() offline, change it to use std::find. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37190 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 23:58:53 +00:00
Devang Patel
9f26f73179 Fix PR1431 
Test case at Transformations/SCCP/2007-05-16-InvokeCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37185 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 22:10:15 +00:00
Dale Johannesen
8dd86c14d4 More effective breakdown of memcpy into repeated load/store. These are now 
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has a better chance of producing ldm/stm.  Ideally you would get cooperation
from the RA as well but this is not there yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37179 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 21:31:21 +00:00
Reid Spencer
fb0709a180 Get rid of leading zeros in the output of toString. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37175 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 19:23:02 +00:00
Evan Cheng
213d2cf94f Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an optimization to fold VECTOR_SHUFFLE to a zero vector. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37173 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 18:45:50 +00:00
Evan Cheng
174f803395 Added missing patterns for UNPCKH* and PUNPCKH*. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37172 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 18:44:37 +00:00
Chris Lattner
3fc5b01d38 disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for 
i128 integers.  The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37169 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 18:19:23 +00:00
Chris Lattner
b429f7303e add expand support for ADDC/SUBC/ADDE/SUBE so we can codegen 128-bit add/sub on 32-bit (or less) targets 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37168 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 18:15:41 +00:00
Chris Lattner
07c70cd866 This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't 
cause other regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37160 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 17:13:13 +00:00
Anton Korobeynikov
f840202953 Revert patch for PR1427. It breaks almost all vector tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37159 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 07:50:14 +00:00
Chris Lattner
ccde4cb8ab add support for 128-bit add/sub on ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37158 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:52:46 +00:00
Reid Spencer
09d8c9278e Print integer values as both decimal and hexadecimal for convenience 
of verifying result values when debugging.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37156 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:47:54 +00:00
Chris Lattner
a066810681 add support for 128-bit integer add/sub 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37154 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:35:11 +00:00
Reid Spencer
02ae8b78ff For lshr by 0 bits, just return *this as a short cut. This also prevents 
undefined behavior when the width > 64 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37153 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 06:26:29 +00:00
Chris Lattner
da66472ea6 Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37141 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 03:29:42 +00:00
Evan Cheng
d9e9efb253 Remove. Not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37139 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-17 00:11:35 +00:00
Evan Cheng
e425956b72 Default implementation of TargetInstrInfo::getBlockSize(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37138 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 23:53:44 +00:00
Evan Cheng
d60483ef99 Add target hook to specify block size limit for if-conversion. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37134 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 23:45:53 +00:00
Dale Johannesen
98a6c62aff Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37130 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 22:45:30 +00:00
Evan Cheng
d6ddc308f0 isBlockPredicable() always ignore terminal instructions; add comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37126 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:54:37 +00:00
Evan Cheng
3f8602cf20 ARM::tB is also predicable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37125 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:53:43 +00:00
Evan Cheng
02c602b333 PredicateInstruction returns true if the operation was successful. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37124 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:53:07 +00:00
Evan Cheng
2eb80fa433 Add default implementation of PredicateInstruction(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37123 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 21:20:37 +00:00
Evan Cheng
c3a289c4b5 Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37121 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:56:08 +00:00
Evan Cheng
75604f81b7 Move if-conversion after all passes that may use register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37120 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:52:46 +00:00
Evan Cheng
b5f8eff566 Removed isPredicable(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37119 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:50:23 +00:00
Evan Cheng
5ada199246 Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37118 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:50:01 +00:00
Evan Cheng
064d7cdd3c Added isPredicable bit to class Instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37117 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 20:47:01 +00:00
Reid Spencer
6551dcdd8a Fix a bug in the "fromString" method where radix 2,8 and 16 values were 
not being generated correctly because the shl operator does not mutate its
object but returns a new value. Also, make the distinction between radix
16 and the others more clear.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37111 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 19:18:22 +00:00
Reid Spencer
52811bdbf0 Avoid a "loss of precision" error in gcc 4.1.3. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37105 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 16:39:29 +00:00
Duncan Sands
53c3a333a4 Output exception call-sites in address order, as required by the unwinding 
runtime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37104 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 12:12:23 +00:00
Evan Cheng
aeafca0a25 Conditional branch is not a barrier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37103 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 07:45:54 +00:00
Chris Lattner
c76d4410ab Use a ptr set instead of a linear search to unique TokenFactor operands. 
This fixes PR1423


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37102 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 06:37:59 +00:00
Chris Lattner
738a6ec0ae implement the missing maskmovq mmx intrinsic that akor hit. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37100 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 06:08:17 +00:00
Evan Cheng
2706f9771d Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37098 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 05:14:06 +00:00
Evan Cheng
c5d05ef357 Devang points out that we need an assertion here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37097 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 05:11:10 +00:00
Reid Spencer
951418b7e9 Implement printing of instruction result values when debug info is turned 
on. This helps to speed up the debugging time by showing computational
results as the program executes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37095 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 02:05:13 +00:00
Evan Cheng
93003b8cf2 Bug fix: should check ABI alignment, not pref. alignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37094 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 02:04:50 +00:00
Evan Cheng
9307292ae2 Hooks for predication support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37093 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 02:01:49 +00:00
Evan Cheng
4e654852f1 Initial commit of (very basic) if converter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37092 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-16 02:00:57 +00:00
Dale Johannesen
14ba0cc429 Remove extra CFG edges before doing these passes; it makes them happier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37089 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 21:19:17 +00:00
Lauro Ramos Venancio
b5bb7ffa9c Fix an infinite recursion in GetNegatedExpression. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37086 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 17:05:43 +00:00
Duncan Sands
49b5c27baa The index into the actions table is a ULEB128 not a SLEB128. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37084 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 13:54:14 +00:00
Chris Lattner
ce3e2bff8b selects can also reach here 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37081 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 06:42:04 +00:00
Chris Lattner
d67c632d96 implement the ModuleProvider::dematerializeFunction hook 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37080 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 06:29:44 +00:00
Reid Spencer
76c94b6169 Un-brain-dead-ify the lowering of part set for the reverse case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37071 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 02:26:52 +00:00
Chris Lattner
c90233b836 Fix some subtle issues handling immediate values. This fixes 
test/CodeGen/ARM/2007-05-14-InlineAsmCstCrash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37069 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:33:58 +00:00
Chris Lattner
9f5d5783ec fix some subtle inline asm selection issues 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37067 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:31:05 +00:00
Evan Cheng
44bec52b1b Add PredicateOperand to all ARM instructions that have the condition field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
 2007-05-15 01:29:07 +00:00