Benjamin Kramer
a2898673ac
Harden tests for windows path separators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-05 18:20:05 +00:00
Jakob Stoklund Olesen
8f1282d9cb
Fix a test that keeps breaking when allocation orders change.
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Who said FileCheck couldn't handle arbitrarily complex conditions?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 23:34:40 +00:00
Nadav Rotem
0b66636879
TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132649 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-04 20:58:08 +00:00
Stuart Hastings
865f09334f
Reapply 132424 with fixes. This fixes PR10068.
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rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 23:53:54 +00:00
Jakob Stoklund Olesen
2e3e720d76
Fix some tests that depend on register allocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:45:21 +00:00
Eric Christopher
ec281c8934
Another possible bug. Stopgap until we can autogenerate tables and
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constraint lengths.
Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 22:09:12 +00:00
Eric Christopher
ce1ecf59c8
Fix an off by one error.
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Part of rdar://9037836 and rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132590 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:44:52 +00:00
Jakob Stoklund Olesen
5f2316a3b5
Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
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of reserved registers.
Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 20:34:53 +00:00
Eric Christopher
cf714d44b8
Make the Uv constraint a memory operand. This doesn't solve the
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addressing mode problem mentioned in r132559.
Backend part of rdar://9037836 and part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132561 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 17:24:37 +00:00
Roman Divacky
0c9b559bfd
Fix wrong usages of CTR/MCTR where CTR8/MCTR8 was meant.
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- Check for MTCTR8 in addition to MTCTR when looking up a hazard.
- When lowering an indirect call use CTR8 when targeting 64bit.
- Introduce BCTR8 that uses CTR8 and use it on 64bit when expanding ISD::BRIND.
The last change fixes PR8487. With those changes, we are able to compile a
running "ls" and "sh" on FreeBSD/PowerPC64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 15:47:49 +00:00
Eli Friedman
d6412c940e
Add ARM fast-isel support for materializing the address of a global in cases where the global uses an indirect symbol.
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rdar://9431157
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-03 01:13:19 +00:00
Devang Patel
cf4cc84738
During post RA scheduling, do not try to chase reg defs. to preserve DBG_VALUEs. This approach has several downsides, for example, it does not work when dbg value is a constant integer, it does not work if reg is defined more than once, it places end of debug value range markers in the wrong place. It even causes misleading incorrect debug info when duplicate DBG_VALUE instructions point to same reg def.
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Instead, use simpler approach and let DBG_VALUE follow its predecessor instruction. After live debug value analysis pass, all DBG_VALUE instruction are placed at the right place. Thanks Jakob for the hint!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 20:07:12 +00:00
Rafael Espindola
580cbd9cf0
Add test for PR10068.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 20:02:48 +00:00
Rafael Espindola
251b4a0405
Revert 132424 to fix PR10068.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 19:57:47 +00:00
Stuart Hastings
552c0ee4f9
Andy pointed out a dumb omission in this test case. Thanks Andy!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132477 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 19:26:49 +00:00
Stuart Hastings
1f344f052e
Jakob pointed out a dumb omission in this test case. Thanks Jakob!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132472 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 18:44:05 +00:00
Stuart Hastings
84be958ed8
Omit unnecessary stack copy when x87 input is a load.
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rdar://problem/6373334
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132458 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 15:57:11 +00:00
Stuart Hastings
ac92565384
Tweak testcase for ARM bot. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132454 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 05:05:39 +00:00
Akira Hatanaka
5e06903e66
Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 01:03:14 +00:00
Akira Hatanaka
f876bf81df
Test case for r132444.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-02 00:25:53 +00:00
Devang Patel
c432907eca
Do not drop constant values when a variable's content is described using .debug_loc entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 22:03:25 +00:00
Stuart Hastings
ec880283b3
Recommit 132404 with fixes. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132424 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 21:33:14 +00:00
Eric Christopher
9aaa02a1d2
Allow bitcasts between valid types of the same size and vector
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types if the vector type is legal.
Fixes rdar://9306086
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:55:10 +00:00
Stuart Hastings
4abc5fea9c
Revert 132404 to appease a buildbot. rdar://problem/5993888
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132419 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 19:52:20 +00:00
Stuart Hastings
0f971b1fdb
Cleanup test case. rdar://problem/5660695
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132408 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 18:23:14 +00:00
Stuart Hastings
10ff0bbdfb
Add support for x86 CMPEQSS and friends. These instructions do a
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floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs. Only profitable when the user wants a materialized 0
or 1 at runtime. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 17:17:45 +00:00
Stuart Hastings
d7de954644
A forthcoming SSE patch will break this test; since the test is also
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valid for x87, re-target to x87. rdar://problem/5993888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 16:13:09 +00:00
Stuart Hastings
b909d35de4
Test case for 132396. rdar://problem/5660695
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 15:50:29 +00:00
Nadav Rotem
b6fbec3a54
This patch is another step in the direction of adding vector select. In this
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patch we add a flag to enable a new type legalization decision - to promote
integer elements in vectors. Currently, the rest of the codegen does not support
this kind of legalization. This flag will be removed when the transition is
complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132394 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-01 12:51:46 +00:00
Richard Osborne
9497466190
Add XCore intrinsic for crc8.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 16:24:49 +00:00
Richard Osborne
7736c37c14
Add XCore intrinsic for crc32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 14:47:36 +00:00
Richard Osborne
bc5fd67b53
Convert test to FileCheck.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 14:00:05 +00:00
Bruno Cardoso Lopes
4e694c96f1
This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
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nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.
Patch by Sasa Stankovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes
d979686bb4
This patch implements the thread local storage. Implemented are General
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Dynamic, Initial Exec and Local Exec TLS models.
Patch by Sasa Stankovic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-31 02:53:58 +00:00
Rafael Espindola
6e032942cf
Use the dwarf->llvm mapping to print register names in the cfi
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directives.
Fixes PR9826.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-30 20:20:15 +00:00
Jakob Stoklund Olesen
57903357ee
Fix PR10046 by updating LiveVariables kill info when splitting live ranges.
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This only affects targets like Mips where branch instructions may kill virtual
registers. Most other targets branch on flag values, so virtual registers are
not involved.
The problem is that MachineBasicBlock::updateTerminator deletes branches and
inserts new ones while LiveVariables keeps a list of pointers to instructions
that kill virtual registers. That list wasn't properly updated in
MBB::SplitCriticalEdge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 20:10:28 +00:00
John McCall
5f8fd54f08
On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
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This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).
Take 2, now with more basic competence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 19:50:32 +00:00
John McCall
7eebab2a82
I didn't mean to commit these residues of a personal project.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132293 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 19:41:56 +00:00
John McCall
832a9d1a76
On Darwin ARM, set the UNWIND_RESUME libcall to _Unwind_SjLj_Resume.
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This is important for the correct lowering of unwind instructions
(which doesn't matter at all) and llvm.eh.resume calls (which does).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-29 19:39:04 +00:00
Bruno Cardoso Lopes
a0112d0c39
Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
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to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 04:07:29 +00:00
Eric Christopher
3c14f24c9d
Implement the 'M' output modifier for arm inline asm. This is fairly
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register allocation dependent and will occasionally break. WIP in the
register allocator to model paired/etc registers.
rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132242 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 01:40:44 +00:00
Akira Hatanaka
342837d0dc
Define a wrapper node for target constant nodes (tglobaladdr, etc.).
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Need this to prevent emitting illegal conditional move instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132240 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-28 01:07:07 +00:00
Cameron Zwarich
de64aaf6c8
Fix the remaining atomic intrinsics to use the right register classes on Thumb2,
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and add some basic tests for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132235 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:54:00 +00:00
Eli Friedman
94657b6f8a
Force a triple to make this test pass on Darwin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 23:12:48 +00:00
Cameron Zwarich
f5e771db37
Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
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was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 22:26:04 +00:00
Rafael Espindola
5b23b7fe31
Make size computation less brittle.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 22:05:41 +00:00
Jakob Stoklund Olesen
484a718b55
Make room for register allocation to improve.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132213 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:15:06 +00:00
Evan Cheng
4abce0c90b
Don't use movw / movt for iOS static codegen for now to workaround some tools issues. rdar://9514789
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:11:27 +00:00
Jakob Stoklund Olesen
6205769741
Delete a test that is no longer relevant.
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According to PR2536, the old spiller had trouble with the IMPLICIT_DEF in this
code:
%reg1028<def> = MOV16rm %reg0, 1, %reg0, <ga:g_5>, Mem:LD(2,2) [g_5 + 0]
%reg1039<def> = IMPLICIT_DEF
%reg1038<def> = INSERT_SUBREG %reg1039, %reg1028, 2
%reg1025<def> = AND32ri %reg1038, 65534, %%EFLAGS<imp-def>
However, today we emit a zero-extending load instead:
%vreg10<def> = MOVZX32rm16 %noreg, 1, %noreg, <ga:@g_5>, %noreg; %mem:LD2[@g_5] GR32:%vreg10
%vreg0<def> = AND32ri %vreg10, 65534, %%EFLAGS<imp-def,dead>; %GR32:%vreg0,%vreg10
This makes the test pointless since it no longer creates the spiller hazard.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132210 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 20:02:42 +00:00
Evan Cheng
d3444ff532
Add iOS test
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 19:04:21 +00:00
Eli Friedman
45c4c4f257
And fix the test in r132194.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 18:14:28 +00:00
Eli Friedman
a4d487fc1e
Fix a silly mistake (which trips over an assertion) in r132099. rdar://9515076
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 18:02:04 +00:00
Devang Patel
b58128e2b2
Select DW_AT_const_value size based on variable size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132193 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 16:45:18 +00:00
Cameron Zwarich
f031d0977f
Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-27 05:04:51 +00:00
Chad Rosier
62660310d9
Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist.
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crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 23:13:19 +00:00
Devang Patel
785badb83e
During branch folding avoid inserting redundant DBG_VALUE machine instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 21:47:59 +00:00
Akira Hatanaka
cf0cd8005c
Add support for C++ exception handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132131 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:59:03 +00:00
Eli Friedman
9ebfceee05
Fix test on Windows.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132126 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 18:00:32 +00:00
Stuart Hastings
2aa0f23e1c
Reverting 132105: it broke some LLVM-GCC DejaGNU tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 04:09:49 +00:00
Stuart Hastings
aa4e6afc9b
Correctly handle a one-word struct passed byval on x86_64.
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rdar://problem/6920088
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-26 02:44:56 +00:00
Eli Friedman
76927d7303
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
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The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:49:02 +00:00
Akira Hatanaka
37d22d92df
Define WeakRefDirective.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 23:30:30 +00:00
Eric Christopher
8f89463894
Implement the 'm' modifier. Note that it only works for memory operands.
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Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 20:51:58 +00:00
Akira Hatanaka
9c3d57c45e
Custom-lower FCOPYSIGN nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 19:32:07 +00:00
Cameron Zwarich
106acd4158
Make tTAILJMPr/tTAILJMPrND emit a tBX without a preceding MOV of PC to LR. This
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fixes <rdar://problem/9495913>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 04:45:27 +00:00
Rafael Espindola
fc2bb8c444
Replace the -unwind-tables option with a per function flag. This is more
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LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 03:44:17 +00:00
Akira Hatanaka
053546c31e
Fix lowering of DYNAMIC_STACKALLOC nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-25 02:20:00 +00:00
Eric Christopher
4db7dec70b
Implement the arm 'L' asm modifier.
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Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 23:27:13 +00:00
Eric Christopher
e1739d598d
Implement the immediate part of the 'B' modifier.
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Part of rdar://9119939
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 23:15:43 +00:00
Eric Christopher
0628d38085
Add support for the arm 'y' asm modifier.
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Fixes part of rdar://9444657
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132011 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 22:10:34 +00:00
Akira Hatanaka
9ad65aed36
Test case for r132003.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 21:28:18 +00:00
Akira Hatanaka
f29b9c0734
Fix test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 19:37:15 +00:00
Akira Hatanaka
26b47fd05b
Revision 131986 test case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131987 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 19:29:37 +00:00
Rafael Espindola
10c3e128ef
Fix the defaults for .eh_frame. We were marking it as writable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 02:50:20 +00:00
Evan Cheng
b5a55d979c
- Teach SelectionDAG::isKnownNeverZero to return true (op x, c) when c is
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non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.
rdar://9490949
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-24 01:48:22 +00:00
Akira Hatanaka
f89532f8f6
Add pattern for double-to-integer conversion. Patch by Sasa Stankovic.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131927 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 22:16:43 +00:00
Dan Gohman
1b58d4536a
When checking for signed multiplication overflow, watch out for INT_MIN and -1.
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This fixes PR9845.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 21:07:39 +00:00
Akira Hatanaka
69c19f7316
Change StackDirection from StackGrowsUp to StackGrowsDown.
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The following improvements are accomplished as a result of applying this patch:
- Fixed frame objects' offsets (relative to either the virtual frame pointer or
the stack pointer) are set before instruction selection is completed. There is
no need to wait until Prologue/Epilogue Insertion is run to set them.
- Calculation of final offsets of fixed frame objects is straightforward. It is
no longer necessary to assign negative offsets to fixed objects for incoming
arguments in order to distinguish them from the others.
- Since a fixed object has its relative offset set during instruction
selection, there is no need to conservatively set its alignment to 4.
- It is no longer necessary to reorder non-fixed frame objects in
MipsFrameLowering::adjustMipsStackFrame.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 20:16:59 +00:00
Devang Patel
26ffad8c49
Test case for r131908.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 17:49:29 +00:00
Devang Patel
35b6994608
While replacing all uses of a SDValue with another value, do not forget to transfer SDDbgValue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131907 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 17:35:08 +00:00
Cameron Zwarich
d34d429401
Fix <rdar://problem/9476260> by having tail calls always generate 32-bit branches
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in Darwin Thumb2 code. Tail calls are already disabled on Thumb1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-23 01:57:17 +00:00
Renato Golin
1ec11fb8b5
RTABI chapter 4.3.4 specifies __eabi_mem* calls. Specifically, __eabi_memset accepts parameters (ptr, size, value) in a different order than GNU's memset (ptr, value, size), therefore the special lowering in AAPCS mode. Implementation by Evzen Muller.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 21:41:23 +00:00
Benjamin Kramer
f55d26e788
Implement mulo x, 2 -> addo x, x in DAGCombiner.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131800 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 18:31:55 +00:00
Benjamin Kramer
a0962766ba
Merge and FileCheckize test cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131799 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-21 18:31:48 +00:00
Eli Friedman
c088345f13
Add fast-isel support for byval calls on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 22:21:04 +00:00
Stuart Hastings
0e29ed081b
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
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rdar://problem/8614450
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 19:04:40 +00:00
Akira Hatanaka
17a1e87751
Make $fp and $ra callee-saved registers and let PrologEpilogInserter handle
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saving and restoring them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 18:39:33 +00:00
Chad Rosier
5def9657e4
Fixed regression due to commit 131709, which disables vararg tail call optimizations on Win64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131740 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 17:49:39 +00:00
Benjamin Kramer
eb274e6bdd
Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131730 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 15:11:26 +00:00
Cameron Zwarich
21a70bf4a5
Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to preserve
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the phikill flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 03:54:04 +00:00
Akira Hatanaka
cd0f90f831
Fix bug in which nodes that write to argument registers do not get glued with the JALR node. Patch by Sasa Stankovic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131714 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 02:30:51 +00:00
Chad Rosier
a166089f36
Don't attempt to tail call optimize for Win64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131709 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:59:28 +00:00
Evan Cheng
2e6496026f
Revert r131664 and fix it in instcombine instead. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131708 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-20 00:54:37 +00:00
Eli Friedman
dc51575a5f
Add fast-isel support for zeroext and signext ret instructions on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 22:16:13 +00:00
Eric Christopher
2bbecd8f6d
Oddly people want to use the 'r' constraint for fp constants on x86.
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Fixes rdar://9218925
Fixes PR9601
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:33:47 +00:00
Eli Friedman
24a69c7be2
Fix up this test to use explicit triples (Win64 passes a different number of arguments in registers).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 21:13:08 +00:00
Akira Hatanaka
a1a7ba8382
Align i64 arguments to 64 bit boundaries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 20:29:48 +00:00
Evan Cheng
0efaa5e6a1
crc32 with 64-bit output zeros upper 32-bits. rdar://9467055
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 18:57:12 +00:00
Stuart Hastings
26847d40db
Move test to Transforms/InstCombine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-19 05:53:22 +00:00
Tanya Lattner
db28247522
Handle perfect shuffle case that generates a vrev for vectors of floats.
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Add test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131582 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-18 21:44:54 +00:00