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bb4dca3286
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3412 Commits

Author SHA1 Message Date
Chris Lattner
bb4dca3286 Fix a spurious warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19799 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-24 01:40:18 +00:00
Chris Lattner
0a07883694 Silence a warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19798 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 23:20:06 +00:00
Chris Lattner
42e25b387f Allow the FP stackifier to completely ignore functions that do not use FP at 
all.  This should speed up the X86 backend fairly significantly on integer
codes.  Now if only we didn't have to compute livevar still... ;-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19796 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 23:13:59 +00:00
Chris Lattner
1fefef1b27 Build Alpha by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19777 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 04:34:46 +00:00
Reid Spencer
a8411a698e Fix alloca support for Cygwin. On cygwin its __alloca not __builtin_alloca 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19776 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 04:32:47 +00:00
Reid Spencer
5dc81f63d1 Support Cygwin assembly generation. The cygwin version of Gnu ASsembler 
doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19775 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-23 03:52:14 +00:00
Andrew Lenharth
304d0f3076 Let me introduce you to the early stages of the llvm backend for the alpha processor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19764 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-22 23:41:55 +00:00
Chris Lattner
fb0f53f9c1 Speed up folding operations into loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19733 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-21 21:43:02 +00:00
Chris Lattner
67b1c3c404 The ever-important vanity pass name :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19731 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-21 21:35:14 +00:00
Chris Lattner
b62e1e296e Fix a FIXME: realize that argument stores are all independent (don't alias) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19728 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-21 19:46:38 +00:00
Chris Lattner
19ad0620bc Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This 
fixes most of the remaining llc-beta failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19716 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-20 18:53:00 +00:00
Chris Lattner
bf52d49f36 Fix a crash compiling 134.perl. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19711 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-20 16:50:16 +00:00
Chris Lattner
c3c021bcad Fix a problem where were were literally selecting for INCREASED register 
pressure, not decreases register pressure.  Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail.  This fixes
fourinarow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19697 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 17:24:34 +00:00
Chris Lattner
a76f04828a When commuting these instructions, make sure to actually swap the operands too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19694 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 16:55:52 +00:00
Chris Lattner
4053b1e30b Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which 
typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles).  This also saves code space.

For example, instead of emitting:

rotr:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %CL, BYTE PTR [%ESP + 8]
        shrd %EAX, %EAX, %CL
        ret
rotli:
        mov %EAX, DWORD PTR [%ESP + 4]
        shrd %EAX, %EAX, 27
        ret

Emit:

rotr32:
        mov %CL, BYTE PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, %CL
        ret
rotli32:
        mov %EAX, DWORD PTR [%ESP + 4]
        ror %EAX, 27
        ret

We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19692 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 08:07:05 +00:00
Chris Lattner
40ff633b05 Add rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:50:03 +00:00
Chris Lattner
30ea1e9411 Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19689 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:37:26 +00:00
Chris Lattner
0df53d22c3 Improve coverage of the X86 instruction set by adding 16-bit shift doubles. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:31:24 +00:00
Chris Lattner
41e431ba04 Teach the code generator that shrd/shld is commutable if it has an immediate. 
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 07:11:01 +00:00
Chris Lattner
167b10cba4 Finegrainify namespacification 
Add default impl of commuteInstruction
Add notes about ugly V9 code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19684 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 06:53:34 +00:00
Chris Lattner
8571637ee9 Codegen long >> 2 to this: 
foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shrd %EAX, %EDX, 2
        sar %EDX, 2
        ret

instead of this:

test1:
        mov %ECX, DWORD PTR [%ESP + 4]
        shr %ECX, 2
        mov %EDX, DWORD PTR [%ESP + 8]
        mov %EAX, %EDX
        shl %EAX, 30
        or %EAX, %ECX
        sar %EDX, 2
        ret

and long << 2 to this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
***     mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        shr %ECX, 30
        mov %EDX, DWORD PTR [%ESP + 8]
        shl %EDX, 2
        or %EDX, %ECX
        shl %EAX, 2
        ret

The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 06:18:43 +00:00
Chris Lattner
009b55b6f6 X86 shifts mask the amount. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19678 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-19 03:36:30 +00:00
Chris Lattner
477c931852 Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to 
FP_EXTEND from!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19674 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 20:05:56 +00:00
Chris Lattner
3dd68151dc Remove more dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19673 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 19:50:08 +00:00
Chris Lattner
a7a4c0f7c4 The selection dag code handles the promotions from F32 to F64 for us, so we 
don't need to even think about F32 in the X86 code anymore.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19672 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 19:46:54 +00:00
Chris Lattner
b422aeac9e Fix 124.m88ksim. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19667 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 17:35:28 +00:00
Chris Lattner
811482a82b Do not emit loads multiple times, potentially in the wrong places. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19661 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 04:18:32 +00:00
Tanya Lattner
0111474bde Minor changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19660 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 04:15:41 +00:00
Chris Lattner
b71f8fc99d Eliminate bad assertions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19659 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 04:00:54 +00:00
Chris Lattner
4a108668df * Eliminate the TokenSet and just use the ExprMap for both tokens and values. 
* Insert some really pedantic assertions that will notice when we emit the
  same loads more than one time, exposing bugs.  This turns a miscompilation in
  bzip2 into a compile-fail.  yaay.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19658 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 03:51:59 +00:00
Chris Lattner
883c86f510 Rely on the code in MatchAddress to do this work. Otherwise we fail to 
match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 02:25:52 +00:00
Chris Lattner
98a8ba0393 Fix a problem where probing for addressing modes caused expressions to be 
emitted too early.  In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.

This also improves the 2nd basic block in 164.gzip:flush_block, which went from

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree + 20]
        movzx %ECX, WORD PTR [dyn_ltree + 16]
        mov DWORD PTR [%ESP + 32], %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        movzx %EDX, WORD PTR [dyn_ltree + 8]
        movzx %EBX, WORD PTR [dyn_ltree + 4]
        mov DWORD PTR [%ESP + 36], %EBX
        movzx %EBX, WORD PTR [dyn_ltree]
        add DWORD PTR [%ESP + 36], %EBX
        add %EDX, DWORD PTR [%ESP + 36]
        add %ECX, %EDX
        add DWORD PTR [%ESP + 32], %ECX
        add %EAX, DWORD PTR [%ESP + 32]
        movzx %ECX, WORD PTR [dyn_ltree + 24]
        add %EAX, %ECX
        mov %ECX, 0
        mov %EDX, %ECX

to

.LBBflush_block_1:      # loopentry.1.i
        movzx %EAX, WORD PTR [dyn_ltree]
        movzx %ECX, WORD PTR [dyn_ltree + 4]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 8]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 12]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 16]
        add %EAX, %ECX
        movzx %ECX, WORD PTR [dyn_ltree + 20]
        add %ECX, %EAX
        movzx %EAX, WORD PTR [dyn_ltree + 24]
        add %ECX, %EAX
        mov %EAX, 0
        mov %EDX, %EAX

... which results in less spilling in the function.

This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc.  The
default isel takes 37.31s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19650 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-18 01:06:26 +00:00
Chris Lattner
e9fe2bcac2 Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19649 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 23:25:45 +00:00
Chris Lattner
869e0434ae Don't bother using max here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19647 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 23:02:13 +00:00
Chris Lattner
90d1be7eef Do not give token factor nodes outrageous weights 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19645 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 22:56:09 +00:00
Chris Lattner
5c65981a57 Two changes: 
1. Fold  [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
 2. Do not let token factor nodes prevent forming '[mem] op= val' folds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19643 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 22:10:42 +00:00
Chris Lattner
e10269ba30 Refactor load/op/store folding into it's own method, no functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19641 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 19:25:26 +00:00
Chris Lattner
ae3ffba466 Fix a major regression last night that prevented us from producing [mem] op= reg 
operations.

The body of the if is less indented but unmodified in this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19638 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 17:49:14 +00:00
Chris Lattner
2a4e508281 Codegen this: 
int %foo(int %X) {
        %T = add int %X, 13
        %S = mul int %T, 3
        ret int %S
}

as this:

        mov %ECX, DWORD PTR [%ESP + 4]
        lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
        ret

instead of this:

        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, %ECX
        add %EAX, 13
        imul %EAX, %EAX, 3
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19633 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:48:02 +00:00
Tanya Lattner
7a866d9a43 Added tmp instructions to preserve ssa. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19632 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:47:26 +00:00
Chris Lattner
4ff348befa Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg. 
Do not fold a load into an operation if it will induce a cycle in the DAG.

Repeat after me: dAg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19631 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 06:26:58 +00:00
Chris Lattner
cb1aa8d772 Do not fold a load into a comparison that is used by more than one place. 
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19624 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 01:34:14 +00:00
Chris Lattner
c98279d371 Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits 
of the bytereg.  This fixes yacr2, 300.twolf and probably others.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19622 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 00:23:16 +00:00
Chris Lattner
4df0de975a Set up the shift and setcc types. 
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19620 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-17 00:00:33 +00:00
Tanya Lattner
7600587e66 Added paramters to a few functions in order to allow me to change the functions to preserve SSA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19615 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 08:51:10 +00:00
Chris Lattner
da2ce11407 * Adjust to changes in TargetLowering interfaces. 
* Remove custom promotion for bool and byte select ops.  Legalize now
  promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
  for i16 types.  This is useful for testing promotion code because I can
  just remove 16-bit registers all together and verify that programs work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19614 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 07:34:08 +00:00
Chris Lattner
ccad8439e0 cycles_t -> CycleCount_t 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19604 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 04:20:30 +00:00
Reid Spencer
bdf6a39d1c Rename BUILD_* to PROJ_* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19592 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 02:21:29 +00:00
Tanya Lattner
5fd2ef1e43 Fixed a couple of instructions that broke SSA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19587 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 02:14:17 +00:00
Chris Lattner
638559aaa3 Improve compatiblity with HPUX on Itanium, patch by Duraid Madina 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19586 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-01-16 01:31:31 +00:00