Commit Graph

4468 Commits

Author SHA1 Message Date
Asaf Badouh
bc5667c7ac [AVX512]
add instructions: VPAVGB and VPAVGW


review
http://reviews.llvm.org/D10504

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 12:30:53 +00:00
Elena Demikhovsky
6c24289bef AVX-512: (fixed) Added encoding of all forms of VPERMT2W/D/Q/PS/PD and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 08:56:19 +00:00
Elena Demikhovsky
f3d6e24ca4 reverted 239999 due to test failures
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240001 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 08:06:49 +00:00
Elena Demikhovsky
5686493ccc AVX-512: Added encoding of all forms of VPERMT2W/D/Q/PS/PD
and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239999 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 07:29:40 +00:00
Benjamin Kramer
4bf8188289 [MC/Dwarf] Encode DW_CFA_advance_loc in target endianess.
This matches GNU as output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239911 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 15:14:35 +00:00
Toma Tabacu
d510c1085a [mips] [IAS] Add support for expanding LASym with a source register operand.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9348

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239910 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 14:31:51 +00:00
Toma Tabacu
279a212ca2 [mips] [IAS] Add support for the B{L,G}{T,E}(U) branch pseudo-instructions.
Summary:
This does not include support for the immediate variants of these pseudo-instructions.
Fixes llvm.org/PR20968.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D8537

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239905 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 13:20:24 +00:00
Toma Tabacu
87f93f5387 [mips] [IAS] Fix LA with relative label operands.
Summary:
Call MCSymbolRefExpr::create() with a MCSymbol* argument, not with a StringRef
of the Symbol's name, in order to avoid creating invalid temporary symbols for
relative labels (e.g. {$,.L}tmp00, {$,.L}tmp10 etc.).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239901 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 12:30:37 +00:00
Toma Tabacu
d3b8136e1d [mips] [IAS] Add test for SW with relative label operands. NFC.
Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10497

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239899 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 11:46:37 +00:00
Toma Tabacu
e7684db38f [mips] [IAS] Fix LW with relative label operands.
Summary:
Previously, MCSymbolRefExpr::create() was called with a StringRef of the symbol
name, which it would then search for in the Symbols StringMap (from MCContext).

However, relative labels (which are temporary symbols) are apparently not stored
in the Symbols StringMap, so we end up creating a new {$,.L}tmp symbol
({$,.L}tmp00, {$,.L}tmp10 etc.) each time we create an MCSymbolRefExpr by
passing in the symbol name as a StringRef.

Fortunately, there is a version of MCSymbolRefExpr::create() which takes an
MCSymbol* and we already have an MCSymbol* at that point, so we can just pass
that in instead of the StringRef.

I also removed the local StringRef calls to MCSymbolRefExpr::create() from
expandMemInst(), as those cases can be handled by evaluateRelocExpr() anyway.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9938

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239897 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 10:43:45 +00:00
Kit Barton
1b26bfbef1 Properly handle the mftb instruction.
The mftb instruction was incorrectly marked as deprecated in the PPC
Backend. Instead, it should not be treated as deprecated, but rather be
implemented using the mfspr instruction. A similar patch was put into GCC last
year. Details can be found at:

https://sourceware.org/ml/binutils/2014-11/msg00383.html.
This change will replace instances of the mftb instruction with the mfspr
instruction for all CPUs except 601 and pwr3. This will also be the default
behaviour.

Additional details can be found in:

https://llvm.org/bugs/show_bug.cgi?id=23680

Phabricator review: http://reviews.llvm.org/D10419


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:01:15 +00:00
Daniel Sanders
b17a563e9a [mips][ias] Expand on r238751 to cover as many relocs as possible.
Summary:
Relocs that can be converted from absolute to PC-relative now do so if IsPCRel
is true. Relocs that require PC-relative now call llvm_unreachable() if IsPCRel
is false and similarly those that require absolute assert that IsPCRel is false.

Note that while it looks like some relocs (e.g. R_MIPS_26) can be converted into
the MIPS32r6/MIPS64r6 relocs (R_MIPS_PC*_S2), it isn't actually valid to do so.

Placeholders have been left in the testcase for unsupported relocs and relocs
that cannot be generated at the moment.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits, rafael

Differential Revision: http://reviews.llvm.org/D10184

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239817 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 13:46:26 +00:00
Daniel Sanders
a8cc053519 [llvm-mc] The object form of the GNU triple should be the same as the string form.
Summary:
GetTarget() may modify TripleName without also updating TheTriple.
This can lead to situations where the MCObjectStreamer has a different triple
to the rest of LLVM.

This inconsistency caused sparc-little-endian.s to pass on Windows because most
of LLVM had sparcel-pc-win32 while MCObjectStreamer had "". I believe the same
kind of thing was also true of Darwin.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin, rafael

Differential Revision: http://reviews.llvm.org/D10450

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239808 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 09:57:38 +00:00
Michael Kuperstein
3dd555171e Add support for parsing the XOR operator in Intel syntax inline assembly.
Differential Revision: http://reviews.llvm.org/D10385
Patch by marina.yatsina@intel.com


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 12:59:45 +00:00
Igor Breger
6ea3ad7e6e AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.
Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.

Differential Revision: http://reviews.llvm.org/D10430

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 12:44:55 +00:00
Tom Stellard
953c681473 R600 -> AMDGPU rename
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239657 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:28:10 +00:00
Tom Stellard
f28da43112 R600/SI: Add assembler support for FLAT instructions
- Add glc, slc, and tfe operands to flat instructions
- Add missing flat instructions
- Fix the encoding of flat_load_dwordx3 and flat_store_dwordx3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239637 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-12 20:47:06 +00:00
Toma Tabacu
f24e4e46cd Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
Apparently, Arcanist didn't include some of my local changes in my previous
commit attempt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239523 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 10:36:10 +00:00
Zoran Jovanovic
9d115effdf [mips][microMIPS] Implement ERET and ERETNC instructions
http://reviews.llvm.org/D10091


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239522 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 10:22:46 +00:00
Zoran Jovanovic
d09e8beec3 [mips] Change existing uimm10 operand to restrict the accepted immediates
http://reviews.llvm.org/D10312


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:51:58 +00:00
Zoran Jovanovic
938cba6ae3 [mips][microMIPSr6] Change disassembler tests to one line format
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 09:42:10 +00:00
Nemanja Ivanovic
f7d6501d1d LLVM support for vector quad bit permute and gather instructions through builtins
This patch corresponds to review:
http://reviews.llvm.org/D10096

This is the back end portion of the patch related to D10095.
The patch adds the instructions and back end intrinsics for:
vbpermq
vgbbd


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 06:21:25 +00:00
Colin LeMahieu
c196bfecd6 [Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239477 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 16:52:32 +00:00
Toma Tabacu
c154887856 Recommit "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).
Specified the llvm namespace for the 2 calls to make_unique() which caused
compilation errors in Visual Studio 2013.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239405 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 13:33:26 +00:00
Elena Demikhovsky
22debdcab6 X86-MPX: Implemented encoding for MPX instructions.
Added encoding tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239403 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 13:02:10 +00:00
Toma Tabacu
695a997ef2 Revert "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." (r239396).
It was breaking buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239397 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 10:43:49 +00:00
Toma Tabacu
dc2af2605f [mips] [IAS] Add support for BNE and BEQ with an immediate operand.
Summary:
For some branches, GAS accepts an immediate instead of the 2nd register operand.
We only implement this for BNE and BEQ for now. Other branch instructions can be added later, if needed.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: seanbruno, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D9666

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239396 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 10:34:31 +00:00
Ranjeet Singh
1666977cd0 [AArch64] AsmParser should be case insensitive about accepting vector register names.
Differential Revision: http://reviews.llvm.org/D10320


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239353 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 21:32:16 +00:00
Rafael Espindola
279ef837e8 Fix a regression in .pop_section.
It was calling ChangeSection with the wrong current section, eventually leading
to a crash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239335 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 20:08:55 +00:00
Javed Absar
d48ce2c34f ARM]: Add support for MMFR4_EL1 in assembler
This patch adds support for system register MMFR4_EL1 (memory model feature register) in the assembler.
This register provides information about the implemented memory model and memory management support.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 15:01:11 +00:00
Igor Breger
17e24879cb AVX-512: Implemented 256/128bit VALIGND/Q instructions for SKX and KNL
Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

Differential Revision: http://reviews.llvm.org/D10310

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 14:03:17 +00:00
Colin LeMahieu
8cc8dbc062 [objdump] Moving PrintImmHex out of MachODump and in to llvm-objdump and setting instprinter appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239265 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 21:07:17 +00:00
Colin LeMahieu
4514db2bfb Teaching llvm-mc how to understand the defsym command line option. This allows integer-constant symbols to be defined on the command line and used during assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239240 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 01:46:24 +00:00
Colin LeMahieu
2ca8f0f5d6 [MC] Common symbols weren't being checked for redeclaration which allowed an assembly file to generate an assertion in setCommon(): !isCommon(). This change allows redeclaration as long as the size and alignment match exactly, otherwise report a fatal error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239227 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 20:12:40 +00:00
Rafael Espindola
dcb11d3206 Handle 16 bit PC relative relocations.
Fixes pr23771.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239214 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-06 02:29:56 +00:00
Colin LeMahieu
750b351b76 [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239161 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 16:00:11 +00:00
John Brawn
272d7fdf42 [ARM] Add support for -sp- FPUs and FPU none to TargetParser
These are added mainly for the benefit of clang, but this also means that they
are now allowed in .fpu directives and we emit the correct .fpu directive when
single-precision-only is used.

Differential Revision: http://reviews.llvm.org/D10238


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 13:31:19 +00:00
Toma Tabacu
dbaee6dadd Revert "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).
This is breaking the Windows buildbots.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 12:19:27 +00:00
Toma Tabacu
b349e0f1f1 [mips] [IAS] Restore STI.FeatureBits in .set pop.
Summary:
Only restoring AvailableFeatures is not enough and will lead to buggy behaviour.
For example, if we have a feature enabled and we ".set pop", the next time we try
to ".set" that feature nothing will happen because the "!(STI.getFeatureBits()[Feature])"
check will be false, because we didn't restore STI.FeatureBits.

In order to fix this, we need to make MipsAssemblerOptions remember the STI.FeatureBits
instead of the AvailableFeatures and then regenerate AvailableFeatures each time we ".set pop".
This is because, AFAIK, there is no way to convert from AvailableFeatures back to STI.FeatureBits,
but the reverse is possible by using ComputeAvailableFeatures(STI.FeatureBits).

I also moved the updating of AssemblerOptions inside the "if" statement in
setFeatureBits() and clearFeatureBits(), as there is no reason to update if
nothing changes.

Reviewers: dsanders, mkuper

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9156

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239144 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 11:48:54 +00:00
Jim Grosbach
aa48bf4e1c MC: Remove obsolete MachO UseAggressiveSymbolFolding.
Fix the FIXME and remove this old as(1) compat option. It was useful for
bringup of the integrated assembler to diff object files, but now it's
just causing more relocations than strictly necessary to be generated.

rdar://21201804

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239084 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 20:27:42 +00:00
Rafael Espindola
9f299abc05 Omit unused section symbols from the symbol table.
Section symbols exist as an optimization: instead of having multiple relocations
point to different symbols, many of them can point to a single section symbol.

When that optimization is unused, a section symbol is also unused and adds no
extra information to the object file.

This saves a bit of space on the object files and makes the output of
llvm-objdump -t easier to read and consequently some tests get quite a bit
simpler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239045 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 15:33:30 +00:00
Rafael Espindola
0f898d59f8 No need to check the raw relocation bytes if checking the parsed dump.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239042 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 15:21:17 +00:00
Rafael Espindola
523b2cdb29 llvm-readobj can parse relocations, no need to check the raw bytes.x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239041 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 15:15:12 +00:00
Igor Breger
7c290adeb4 Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 07:23:38 +00:00
Elena Demikhovsky
1bbb64b206 AVX-512: added all SKX forms of VPERMW/D/Q instructions.
Added all forms of VPERMPS/PD instrcuctions.
Added encoding tests.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239016 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 07:07:13 +00:00
Rafael Espindola
79fa3fc84a Add testcase that would crash before the previous revert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239011 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 05:51:13 +00:00
Asaf Badouh
ce375dc63a re-apply 238809
AVX-512: Implemented GETEXP instruction for KNL and SKX
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
CR:
http://reviews.llvm.org/D9991


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238923 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-03 13:41:48 +00:00
Elena Demikhovsky
23dc4bbf1d AVX-512: Implemented SHUFF32x4/SHUFF64x2/SHUFI32x4/SHUFI64x2 instructions for SKX and KNL.
Added tests for encoding.

By Igor Breger (igor.breger@intel.com)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238917 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-03 10:56:40 +00:00
Rafael Espindola
201a551929 Fix the interpretation of a 0 st_name.
The ELF spec is very clear:

-----------------------------------------------------------------------------
If the value is non-zero, it represents a string table index that gives the
symbol name. Otherwise, the symbol table entry has no name.
--------------------------------------------------------------------------

In particular, a st_name of 0 most certainly doesn't mean that the symbol has
the same name as the section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238899 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-03 05:14:22 +00:00
Tim Northover
33d75a269c AArch64: fix typo in SMIN far atomics and add tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238858 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-02 18:37:20 +00:00