Commit Graph

107 Commits

Author SHA1 Message Date
Eli Friedman
c680ac9003 Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
value.  Adjust other code to deal with that correctly.  Make 
DAGTypeLegalizer::PromoteIntRes_EXTRACT_VECTOR_ELT take advantage of 
this new flexibility to simplify the code and make it deal with unusual 
vectors (like <4 x i1>) correctly.  Fixes PR3037.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 22:01:03 +00:00
Duncan Sands
8c899ee031 Remove trailing whitespace. Reorder some methods
and cases alphabetically.  No functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75001 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 11:36:39 +00:00
Sanjiv Gupta
a43a7aefd7 Allow libcalls for i16 sdiv/udiv/rem operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72941 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 14:41:10 +00:00
Dale Johannesen
4c9369df57 Fix FP_TO_UINT->i32 on ppc32 -mcpu=g5. This was
using Promote which won't work because i64 isn't
a legal type.  It's easy enough to use Custom, but
then we have the problem that when the type
legalizer is promoting FP_TO_UINT->i16, it has no
way of telling it should prefer FP_TO_SINT->i32
to FP_TO_UINT->i32.  I have uncomfortably hacked
this by making the type legalizer choose FP_TO_SINT
when both are Custom.
This fixes several regressions in the testsuite.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72891 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 20:53:52 +00:00
Dale Johannesen
874ae251c3 Revert 72707 and 72709, for the moment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72712 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-02 03:12:52 +00:00
Dale Johannesen
4150d83abe Make the implicit inputs and outputs of target-independent
ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72707 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-01 23:27:20 +00:00
Duncan Sands
f43071bedd Rename CustomLowerResults to CustomLowerNode, since
it is used both when a result is illegal and when an
operand is illegal.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-31 04:15:38 +00:00
Bob Wilson
c885165e66 Revise my previous change 68996 as suggested by Duncan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69607 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-20 17:27:09 +00:00
Duncan Sands
b10b5ac8d9 Don't try to make BUILD_VECTOR operands have the same
type as the vector element type: allow them to be of
a wider integer type than the element type all the way
through the system, and not just as far as LegalizeDAG.
This should be safe because it used to be this way
(the old type legalizer would produce such nodes), so
backends should be able to handle it.  In fact only
targets which have legal vector types with an illegal
promoted element type will ever see this (eg: <4 x i16>
on ppc).  This fixes a regression with the new type
legalizer (vec_splat.ll).  Also, treat SCALAR_TO_VECTOR
the same as BUILD_VECTOR.  After all, it is just a
special case of BUILD_VECTOR.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@69467 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-18 20:16:54 +00:00
Bob Wilson
b1303d05a8 Change SelectionDAG type legalization to allow BUILD_VECTOR operands to be
promoted to legal types without changing the type of the vector.  This is
following a suggestion from Duncan
(http://lists.cs.uiuc.edu/pipermail/llvmdev/2009-February/019923.html).
The transformation that used to be done during type legalization is now
postponed to DAG legalization.  This allows the BUILD_VECTORs to be optimized
and potentially handled specially by target-specific code.

It turns out that this is also consistent with an optimization done by the
DAG combiner: a BUILD_VECTOR and INSERT_VECTOR_ELT may be combined by
replacing one of the BUILD_VECTOR operands with the newly inserted element;
but INSERT_VECTOR_ELT allows its scalar operand to be larger than the
element type, with any extra high bits being implicitly truncated.  The
result is a BUILD_VECTOR where one of the operands has a type larger the
the vector element type.

Any code that operates on BUILD_VECTORs may now need to be aware of the
potential type discrepancy between the vector element type and the
BUILD_VECTOR operands.  This patch updates all of the places that I could
find to handle that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68996 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-13 22:05:19 +00:00
Dan Gohman
fc1665793e Remove the obsolete SelectionDAG::getNodeValueTypes and simplify
code that uses it by using SelectionDAG::getVTList instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68744 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-09 23:54:40 +00:00
Evan Cheng
6fb2168aae Fully general expansion of integer shift of any size.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68134 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-31 19:39:24 +00:00
Mon P Wang
aa9df0b0c3 Added missing support for widening when splitting an unary op (PR3683)
and expanding a bit convert (PR3711).  In both cases, we extract the
valid part of the widen vector and then do the conversion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67175 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-18 06:24:04 +00:00
Evan Cheng
1606e8e4cd Fix some significant problems with constant pools that resulted in unnecessary paddings between constant pool entries, larger than necessary alignments (e.g. 8 byte alignment for .literal4 sections), and potentially other issues.
1. ConstantPoolSDNode alignment field is log2 value of the alignment requirement. This is not consistent with other SDNode variants.
2. MachineConstantPool alignment field is also a log2 value.
3. However, some places are creating ConstantPoolSDNode with alignment value rather than log2 values. This creates entries with artificially large alignments, e.g. 256 for SSE vector values.
4. Constant pool entry offsets are computed when they are created. However, asm printer group them by sections. That means the offsets are no longer valid. However, asm printer uses them to determine size of padding between entries.
5. Asm printer uses expensive data structure multimap to track constant pool entries by sections.
6. Asm printer iterate over SmallPtrSet when it's emitting constant pool entries. This is non-deterministic.


Solutions:
1. ConstantPoolSDNode alignment field is changed to keep non-log2 value.
2. MachineConstantPool alignment field is also changed to keep non-log2 value.
3. Functions that create ConstantPool nodes are passing in non-log2 alignments.
4. MachineConstantPoolEntry no longer keeps an offset field. It's replaced with an alignment field. Offsets are not computed when constant pool entries are created. They are computed on the fly in asm printer and JIT.
5. Asm printer uses cheaper data structure to group constant pool entries.
6. Asm printer compute entry offsets after grouping is done.
7. Change JIT code to compute entry offsets on the fly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66875 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-13 07:51:59 +00:00
Eli Friedman
27759f41ca PR3686: make the legalizer handle bitcast from i80 to x86 long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66021 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-04 06:23:34 +00:00
Evan Cheng
a87008d90b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 22:49:59 +00:00
Scott Michel
4214a5531c Introduce the BuildVectorSDNode class that encapsulates the ISD::BUILD_VECTOR
instruction. The class also consolidates the code for detecting constant
splats that's shared across PowerPC and the CellSPU backends (and might be
useful for other backends.) Also introduces SelectionDAG::getBUID_VECTOR() for
generating new BUILD_VECTOR nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65296 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-22 23:36:09 +00:00
Scott Michel
fdc40a0a69 Remove trailing whitespace to reduce later commit patch noise.
(Note: Eventually, commits like this will be handled via a pre-commit hook that
 does this automagically, as well as expand tabs to spaces and look for 80-col
 violations.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-17 22:15:04 +00:00
Dale Johannesen
b300d2aa3e Get rid of the last non-DebugLoc versions of getNode!
Many targets build placeholder nodes for special operands, e.g.
GlobalBaseReg on X86 and PPC for the PIC base.  There's no
sensible way to associate debug info with these.  I've left
them built with getNode calls with explicit DebugLoc::getUnknownLoc operands. 
I'm not too happy about this but don't see a good improvement;
I considered adding a getPseudoOperand or something, but it
seems to me that'll just make it harder to read.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-07 00:55:49 +00:00
Dale Johannesen
e8d7230f48 Remove more non-DebugLoc getNode variants. Use
getCALLSEQ_{END,START} to permit passing no DebugLoc
there.  UNDEF doesn't logically have DebugLoc; add
getUNDEF to encapsulate this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63978 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 23:05:02 +00:00
Dale Johannesen
de06470330 Remove more non-DebugLoc versions of getNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-06 21:50:26 +00:00
Dale Johannesen
4be0bdf7c1 Remove non-DebugLoc versions of getMergeValues, ZeroExtendInReg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63800 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-05 00:20:09 +00:00
Dale Johannesen
f8d3ec2c57 Check in file I forgot.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63704 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 01:33:20 +00:00
Dale Johannesen
c460ae9001 Fill in more omissions in DebugLog propagation.
I think that's it for this directory.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63690 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-04 00:13:36 +00:00
Dale Johannesen
ff97d4fe81 Propagation in TargetLowering. Includes passing a DL
into SimplifySetCC which gets called elsewhere.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63583 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-03 00:47:48 +00:00
Duncan Sands
7fb0858718 Remove trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63540 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 19:46:41 +00:00
Sanjiv Gupta
55467af316 Duncan's patch. Further to 64382. Takes care of illegal types for shift amount.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 17:19:39 +00:00
Mon P Wang
c82bf9b268 Preserve more SourceValue information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63498 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-02 06:37:55 +00:00
Duncan Sands
92abc62399 Fix PR3401: when using large integers, the type
returned by getShiftAmountTy may be too small
to hold shift values (it is an i8 on x86-32).
Before and during type legalization, use a large
but legal type for shift amounts: getPointerTy;
afterwards use getShiftAmountTy, fixing up any
shift amounts with a big type during operation
legalization.  Thanks to Dan for writing the
original patch (which I shamelessly pillaged).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-31 15:50:11 +00:00
Dale Johannesen
786fd4dded Propagate debug info. This file complete
(modulo bugs)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63457 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-31 00:20:43 +00:00
Dale Johannesen
c8fc99d66a Propagate debug info through MakeLibCall and a
couple of things that use it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63456 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-31 00:11:23 +00:00
Mon P Wang
f7eef6811c Fixed extract element when the result needs to be promoted and the input widened.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63217 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 18:53:39 +00:00
Dan Gohman
f560ffae1f Make isOperationLegal do what its name suggests, and introduce a
new isOperationLegalOrCustom, which does what isOperationLegal
previously did.

Update a bunch of callers to use isOperationLegalOrCustom
instead of isOperationLegal. In some case it wasn't obvious
which behavior is desired; when in doubt I changed then to
isOperationLegalOrCustom as that preserves their previous
behavior.

This is for the second half of PR3376.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@63212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-28 17:46:25 +00:00
Duncan Sands
9fbc7e2e7a Cleanup whitespace and comments, and tweak some
prototypes, in operand type legalization.  No
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62680 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 09:00:29 +00:00
Sanjiv Gupta
bb326bbe88 Allow targets to legalize operations (with illegal operands) that produces multiple values. For example, a load with an illegal operand (a load produces two values, a value and chain).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62663 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-21 04:48:39 +00:00
Sanjiv Gupta
15c94d08ab Few targets like PIC16 wants libcall generation for illegal type i16.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62467 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-18 18:25:27 +00:00
Duncan Sands
042fb3199f Correct a comment - this is not a sign extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62166 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 14:04:14 +00:00
Duncan Sands
b6e223a9e8 Factorize (and generalize) the code promoting SELECT
and BRCOND conditions.  Reorder a few methods while
there.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61547 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01 20:36:20 +00:00
Duncan Sands
5480c0469e Fix PR3274: when promoting the condition of a BRCOND node,
promote from i1 all the way up to the canonical SetCC type.
In order to discover an appropriate type to use, pass
MVT::Other to getSetCCResultType.  In order to be able to
do this, change getSetCCResultType to take a type as an
argument, not a value (this is also more logical).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61542 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-01 15:52:00 +00:00
Dan Gohman
0b1d4a798d Clean up the atomic opcodes in SelectionDAG.
This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61389 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-23 21:37:04 +00:00
Mon P Wang
87c8a8f304 Added support for vector widening.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61209 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-18 20:03:17 +00:00
Eli Friedman
28dc98f752 Fix for PR3225: disable a broken optimization in
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit.

In terms of restoring the optimization, the best fix here isn't 
obvious... any ideas?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-17 03:35:17 +00:00
Mon P Wang
d17c030276 Added support to LegalizeType for expanding the operands of scalar to vector
and insert vector element.  Modified extract vector element to extend the
result to match the expected promoted type.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61029 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-15 06:57:02 +00:00
Mon P Wang
c5d64607c9 Remove assertion to allow promotion of a truncating store operand
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60975 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-13 08:16:43 +00:00
Duncan Sands
ab0c578bfd For amusement, implement SADDO, SSUBO, UADDO, USUBO
for promoted integer types, eg: i16 on ppc-32, or
i24 on any platform.  Complete support for arbitrary
precision integers would require handling expanded
integer types, eg: i128, but I couldn't be bothered.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60834 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-10 12:30:42 +00:00
Bill Wendling
74c3765291 Add sub/mul overflow intrinsics. This currently doesn't have a
target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60800 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 22:08:41 +00:00
Duncan Sands
47d9dcc584 Fix PR3117: not all nodes being legalized. The
essential problem was that the DAG can contain
random unused nodes which were never analyzed.
When remapping a value of a node being processed,
such a node may become used and need to be analyzed;
however due to operands being transformed during
analysis the node may morph into a different one.
Users of the morphing node need to be updated, and
this wasn't happening.  While there I added a bunch
of documentation and sanity checks, so I (or some
other poor soul) won't have to scratch their head
over this stuff so long trying to remember how it
was all supposed to work next time some obscure
problem pops up!  The extra sanity checking exposed
a few places where invariants weren't being preserved,
so those are fixed too.  Since some of the sanity
checking is expensive, I added a flag to turn it
on.  It is also turned on when building with
ENABLE_EXPENSIVE_CHECKS=1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60797 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-09 21:33:20 +00:00
Duncan Sands
1607f05cb7 Change the interface to the type legalization method
ReplaceNodeResults: rather than returning a node which
must have the same number of results as the original
node (which means mucking around with MERGE_VALUES,
and which is also easy to get wrong since SelectionDAG
folding may mean you don't get the node you expect),
return the results in a vector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60348 91177308-0d34-0410-b5e6-96231b3b80d8
2008-12-01 11:39:25 +00:00
Duncan Sands
03228089d5 Rename SetCCResultContents to BooleanContents. In
practice these booleans are mostly produced by SetCC,
however the concept is more general.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59911 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-23 15:47:28 +00:00
Bill Wendling
253174bf50 Cleanup of the [SU]ADDO type legalization code. Patch by Duncan!
"It simplifies the type legalization part a bit, and produces better code by
teaching SelectionDAG about the extra bits in an i8 SADDO/UADDO node.  In
essence, I spontaneously decided that on x86 this i8 boolean result would be
either 0 or 1, and on other platforms 0/1 or 0/-1, depending on whether the
platform likes it's boolean zero extended or sign extended."


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59864 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-22 07:24:01 +00:00