Evan Cheng
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9f6636ff0c
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Fix naming inconsistencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35163 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-19 07:48:02 +00:00 |
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Evan Cheng
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fa775d09c6
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Special LDR instructions to load from non-pc-relative constantpools. These are
rematerializable. Only used for constant generation for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35162 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-19 07:20:03 +00:00 |
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Evan Cheng
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a251570417
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Constant generation instructions are re-materializable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35161 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-19 07:09:02 +00:00 |
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Lauro Ramos Venancio
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368f20fda4
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Only ARMv6 has BSWAP.
Fix MultiSource/Applications/aha test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35128 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-16 22:54:16 +00:00 |
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Evan Cheng
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2770747216
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Added isLegalAddressExpression(). Only allows X +/- C for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-16 08:43:56 +00:00 |
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Evan Cheng
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a13fd108f2
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AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-13 21:05:54 +00:00 |
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Evan Cheng
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961f879ed8
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Zero is always a legal AM immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-13 20:37:59 +00:00 |
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Evan Cheng
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e8308df0b9
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Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-13 01:20:42 +00:00 |
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Evan Cheng
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b01fad6d19
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Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-12 23:30:29 +00:00 |
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Evan Cheng
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1a9da0d66c
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Minor stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35049 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-09 19:46:06 +00:00 |
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Evan Cheng
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44f4fca3c0
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Add comments about LSR / ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35048 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-09 19:35:33 +00:00 |
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Evan Cheng
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2265b49193
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Unfinished work and ideas related to register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35047 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-09 19:34:51 +00:00 |
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Dale Johannesen
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818c085232
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apply comments from review of last patch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35045 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-09 19:18:59 +00:00 |
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Dale Johannesen
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a6bc6fc170
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Add some observations from CoreGraphics benchmark. Remove register
scavenging todo item, since it is now implemented.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35044 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-09 17:58:17 +00:00 |
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Evan Cheng
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23a9570494
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Implement inline asm modifier c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35035 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-08 22:42:46 +00:00 |
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Evan Cheng
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b582b1b1fc
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Fix a typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35030 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-08 21:59:30 +00:00 |
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Evan Cheng
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032953d747
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Putting more constants which do not contain relocations into .literal{4|8|16}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35026 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-08 08:31:54 +00:00 |
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Evan Cheng
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bf822eb6a3
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Change register allocation order to Dale's suggestion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35021 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-08 02:56:40 +00:00 |
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Evan Cheng
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11788fde93
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Bug fix. Not advancing the register scavenger iterator correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35020 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-08 02:55:08 +00:00 |
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Evan Cheng
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98ded765c2
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For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35017 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-08 01:25:25 +00:00 |
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Evan Cheng
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603b83ebcd
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Only safe to use a call-clobbered or spilled callee-saved register as scratch register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35010 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-07 20:30:36 +00:00 |
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Anton Korobeynikov
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d0b82b301d
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Refactoring of formal parameter flags. Enable properly use of
zext/sext/aext stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35008 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-07 16:25:09 +00:00 |
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Evan Cheng
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cb20998b3f
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ARM always use register scavenger. No longer reserves R12.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34999 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-07 02:46:23 +00:00 |
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Evan Cheng
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0ea12ec848
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Fix some brittle code. Watch out for cases where register scavenger is pointing to deleted instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34998 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-07 02:38:05 +00:00 |
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Evan Cheng
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3d06cf4584
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Fix one more Thumb eliminateFrameIndex bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34990 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-07 00:12:18 +00:00 |
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Evan Cheng
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e6257632fc
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Register scavenging is now on by default for ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34987 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-06 22:02:53 +00:00 |
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Evan Cheng
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a90f3408b3
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Make load / store optimizer use register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34986 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-06 21:59:20 +00:00 |
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Evan Cheng
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cc1c427266
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Code clean up. Prepare to use register scavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34976 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-06 18:02:41 +00:00 |
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Evan Cheng
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140e33cfd1
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Scavenge a register using the register scavenger when needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34966 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-06 10:03:56 +00:00 |
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Anton Korobeynikov
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1d9baccc9b
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Use new SDIselParamAttr enumeration. This removes "magick" constants
from formal attributes' flags processing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34963 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-06 08:12:33 +00:00 |
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Lauro Ramos Venancio
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6d7dd8ef46
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Use init_array/fini_array sections for static contructors/destructors when the ABI is AAPCS.
Fix SingleSource/Regression/C/ConstructorDestructorAttributes test on arm-linux-gnueabi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34931 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-05 17:59:58 +00:00 |
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Dale Johannesen
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9f8e50d4ed
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eliminate unnecessary reset of SP in epilog on darwin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34824 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-02 01:17:17 +00:00 |
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Evan Cheng
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c1c2de0ae7
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Use a spilled free callee-saved register as scratch register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34785 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-01 08:57:52 +00:00 |
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Evan Cheng
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f49407b790
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- Track which callee-saved registers are spilled.
- Some code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34783 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-01 08:26:31 +00:00 |
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Evan Cheng
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cda067bad9
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Switch from std::vector<bool> to BitVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34781 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-01 07:52:44 +00:00 |
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Bill Wendling
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f1d6006ad6
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Get rid of verboten <iostream> include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34777 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-03-01 06:05:39 +00:00 |
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Dale Johannesen
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b71aa2b6ca
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Changes requested in review of last pass. Also pulled isThumb into a
member, instead of resetting in every function that uses it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34764 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 23:20:38 +00:00 |
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Evan Cheng
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ad78ef2154
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Doh. ARM::PC is obvious a reserved register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 23:12:34 +00:00 |
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Dale Johannesen
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f1b214d3ca
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Add intelligence about where to break large blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34755 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 18:41:23 +00:00 |
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Evan Cheng
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36230cdda4
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Make requiresRegisterScavenging determination on a per MachineFunction basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34711 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 00:59:19 +00:00 |
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Evan Cheng
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41a4d562f7
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Temporary: make R12 available in ARM mode if RegScavenger is being used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34709 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 00:22:44 +00:00 |
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Evan Cheng
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1b051fc6a4
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Start making use of RegScavenger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34708 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 00:21:58 +00:00 |
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Evan Cheng
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5e6df4647e
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PEI now passes a RegScavenger ptr to eliminateFrameIndex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34707 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-28 00:21:17 +00:00 |
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Evan Cheng
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15991bf775
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Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34701 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-27 23:03:55 +00:00 |
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Evan Cheng
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5ef9226f30
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Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34692 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-27 21:12:35 +00:00 |
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Dale Johannesen
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ce74de46dd
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cosmetic changes from review of last patch. obvious
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34598 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-25 18:31:31 +00:00 |
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Dale Johannesen
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598270a68d
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remove crediting of Evan Cheng and me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34568 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-25 01:42:36 +00:00 |
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Dale Johannesen
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99c49a4b94
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Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
from README.
When no water available, use end of block if in range. (More to do here.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34563 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-25 00:47:03 +00:00 |
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Lauro Ramos Venancio
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acdfa445ac
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bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34537 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-23 21:53:48 +00:00 |
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Lauro Ramos Venancio
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600c383e5c
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Fix stack alignment in functions with varargs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34532 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-02-23 20:32:57 +00:00 |
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