Chris Lattner
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dab05f0e19
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Change return lowering so that we can autogen the matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24832 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 21:03:04 +00:00 |
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Chris Lattner
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2db3ff66f1
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Implement Calls for V8. This would be completely autogenerated except for
a small bug in tblgen. When that is fixed, we can remove the ISD::Call case
in Select.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24830 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 15:55:15 +00:00 |
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Chris Lattner
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384e5efc0e
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Implement the full V8 ABI for incoming arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24825 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 13:33:06 +00:00 |
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Chris Lattner
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3308449afc
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Give V8 select_cc, in the spirit of the PPC backend
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24823 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 08:13:54 +00:00 |
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Chris Lattner
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065c896b7a
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V8 doesn't have FP extload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24821 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 07:13:32 +00:00 |
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Chris Lattner
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d5aae05281
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simplifications, fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24820 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 07:09:06 +00:00 |
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Chris Lattner
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8fa54dc702
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Add frameindex support
Add support for copying (e.g. returning) doubles
Add support for F<->I instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24818 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 06:59:57 +00:00 |
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Chris Lattner
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76acc872b3
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Add constant pool support, including folding into addresses.
Pretty print addresses a bit, to not print [%r1+%g0]: just print [%r1]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24813 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 02:37:35 +00:00 |
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Chris Lattner
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e1389ad43a
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Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes,
allowing us to compile this:
to this:
%G1 = external global int
%G2 = external global int
void %test() {
%X = load int* %G1
store int %X, int* %G2
ret void
}
test:
save -96, %sp, %sp
sethi %hi(G1), %l0
ld [%l0+%lo(G1)], %l0
sethi %hi(G2), %l1
st %l0, [%l1+%lo(G2)]
restore %g0, %g0, %g0
retl
nop
instead of this:
test:
save -96, %sp, %sp
sethi %hi(G1), %l0
or %g0, %lo(G1), %l1
ld [%l1+%l0], %l0
sethi %hi(G2), %l1
or %g0, %lo(G2), %l2
st %l0, [%l2+%l1]
restore %g0, %g0, %g0
retl
nop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24812 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 02:27:00 +00:00 |
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Chris Lattner
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e357246c6b
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Add initial support for global variables, and fix a bug in addr mode selection
where we didn't select the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24811 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 02:10:39 +00:00 |
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Chris Lattner
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4d55aca87a
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Add initial conditional branch support. This doesn't actually work yet due
to a bug in the scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24807 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-18 01:20:35 +00:00 |
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Chris Lattner
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d19fc65345
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Implement 64-bit add/sub, make sure to receive and return 64-bit args with
the right halves in the right regs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24799 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 22:55:57 +00:00 |
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Chris Lattner
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7087e57872
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implement div and rem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24798 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 22:39:19 +00:00 |
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Chris Lattner
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ee3d5fba54
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implement MULHU/MULHS for 64-bit multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24797 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 22:30:00 +00:00 |
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Chris Lattner
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9034b883a4
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Make the addressing modes smarter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24795 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 21:25:27 +00:00 |
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Chris Lattner
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217aabf89e
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Add support for 64-bit arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24792 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 20:59:06 +00:00 |
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Chris Lattner
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9a60ff654a
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Sparc doesn't have sext_inreg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 20:50:42 +00:00 |
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Chris Lattner
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bc83fd9672
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Add basic addressing mode support and one load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24782 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 20:04:49 +00:00 |
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Chris Lattner
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4b4863188f
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Implement ret with operand, giving us this:
int %test(int %A) {
ret int %A
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24773 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 08:15:09 +00:00 |
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Chris Lattner
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a01b75758c
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Implement LowerArguments, at least for the first 6 integer args
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24770 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 08:03:24 +00:00 |
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Chris Lattner
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6c18b10ad4
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Add the framework for a dag-dag isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24769 91177308-0d34-0410-b5e6-96231b3b80d8
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2005-12-17 07:47:01 +00:00 |
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