Evan Cheng
ec693f77c0
* Added intelligence to X86 LEA addressing mode matching routine so it returns
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false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24635 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:01:35 +00:00
Chris Lattner
e80242a948
X86 doesn't support sextinreg for 8-bit things either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-07 17:59:14 +00:00
Evan Cheng
8d202230b4
Remove unnecessary let hasCtrlDep=1 now it can be inferred.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24611 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:09:43 +00:00
Chris Lattner
3d36a9f6f4
Several things:
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1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly. The port number really
*is* a 16-bit value, but the patterns should only match if the number
is 0-255. Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
i8, not an i16 as they were believed to be before. This previous fib
stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24599 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:40:25 +00:00
Evan Cheng
d35b8c1adb
Added isel patterns for RET, JMP, and WRITEPORT.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24588 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:19:43 +00:00
Chris Lattner
df65de42cf
Fix PR672 another way which should be more robust
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24585 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 06:03:50 +00:00
Chris Lattner
a027ba885a
Fix test/Regression/ExecutionEngine/2005-12-02-TailCallBug.ll and PR672.
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This also fixes 177.mesa, the only program that fails with --enable-x86-fastcc
turned on. Given a clean nightly tester run, we should be able to turn it
on by default!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24578 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-03 07:15:55 +00:00
Chris Lattner
865874c88a
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24572 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-02 00:11:20 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Evan Cheng
640f299b44
Proper support for shifts with register shift value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24559 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:43:55 +00:00
Chris Lattner
350d22e14d
SelectNodeTo now returns its result, we must pay attention to it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24550 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 22:59:19 +00:00
Nate Begeman
85a168a734
Fix a typo in my latest change
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24542 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:57:39 +00:00
Nate Begeman
391c5d231a
No longer track value types for asm printer operands, and remove them as
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an argument to every operand printing function. Requires some slight
tweaks to x86, the only user.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Chris Lattner
5b9bbc8792
Fix a bug in a recent patch that broke shifts
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24526 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 05:11:18 +00:00
Evan Cheng
bd3d25c6b1
Added support to STORE and shifts to DAG to DAG isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24525 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 02:51:20 +00:00
Evan Cheng
345c3f370d
Fixed a minor bug: - -offset != offset iff offset == MININT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 01:59:00 +00:00
Evan Cheng
f0701842f7
Add more X86 ISel patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 19:38:52 +00:00
Chris Lattner
f73bae1b73
No targets support line number info yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 06:16:21 +00:00
Chris Lattner
1e4ed93599
Add a missed optimization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24495 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-28 04:52:39 +00:00
Chris Lattner
ac2902bcb5
Use HasDotTypeDotSizeDirective instead of forELF
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24481 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 23:06:54 +00:00
Chris Lattner
9787c6443f
Remove a level of indentation by using a continue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24479 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:48:18 +00:00
Chris Lattner
d460f57d65
Simplify the subtarget info, allow the asmwriter to do some target sensing
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based on TargetType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24478 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:43:58 +00:00
Chris Lattner
a35a8e87fa
Use subtarget information computed by X86Subtarget instead of rolling our own.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24477 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:39:40 +00:00
Chris Lattner
e5600e5509
Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,
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or native Win32
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24476 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:31:58 +00:00
Chris Lattner
5df14ca0a1
Add a forELF flag, allowing the removal of forCygwin and simplification of
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conditionals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24475 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 22:19:48 +00:00
Chris Lattner
8fccc97b0b
simplify and genericize this code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24473 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 19:50:31 +00:00
Chris Lattner
69191f8f05
prune #include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:33:17 +00:00
Chris Lattner
d939f6c85d
Switch to using the shared constant pool printer, along with using shorter
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CPI ids
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24467 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 08:32:23 +00:00
Chris Lattner
8b8b9515d6
Adjust to capitalized AsmPrinter method names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24456 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:51:23 +00:00
Chris Lattner
64965ba8b0
Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwin
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port to properly use L for the bb prefix instead of .
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24454 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:43:59 +00:00
Chris Lattner
7b6e53cde7
convert the rest of this over to use SwitchSection
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24448 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:16:34 +00:00
Chris Lattner
224cfc2eac
Start using the AsmPrinter shared SwitchSection code. This allows the X86
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backend to implement global variables in sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24447 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 07:11:11 +00:00
Chris Lattner
62cbf2aab9
Rename SwitchSection -> switchSection to avoid conflicting with a future
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change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24443 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:55:27 +00:00
Chris Lattner
c41cc83117
Naturally align doubles in the constant pool, set PrivateGlobalPrefix on
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darwin, use it when printing the constant pool indices so the labels are
appropriately private, emit cp entries to .const instead of .data on darwin
and only emit a single .section for the constant pool, not one for each
entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24440 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-21 06:46:22 +00:00
Chris Lattner
81f803df80
Lower READCYCLECOUNTER correctly, preserving the chain result
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:57:19 +00:00
Chris Lattner
441b223c9b
encode rdtsc correctly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:13:18 +00:00
Chris Lattner
81363c3871
use chain operands to ensure the copies don't wander from the rdtsc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24434 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 22:01:40 +00:00
Andrew Lenharth
b873ff322c
The second patch of X86 support for read cycle counter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24430 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-20 21:41:10 +00:00
Chris Lattner
6adaf79ad7
Teach the x86 backend about the register constraints of its addressing mode.
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Patch by Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24423 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 07:01:30 +00:00
Chris Lattner
f9ce9fb49b
Add load and other support to the dag-dag isel. Patch contributed by Evan
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Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24419 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-19 02:11:08 +00:00
Chris Lattner
f124d5e500
add more patterns, patch by Evan Cheng.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24406 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-18 01:04:42 +00:00
Chris Lattner
78432feff8
Add patterns for some 16-bit immediate instructions, patch contributed by
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Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24384 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 02:01:55 +00:00
Chris Lattner
7a12537843
Add patterns for several simple instructions that take i32 immediates.
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Patch contributed by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24382 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 22:59:19 +00:00
Chris Lattner
c961eea6cb
initial step at adding a dag-to-dag isel for X86 backend. Patch contributed
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by Evan Cheng!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24371 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 01:54:32 +00:00
Chris Lattner
dbdbf0ce2e
Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch
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contributed by Evan Cheng.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24358 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-15 00:40:23 +00:00
Chris Lattner
ce8eb0c16b
Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24233 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-08 02:11:51 +00:00
Chris Lattner
ffff6175ef
add a note that Nate mentioned last week
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23898 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 21:44:59 +00:00
Chris Lattner
1171ff4fd7
Put some of my random notes somewhere public
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23897 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-23 19:52:42 +00:00
Nate Begeman
405e3ecb56
Invert the TargetLowering flag that controls divide by consant expansion.
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Add a new flag to TargetLowering indicating if the target has really cheap
signed division by powers of two, make ppc use it. This will probably go
away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23853 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 00:02:42 +00:00
Nate Begeman
34f342e36f
Remove some dead code now that the dag combiner exists.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 22:08:02 +00:00