Chris Lattner
b38a7495da
Add support for 64-bit shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21005 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 04:01:14 +00:00
Chris Lattner
7ce7eff54c
Add support for ISD::UNDEF to the X86 be
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20990 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 22:46:45 +00:00
Chris Lattner
71df3f8cab
don't depend on the cfg being set up yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20936 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30 01:10:00 +00:00
Nate Begeman
8e21e71b24
Change interface to LowerCallTo to take a boolean isVarArg argument.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20842 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 01:29:23 +00:00
Chris Lattner
1bcb9abb30
eliminate dead variables, patch contributed by Gabor Greif!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20812 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 17:32:20 +00:00
Nate Begeman
85fdeb233e
Remove comments that are now meaningless from the pattern ISels, at Chris's
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request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20804 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 04:39:54 +00:00
Chris Lattner
7805fa4acc
Don't emit two comparisons when comparing a FP value against zero!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20651 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 16:29:26 +00:00
Chris Lattner
5b3a4553c1
Fix the missing symbols problem Bill was hitting. Patch contributed by
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Bill Wendling!!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-17 15:38:16 +00:00
Chris Lattner
e4d5c441e0
This mega patch converts us from using Function::a{iterator|begin|end} to
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using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-15 04:54:21 +00:00
Reid Spencer
d632f4977e
Patch to make assembly output compatible with mingw compilation (identical
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to cygwin)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20520 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-08 17:02:05 +00:00
Chris Lattner
da895d6337
Fix spelling, patch contributed by Gabor Greif!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20343 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-27 06:18:25 +00:00
Chris Lattner
572dd08204
Silence some uninit variable warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20284 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-23 05:57:21 +00:00
Chris Lattner
3576c84baf
We can fold promoted and non-promoted loads into divs also!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-25 20:35:10 +00:00
Chris Lattner
44129b5b68
Fold promoted loads into binary ops for FP, allowing us to generate m32 forms
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of FP ops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19834 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-25 20:03:11 +00:00
Chris Lattner
0a07883694
Silence a warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19798 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 23:20:06 +00:00
Chris Lattner
42e25b387f
Allow the FP stackifier to completely ignore functions that do not use FP at
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all. This should speed up the X86 backend fairly significantly on integer
codes. Now if only we didn't have to compute livevar still... ;-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19796 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 23:13:59 +00:00
Reid Spencer
5dc81f63d1
Support Cygwin assembly generation. The cygwin version of Gnu ASsembler
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doesn't support certain directives and symbols on cygwin are prefixed with
an underscore. This patch makes the necessary adjustments to the output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19775 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-23 03:52:14 +00:00
Chris Lattner
fb0f53f9c1
Speed up folding operations into loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19733 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-21 21:43:02 +00:00
Chris Lattner
67b1c3c404
The ever-important vanity pass name :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19731 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-21 21:35:14 +00:00
Chris Lattner
b62e1e296e
Fix a FIXME: realize that argument stores are all independent (don't alias)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19728 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-21 19:46:38 +00:00
Chris Lattner
19ad0620bc
Implement ADD_PARTS/SUB_PARTS so that 64-bit integer add/sub work. This
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fixes most of the remaining llc-beta failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19716 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-20 18:53:00 +00:00
Chris Lattner
bf52d49f36
Fix a crash compiling 134.perl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19711 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-20 16:50:16 +00:00
Chris Lattner
c3c021bcad
Fix a problem where were were literally selecting for INCREASED register
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pressure, not decreases register pressure. Fix problem where we accidentally
swapped the operands of SHLD, which caused fourinarow to fail. This fixes
fourinarow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19697 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 17:24:34 +00:00
Chris Lattner
a76f04828a
When commuting these instructions, make sure to actually swap the operands too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19694 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 16:55:52 +00:00
Chris Lattner
4053b1e30b
Implement Regression/CodeGen/X86/rotate.ll: emit rotate instructions (which
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typically cost 1 cycle) instead of shld/shrd instruction (which are typically
6 or more cycles). This also saves code space.
For example, instead of emitting:
rotr:
mov %EAX, DWORD PTR [%ESP + 4]
mov %CL, BYTE PTR [%ESP + 8]
shrd %EAX, %EAX, %CL
ret
rotli:
mov %EAX, DWORD PTR [%ESP + 4]
shrd %EAX, %EAX, 27
ret
Emit:
rotr32:
mov %CL, BYTE PTR [%ESP + 8]
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, %CL
ret
rotli32:
mov %EAX, DWORD PTR [%ESP + 4]
ror %EAX, 27
ret
We also emit byte rotate instructions which do not have a sh[lr]d counterpart
at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19692 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 08:07:05 +00:00
Chris Lattner
40ff633b05
Add rotate instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19690 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:50:03 +00:00
Chris Lattner
30ea1e9411
Match 16-bit shld/shrd instructions as well, implementing shift-double.llx:test5
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19689 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:37:26 +00:00
Chris Lattner
0df53d22c3
Improve coverage of the X86 instruction set by adding 16-bit shift doubles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19687 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:31:24 +00:00
Chris Lattner
41e431ba04
Teach the code generator that shrd/shld is commutable if it has an immediate.
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This allows us to generate this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shld %EDX, %EDX, 2
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
Note the magically transmogrifying immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19686 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 07:11:01 +00:00
Chris Lattner
8571637ee9
Codegen long >> 2 to this:
...
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
shrd %EAX, %EDX, 2
sar %EDX, 2
ret
instead of this:
test1:
mov %ECX, DWORD PTR [%ESP + 4]
shr %ECX, 2
mov %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %EDX
shl %EAX, 30
or %EAX, %ECX
sar %EDX, 2
ret
and long << 2 to this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
*** mov %EDX, %EAX
shrd %EDX, %ECX, 30
shl %EAX, 2
ret
instead of this:
foo:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
shr %ECX, 30
mov %EDX, DWORD PTR [%ESP + 8]
shl %EDX, 2
or %EDX, %ECX
shl %EAX, 2
ret
The extra copy (marked ***) can be eliminated when I teach the code generator
that shrd32rri8 is really commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19681 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 06:18:43 +00:00
Chris Lattner
009b55b6f6
X86 shifts mask the amount.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19678 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-19 03:36:30 +00:00
Chris Lattner
477c931852
Code to handle FP_EXTEND is dead now. X86 doesn't support any data types to
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FP_EXTEND from!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19674 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 20:05:56 +00:00
Chris Lattner
3dd68151dc
Remove more dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19673 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 19:50:08 +00:00
Chris Lattner
a7a4c0f7c4
The selection dag code handles the promotions from F32 to F64 for us, so we
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don't need to even think about F32 in the X86 code anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19672 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 19:46:54 +00:00
Chris Lattner
b422aeac9e
Fix 124.m88ksim.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19667 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 17:35:28 +00:00
Chris Lattner
811482a82b
Do not emit loads multiple times, potentially in the wrong places.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19661 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 04:18:32 +00:00
Chris Lattner
b71f8fc99d
Eliminate bad assertions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19659 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 04:00:54 +00:00
Chris Lattner
4a108668df
* Eliminate the TokenSet and just use the ExprMap for both tokens and values.
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* Insert some really pedantic assertions that will notice when we emit the
same loads more than one time, exposing bugs. This turns a miscompilation in
bzip2 into a compile-fail. yaay.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19658 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 03:51:59 +00:00
Chris Lattner
883c86f510
Rely on the code in MatchAddress to do this work. Otherwise we fail to
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match (X+Y)+(Z << 1), because we match the X+Y first, consuming the index
register, then there is no place to put the Z.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 02:25:52 +00:00
Chris Lattner
98a8ba0393
Fix a problem where probing for addressing modes caused expressions to be
...
emitted too early. In particular, this fixes
Regression/CodeGen/X86/regpressure.ll:regpressure3.
This also improves the 2nd basic block in 164.gzip:flush_block, which went from
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree + 20]
movzx %ECX, WORD PTR [dyn_ltree + 16]
mov DWORD PTR [%ESP + 32], %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
movzx %EDX, WORD PTR [dyn_ltree + 8]
movzx %EBX, WORD PTR [dyn_ltree + 4]
mov DWORD PTR [%ESP + 36], %EBX
movzx %EBX, WORD PTR [dyn_ltree]
add DWORD PTR [%ESP + 36], %EBX
add %EDX, DWORD PTR [%ESP + 36]
add %ECX, %EDX
add DWORD PTR [%ESP + 32], %ECX
add %EAX, DWORD PTR [%ESP + 32]
movzx %ECX, WORD PTR [dyn_ltree + 24]
add %EAX, %ECX
mov %ECX, 0
mov %EDX, %ECX
to
.LBBflush_block_1: # loopentry.1.i
movzx %EAX, WORD PTR [dyn_ltree]
movzx %ECX, WORD PTR [dyn_ltree + 4]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 8]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 12]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 16]
add %EAX, %ECX
movzx %ECX, WORD PTR [dyn_ltree + 20]
add %ECX, %EAX
movzx %EAX, WORD PTR [dyn_ltree + 24]
add %ECX, %EAX
mov %EAX, 0
mov %EDX, %EAX
... which results in less spilling in the function.
This change alone speeds up 164.gzip from 37.23s to 36.24s on apoc. The
default isel takes 37.31s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19650 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-18 01:06:26 +00:00
Chris Lattner
e9fe2bcac2
Fix indentation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 23:25:45 +00:00
Chris Lattner
869e0434ae
Don't bother using max here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19647 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 23:02:13 +00:00
Chris Lattner
90d1be7eef
Do not give token factor nodes outrageous weights
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19645 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 22:56:09 +00:00
Chris Lattner
5c65981a57
Two changes:
...
1. Fold [mem] += (1|-1) into inc [mem]/dec [mem] to save some icache space.
2. Do not let token factor nodes prevent forming '[mem] op= val' folds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19643 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 22:10:42 +00:00
Chris Lattner
e10269ba30
Refactor load/op/store folding into it's own method, no functionality changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19641 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 19:25:26 +00:00
Chris Lattner
ae3ffba466
Fix a major regression last night that prevented us from producing [mem] op= reg
...
operations.
The body of the if is less indented but unmodified in this patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19638 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 17:49:14 +00:00
Chris Lattner
2a4e508281
Codegen this:
...
int %foo(int %X) {
%T = add int %X, 13
%S = mul int %T, 3
ret int %S
}
as this:
mov %ECX, DWORD PTR [%ESP + 4]
lea %EAX, DWORD PTR [%ECX + 2*%ECX + 39]
ret
instead of this:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, %ECX
add %EAX, 13
imul %EAX, %EAX, 3
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19633 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 06:48:02 +00:00
Chris Lattner
4ff348befa
Fix test/Regression/CodeGen/X86/2005-01-17-CycleInDAG.ll and 132.ijpeg.
...
Do not fold a load into an operation if it will induce a cycle in the DAG.
Repeat after me: dAg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19631 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 06:26:58 +00:00
Chris Lattner
cb1aa8d772
Do not fold a load into a comparison that is used by more than one place.
...
The comparison will probably be folded, so this is not ok to do.
This fixed 197.parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19624 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 01:34:14 +00:00
Chris Lattner
c98279d371
Do not codegen 'xor bool, true' as 'not reg'. not reg inverts the upper bits
...
of the bytereg. This fixes yacr2, 300.twolf and probably others.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19622 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 00:23:16 +00:00
Chris Lattner
4df0de975a
Set up the shift and setcc types.
...
If we emit a load because we followed a token chain to get to it, try to
fold it into its single user if possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19620 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-17 00:00:33 +00:00
Chris Lattner
da2ce11407
* Adjust to changes in TargetLowering interfaces.
...
* Remove custom promotion for bool and byte select ops. Legalize now
promotes them for us.
* Allow folding ConstantPoolIndexes into EXTLOAD's, useful for float immediates.
* Declare which operations are not supported better.
* Add some hacky code for TRUNCSTORE to pretend that we have truncstore
for i16 types. This is useful for testing promotion code because I can
just remove 16-bit registers all together and verify that programs work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19614 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-16 07:34:08 +00:00
Chris Lattner
e9ef81dd2f
Add support for truncstore and *extload.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19566 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-15 05:22:24 +00:00
Chris Lattner
7f2afac1dc
Adjust to CopyFromREg changes.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19561 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-14 22:37:41 +00:00
Chris Lattner
18c2f13e0f
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19535 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 20:50:02 +00:00
Chris Lattner
1d50b7fa53
Codegen factor nodes more intelligently according to perceived register pressure.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19532 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 19:56:00 +00:00
Chris Lattner
c35807155c
Initial trivial (but stupid) codegen for this node.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19529 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 18:01:36 +00:00
Chris Lattner
636e79a20f
Add some really pedantic assertions to the load folding code. Fix a bunch
...
of cases where we accidentally emitted a load folded once and unfolded
elsewhere.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19522 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-13 05:53:16 +00:00
Chris Lattner
a0bb692b27
We can only fold a load into an op if there is exactly one use of the value.
...
Checking to see if the load has two uses is not equivalent, as the chain
value may have zero uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19518 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 18:38:26 +00:00
Chris Lattner
9bbd992eb1
Try both ways to fold an add together. This allows us to generate this code
...
imul %EAX, %EAX, 400
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX + 4*%EDX]
inc %EDX
cmp %EDX, 100
instead of this:
imul %EAX, %EAX, 400
add %ECX, %EAX
mov %EAX, %EDX
shl %EAX, 2
add %ECX, %EAX
add %ESI, DWORD PTR [%ECX]
inc %EDX
cmp %EDX, 100
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19513 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 18:08:53 +00:00
Chris Lattner
2b9378646d
Fix a major miscompilation where we were overwriting the scale reg.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19511 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 07:33:20 +00:00
Chris Lattner
48034fd9f1
Do not use the type of the RHS constant to determine the type of the operation.
...
This fails for shifts because the constant is always 8 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19508 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 05:22:07 +00:00
Chris Lattner
a23ccfb124
Do not lose the offset from teh global when peephole optimizing instructions.
...
This fixes FreeBench/pcompress
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19507 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 05:17:28 +00:00
Jeff Cohen
603fea9eb6
Fix C++ more compilatiom errors
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19504 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:29:05 +00:00
Chris Lattner
a56cea4495
Fix a compile error with VC++, which things that static const arrays need
...
to be dynamically initialized. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19503 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:23:22 +00:00
Chris Lattner
7dbcb75b15
Fix a bug that caused us to crash on povray. We weren't emitting an FP_REG_KILL into a block that had a successor with a FP PHI node.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19502 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:21:28 +00:00
Chris Lattner
e11a9a93a8
Print a load of a null pointer (in intel mode) like this:
...
mov %AX, WORD PTR [0]
instead of like this:
mov %AX, WORD PTR []
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19501 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:07:11 +00:00
Chris Lattner
9f2cb3da48
Print a load of a null pointer like this:
...
movw 0, %ax
instead of like this:
movw , %ax
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19500 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:05:19 +00:00
Chris Lattner
085c9955ca
Fix a crash compiling povray on UINT_TO_FP from i16.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19499 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 04:00:00 +00:00
Chris Lattner
4292830fe5
There are no [mem] op= reg instructions for FP, so remove their entries.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19496 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 03:16:09 +00:00
Chris Lattner
db8c368d7b
Fix a bug where we didn't insert FP_REG_KILL instructions into MBB's that
...
contain FP PHI nodes but no other FP defining instructions. This fixes
183.equake
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19495 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 02:57:10 +00:00
Chris Lattner
afce4306ec
Fold TRUNCATE (LOAD P) into a smaller load from P.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19494 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 02:19:06 +00:00
Chris Lattner
ef6806c979
Be more careful about order of arg evalution for CopyToReg nodes. This shrinks
...
256.bzip2 from 7142 to 7103 lines of .s file.
Second, add initial support for folding loads into compares, though this code
is dynamically dead for now. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19493 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 02:02:48 +00:00
Chris Lattner
7ea64f5d12
Fold some more [mem] op= val operators. This allows us to things like this
...
several times in 256.bzip2:
mov %EAX, DWORD PTR [%ESP + 204]
- mov %EAX, DWORD PTR [%EAX]
- or %EAX, 2097152
- mov %ECX, DWORD PTR [%ESP + 204]
- mov DWORD PTR [%ECX], %EAX
+ or DWORD PTR [%EAX], 2097152
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19492 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-12 01:28:00 +00:00
Chris Lattner
dbba22fa2a
Fold loads into sign/zero extends. instead of:
...
mov %AL, BYTE PTR [%EDX + l18_length_code]
movzx %EAX, %AL
Emit:
movzx %EAX, BYTE PTR [%EDX + l18_length_code]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19489 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 23:33:00 +00:00
Chris Lattner
837caa7223
Comment out debug code :)
...
Select [mem] += Val operations. For constants, we used to get:
mov %ECX, -32768
add %ECX, DWORD PTR [l4_match_start]
mov DWORD PTR [l4_match_start], %ECX
Now we get:
add DWORD PTR [l4_match_start], -32768
For other values we used to get:
mov %EBP, %EDI ;; because the add destroys the value
add %EBP, DWORD PTR [l4_input_len]
mov DWORD PTR [l4_input_len], %EBP
now we get:
add DWORD PTR [l4_input_len], %EDI
Both of these use less registers than the alternative, are faster and smaller.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19488 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 23:21:30 +00:00
Chris Lattner
5f75d9a88c
Handle the global address case here, not just the offset case.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19487 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 22:58:43 +00:00
Chris Lattner
c4b6a78980
Treat int constants as not requiring a register, since they are almost always
...
folded into an instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19486 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 22:29:12 +00:00
Chris Lattner
a5ade060db
* Factor a bunch of binary operator cases into shared code.
...
* Fold loads into Add, sub, and, or, xor and mul when possible.
* Codegen shl X, 1 as add X, X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19483 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 21:19:59 +00:00
Chris Lattner
947d544e29
Fold multiplies by 3,5,9 into addressing modes when possible.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19480 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 19:37:02 +00:00
Chris Lattner
51a263434a
Instead of generating stuff like this:
...
mov %ECX, %EAX
add %ECX, 32768
mov %SI, WORD PTR [2*%ECX + l13_prev]
Generate this:
mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]
This occurs when you have a GEP instruction where an index is
"something + imm".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19472 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 06:36:20 +00:00
Chris Lattner
31805bf2b6
Implement MEMCPY natively in terms of rep movs*
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19468 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 06:19:26 +00:00
Chris Lattner
989de030c4
Implement memset -> rep stos*
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19467 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 06:14:36 +00:00
Chris Lattner
795069dd38
Announce that we don't support mem ops yet.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19466 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 05:57:36 +00:00
Chris Lattner
a95589be3f
Teach the address selector to make 'reg+reg' addressing modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19457 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 04:40:19 +00:00
Chris Lattner
d4dab929d8
Emit NOT instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19455 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 04:31:30 +00:00
Chris Lattner
6c07aee7c9
Fix a bug emitting branches that broke a lot of programs.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19452 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 04:06:27 +00:00
Chris Lattner
ef7ba0756b
Be more careful where we set ContainsFPCode. We were missing a set in the
...
int -> FP casting code. Note that we don't have to set it for FP operations
that take FP values as operands: whatever produces the FP value will set the
flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19451 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 03:50:45 +00:00
Chris Lattner
a3aa2e2882
Fix a major bug in setcc/cmov folding, where we accidentally
...
inverted the sense of the comparison.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19450 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 03:37:59 +00:00
Chris Lattner
1133309e57
Take register pressure into account when we have to decide whether to
...
evaluate the LHS or the RHS of an operation first. This causes good things
to happen. For example, instead of compiling a loop to this:
.LBBstrength_result7_1: # loopentry
movl 16(%esp), %edi
movl (%edi), %edi ;;; LOAD
movl (%ecx), %ebx
movl $2, (%eax,%ebx,4)
movl (%edx), %ebx
movl %esi, %ebp
addl $21, %ebp
addl $42, %esi
cmpl $0, %edi ;;; USE
cmovne %esi, %ebp
cmpl %ebp, %ebx
movl %ebp, %esi
jg .LBBstrength_result7_1
We now compile it to this:
.LBBstrength_result7_1: # loopentry
movl %edi, %ebx
addl $42, %ebx
addl $21, %edi
movl (%ecx), %ebp ;; LOAD
cmpl $0, %ebp ;; USE
cmovne %ebx, %edi
movl (%edx), %ebx
movl $2, (%eax,%ebx,4)
movl (%esi), %ebx
cmpl %edi, %ebx
jg .LBBstrength_result7_1
Which reduces register pressure enough (in this case) to avoid spilling in the
loop.
As another example, consider the CodeGen/X86/regpressure.ll testcase. We
used to generate this code for both cases:
regpressure1:
subl $32, %esp
movl %esi, 12(%esp)
movl %edi, 8(%esp)
movl %ebx, 4(%esp)
movl %ebp, (%esp)
movl 36(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
movl %edx, 24(%esp)
movl 8(%ecx), %edx
movl %edx, 16(%esp)
movl 12(%ecx), %edx
movl 16(%ecx), %esi
movl 20(%ecx), %edi
movl 24(%ecx), %ebx
movl %ebx, 28(%esp)
movl 28(%ecx), %ebx
movl 32(%ecx), %ebp
movl %ebp, 20(%esp)
movl 36(%ecx), %ecx
imull 24(%esp), %eax
imull 16(%esp), %eax
imull %edx, %eax
imull %esi, %eax
imull %edi, %eax
imull 28(%esp), %eax
imull %ebx, %eax
imull 20(%esp), %eax
imull %ecx, %eax
movl (%esp), %ebp
movl 4(%esp), %ebx
movl 8(%esp), %edi
movl 12(%esp), %esi
addl $32, %esp
ret
This code is basically trying to do all of the loads first, then execute all
of the multiplies. Because we run out of registers, lots of spill code happens.
We now generate this code for both cases:
regpressure1:
movl 4(%esp), %ecx
movl (%ecx), %eax
movl 4(%ecx), %edx
imull %edx, %eax
movl 8(%ecx), %edx
imull %edx, %eax
movl 12(%ecx), %edx
imull %edx, %eax
movl 16(%ecx), %edx
imull %edx, %eax
movl 20(%ecx), %edx
imull %edx, %eax
movl 24(%ecx), %edx
imull %edx, %eax
movl 28(%ecx), %edx
imull %edx, %eax
movl 32(%ecx), %edx
imull %edx, %eax
movl 36(%ecx), %ecx
imull %ecx, %eax
ret
which is much nicer (when we fold loads into the muls it will be even better).
The old instruction selector used to produce the good code for regpressure1
but not for regpressure2, as it depended on the order of operations in the
LLVM code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19449 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-11 03:11:44 +00:00
Chris Lattner
24aad1b0c1
Fold setcc instructions into selects.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19438 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-10 22:10:13 +00:00
Chris Lattner
57fbfb5879
Add conditional moves for the parity flag.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19437 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-10 22:09:33 +00:00
Chris Lattner
a13d3236d1
Implement 8-bit multiply for X86.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19435 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-10 20:55:48 +00:00
Chris Lattner
bd9f0eefb2
Codegen (Reg|imm)+&GV as an LEA, because we cannot put it into the immediate field
...
of an ADDri (due to current restrictions on MachineOperand :( ). This allows
us to generate:
leal Data+16000, %edx
instead of:
movl $Data, %edx
addl $16000, %edx
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19420 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 20:20:29 +00:00
Chris Lattner
250208587d
Fix copy and pasto's for FP -> Int. This fixes fldry
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19418 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 19:49:59 +00:00
Chris Lattner
590d800a12
Initial implementation of FP->INT and INT->FP casts
...
Also, fix zero_extend from bool to i8, which fixes Shootout/objinst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19414 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 18:52:44 +00:00
Chris Lattner
6e7c47c12d
Fix a subtle bug involving constant expr casts from int to fp
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19410 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 01:49:29 +00:00
Chris Lattner
1482458b23
Implement varargs and returnaddress/frameaddress intrinsics. With this
...
patch, all of SingleSource/UnitTests passes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19408 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-09 00:01:27 +00:00
Chris Lattner
b0802651bf
Okay 15th time is the charm. Looking at the vector size is useless as it
...
gets clobbered by a previous statement. This fixes all calls finally.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 20:51:36 +00:00
Chris Lattner
6cc70ef0f9
Okay, my off by one was actually off by two. This fixes Generic/2003-07-07-BadLongConst.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19398 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 20:39:31 +00:00
Chris Lattner
ce45d65d9a
Fix off by one error
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19396 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 20:31:34 +00:00
Chris Lattner
5188ad735c
Adjust to changes in LowerCallTo interface
...
Minor bugfixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19376 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 19:28:19 +00:00
Chris Lattner
8c92628d1c
Wrap long line.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19367 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 06:59:50 +00:00
Chris Lattner
7ab65934a0
The X86 instruction selector already handles codegen of:
...
store float 123.45, float* %P
as an integer store. This adds handling of float immediate stores as integers
for arguments passed function calls.
This is now tested by CodeGen/X86/store-fp-constant.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19364 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-08 05:45:24 +00:00
Chris Lattner
18ad19488d
Allow the selection-dag based selector to be diabled with -disable-pattern-isel.
...
For now, this is the default, as the current selector is missing some big pieces.
To enable the new selector, pass -disable-pattern-isel=false to llc or lli.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19335 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:50:50 +00:00
Chris Lattner
8acb1ba04d
Reimplementation of the X86 pattern isel. This is still missing many large
...
pieces, but can already do amazing things in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19334 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:49:41 +00:00
Chris Lattner
d844d0128a
This file is now dead.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19333 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:49:05 +00:00
Chris Lattner
95cdb36714
Add a new prototype
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19332 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-07 07:48:33 +00:00
Chris Lattner
6ac95f9679
Codegen -1 and -0.0 more efficiently. This implements CodeGen/X86/negatize_zero.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19313 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-06 21:19:16 +00:00
Chris Lattner
5384b38ccc
1. If a double FP constant must be put into a constant pool, but it can be
...
precisely represented as a float, put it into the constant pool as a
float.
2. Use the cbw/cwd/cdq instructions instead of an explicit SAR for signed
division.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19291 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-05 16:30:14 +00:00
Chris Lattner
0539313fe5
Minor optimization to allocate R8 registers in a better order.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19289 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-05 16:09:16 +00:00
Jeff Cohen
1c32f79a82
Revert elimination of global variable hack... still needed.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19273 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-03 16:34:19 +00:00
Chris Lattner
10197ff5cd
ADC and IMUL are also commutable.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19264 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-03 01:27:59 +00:00
Jeff Cohen
40296bdf27
Eliminate the use of the global variable hack in the X86 target that was used
...
to get Visual Studio to link in X86.lib to the executables that need it. There
is another way of doing it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19252 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 04:23:12 +00:00
Chris Lattner
5aee0b97aa
Disable 2->3 address promotion of add and inc instructions to LEA's. In
...
addition to being three address, LEA's don't set the flags.
This fixes 186.crafty.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19251 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 04:18:17 +00:00
Chris Lattner
5dd350defd
Add a new method.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19249 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:38:18 +00:00
Chris Lattner
eb96ec52ff
Add support for SETNPr to lower to memory form.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19248 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:37:46 +00:00
Chris Lattner
bcea4d6f28
Implement the convertToThreeAddress method, add support for inverting JP/JNP
...
branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19247 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:37:07 +00:00
Chris Lattner
cc65beeb39
Two changes here:
...
1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19246 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 02:35:46 +00:00
Chris Lattner
6b4f501470
Remove unused enum value
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19024 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-17 22:41:46 +00:00
Chris Lattner
8cdbc35216
Change the sentinal
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19007 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-17 00:46:51 +00:00
Chris Lattner
11cf7aa775
Create a stack slot for the return address lazily instead of eagerly. This
...
save small amounts of time for functions that don't call llvm.returnaddress
or llvm.frameaddress (which is almost all functions).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19006 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-17 00:07:46 +00:00
Chris Lattner
84b85c8262
Adjust to changes in asmwriter filenames
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-16 17:33:24 +00:00
Chris Lattner
c0354c904b
Set the rounding mode for the X86 FPU to 64-bits instead of 80-bits. We
...
don't support long double anyway, and this gives us FP results closer to
other targets.
This also speeds up 179.art from 41.4s to 18.32s, by eliminating a problem
with extra precision that causes an FP == comparison to fail (leading to
extra loop iterations).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18895 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-13 17:23:11 +00:00
Chris Lattner
3ea78c4276
Use the target triple to pick this target.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-12 17:40:28 +00:00
Chris Lattner
223d4c4b3a
Fix a regression caused by the previous patch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18449 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-03 05:13:15 +00:00
Chris Lattner
45de191b0b
Spill/restore X86 floating point stack registers with 64-bits of precision
...
instead of 80-bits of precision. This fixes PR467.
This change speeds up fldry on X86 with LLC from 7.32s on apoc to 4.68s.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18433 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-02 18:17:31 +00:00
Chris Lattner
3986924e0b
Consider 64-bit registers to be FP as well.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18432 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-02 17:57:21 +00:00
Tanya Lattner
9855b84469
Reverting this patch:
...
http://mail.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20041122/021428.html
It broke Mutlisource/Applications/obsequi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18407 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-01 18:27:03 +00:00
Chris Lattner
928b47ae2e
Revamp long/ulong comparisons to use a much more efficient sequence (thanks
...
to Brian and the Sun compiler for pointing out that the obvious works :)
This also enables folding all long comparisons into setcc and branch
instructions: before we could only do == and !=
For example, for:
void test(unsigned long long A, unsigned long long B) {
if (A < B) foo();
}
We now generate:
test:
subl $4, %esp
movl %esi, (%esp)
movl 8(%esp), %eax
movl 12(%esp), %ecx
movl 16(%esp), %edx
movl 20(%esp), %esi
subl %edx, %eax
sbbl %esi, %ecx
jae .LBBtest_2 # UnifiedReturnBlock
.LBBtest_1: # then
call foo
movl (%esp), %esi
addl $4, %esp
ret
.LBBtest_2: # UnifiedReturnBlock
movl (%esp), %esi
addl $4, %esp
ret
Instead of:
test:
subl $12, %esp
movl %esi, 8(%esp)
movl %ebx, 4(%esp)
movl 16(%esp), %eax
movl 20(%esp), %ecx
movl 24(%esp), %edx
movl 28(%esp), %esi
cmpl %edx, %eax
setb %al
cmpl %esi, %ecx
setb %bl
cmove %ax, %bx
testb %bl, %bl
je .LBBtest_2 # UnifiedReturnBlock
.LBBtest_1: # then
call foo
movl 4(%esp), %ebx
movl 8(%esp), %esi
addl $12, %esp
ret
.LBBtest_2: # UnifiedReturnBlock
movl 4(%esp), %ebx
movl 8(%esp), %esi
addl $12, %esp
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-29 05:55:24 +00:00
Chris Lattner
90b1b457ef
Do not push two return addresses on the stack when we call external functions who have their addresses taken. This fixes test-call.ll
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18134 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 22:25:30 +00:00
Chris Lattner
88f9386cfe
There is no reason to emit function stubs for direct calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18082 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 03:46:06 +00:00
Chris Lattner
7fc3824835
ignore generated files
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18073 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 00:01:54 +00:00
Chris Lattner
e72e445ed5
Remove all JIT specific code and switch the code generator over to emitting
...
relocations for global references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18068 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:55:15 +00:00
Chris Lattner
7ddde32ead
Implement the X86 JIT interfaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18067 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:54:33 +00:00
Chris Lattner
8dad013038
Describe the X86 target-specific relocations.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18066 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:54:19 +00:00
Chris Lattner
89d64e262c
We implement these interfaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18065 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 23:53:56 +00:00
Chris Lattner
3104db054a
Dont' forget to switch back to decimal output
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18010 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-19 20:57:07 +00:00
Chris Lattner
39a83dc37c
Fix a major bug in the signed shr code, which apparently only breaks 134.perl!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17902 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 18:40:52 +00:00
Chris Lattner
8f1ac9f90d
Remove a dead function, which died when we got GAS emission working (phwew,
...
hold your nose!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17869 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:34:29 +00:00
Chris Lattner
f2d552eca6
Implement a simple FIXME: if we are emitting a basic block address that has
...
already been emitted, we don't have to remember it and deal with it later,
just emit it directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17868 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:30:51 +00:00
Chris Lattner
16fe6f5f24
* Merge some win32 ifdefs together
...
* Get rid of "emitMaybePCRelativeValue", either we want to emit a PC relative
value or not: drop the maybe BS. As it turns out, the only places where
the bool was a variable coming in, the bool was a dynamic constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17867 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:21:18 +00:00
Chris Lattner
5aa3ed92de
Add debug-only=jit printout, so we see when lazily resolved symbols are
...
set up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17862 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-15 23:16:55 +00:00
Chris Lattner
36c625d3a5
Simplify and rearrange long shift code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17861 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-15 23:16:34 +00:00
Misha Brukman
d2691fdf18
GhostLinkage should not reach asm printing stage
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17750 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 21:03:49 +00:00
Chris Lattner
4b2c09fa22
Don't print unneeded labels
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17714 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 23:27:11 +00:00
Chris Lattner
ce7cafa960
shld is a very high latency operation. Instead of emitting it for shifts of
...
two or three, open code the equivalent operation which is faster on athlon
and P4 (by a substantial margin).
For example, instead of compiling this:
long long X2(long long Y) { return Y << 2; }
to:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $2, %eax, %edx
shll $2, %eax
ret
Compile it to:
X2:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
shrl $30, %edx
leal (%edx,%ecx,4), %edx
shll $2, %eax
ret
Likewise, for << 3, compile to:
X3:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl %eax, %edx
shrl $29, %edx
leal (%edx,%ecx,8), %edx
shll $3, %eax
ret
This matches icc, except that icc open codes the shifts as adds on the P4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17707 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 20:48:57 +00:00
Chris Lattner
62f5a9402c
Add missing check
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17706 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 20:04:38 +00:00
Chris Lattner
44205cadba
Compile:
...
long long X3_2(long long Y) { return Y+Y; }
int X(int Y) { return Y+Y; }
into:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
addl %eax, %eax
adcl %edx, %edx
ret
X:
movl 4(%esp), %eax
addl %eax, %eax
ret
instead of:
X3_2:
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $1, %eax, %edx
shll $1, %eax
ret
X:
movl 4(%esp), %eax
shll $1, %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17705 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-13 20:03:48 +00:00
John Criswell
546faca4ef
Correct the name of stosd for the AT&T syntax:
...
It's stosl (l for long == 32 bit).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17658 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-10 04:48:15 +00:00
John Criswell
e5cda8e727
Fix compilation problem; make the cast and the LHS be the same type.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17488 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-05 16:17:06 +00:00
Chris Lattner
141e3fd81d
Quiet VC++ warnings
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17484 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-05 04:50:59 +00:00
Chris Lattner
a62869b064
Fix a warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17431 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-02 15:27:57 +00:00
Chris Lattner
7cc372bfc3
Add placeholder variable to make Win32 work, applied for Morten Ofstad
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17406 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-01 20:10:20 +00:00
Reid Spencer
6cb21d443e
Change Library Names Not To Conflict With Others When Installed
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17286 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-27 23:18:45 +00:00
Reid Spencer
8c2c3152d6
Adjust to changes in Makefile.rules
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 21:02:08 +00:00
Reid Spencer
cac731ecbe
We won't use automake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 03:35:04 +00:00
Reid Spencer
86d341b204
Initial automake generated Makefile template
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 23:55:41 +00:00
Chris Lattner
7d0974b9a0
Improve compatibility with VC++, patch contributed by Morten Ofstad!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17126 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 15:54:17 +00:00
Chris Lattner
611fb259ba
Don't print stuff out from the code generator. This broke the JIT horribly
...
last night. :) bork!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17093 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 17:40:50 +00:00
Chris Lattner
56a31c69c8
Rewrite support for cast uint -> FP. In particular, we used to compile this:
...
double %test(uint %X) {
%tmp.1 = cast uint %X to double ; <double> [#uses=1]
ret double %tmp.1
}
into:
test:
sub %ESP, 8
mov %EAX, DWORD PTR [%ESP + 12]
mov %ECX, 0
mov DWORD PTR [%ESP], %EAX
mov DWORD PTR [%ESP + 4], %ECX
fild QWORD PTR [%ESP]
add %ESP, 8
ret
... which basically zero extends to 8 bytes, then does an fild for an
8-byte signed int.
Now we generate this:
test:
sub %ESP, 4
mov %EAX, DWORD PTR [%ESP + 8]
mov DWORD PTR [%ESP], %EAX
fild DWORD PTR [%ESP]
shr %EAX, 31
fadd DWORD PTR [.CPItest_0 + 4*%EAX]
add %ESP, 4
ret
.section .rodata
.align 4
.CPItest_0:
.quad 5728578726015270912
This does a 32-bit signed integer load, then adds in an offset if the sign
bit of the integer was set.
It turns out that this is substantially faster than the preceeding sequence.
Consider this testcase:
unsigned a[2]={1,2};
volatile double G;
void main() {
int i;
for (i=0; i<100000000; ++i )
G += a[i&1];
}
On zion (a P4 Xeon, 3Ghz), this patch speeds up the testcase from 2.140s
to 0.94s.
On apoc, an athlon MP 2100+, this patch speeds up the testcase from 1.72s
to 1.34s.
Note that the program takes 2.5s/1.97s on zion/apoc with GCC 3.3 -O3
-fomit-frame-pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17083 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 08:01:28 +00:00
Chris Lattner
07306de06e
Unify handling of constant pool indexes with the other code paths, allowing
...
us to use index registers for CPI's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17082 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 07:49:45 +00:00
Chris Lattner
0e0ed85697
Give the asmprinter the ability to print memrefs with a constant pool index,
...
index reg and scale
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17081 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 07:16:32 +00:00
Chris Lattner
de95c9e0bb
fold:
...
%X = and Y, constantint
%Z = setcc %X, 0
instead of emitting:
and %EAX, 3
test %EAX, %EAX
je .LBBfoo2_2 # UnifiedReturnBlock
We now emit:
test %EAX, 3
je .LBBfoo2_2 # UnifiedReturnBlock
This triggers 581 times on 176.gcc for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17080 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 06:10:40 +00:00
Chris Lattner
30483b0c84
Teach the X86 backend about unreachable and undef. Among other things, we
...
now compile:
'foo() {}' into "ret" instead of "mov EAX, 0; ret"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17049 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16 18:13:05 +00:00
Chris Lattner
358a9027a8
Instruction select globals with offsets better. For example, on this test
...
case:
int C[100];
int foo() {
return C[4];
}
We now codegen:
foo:
mov %EAX, DWORD PTR [C + 16]
ret
instead of:
foo:
mov %EAX, OFFSET C
mov %EAX, DWORD PTR [%EAX + 16]
ret
Other impressive features may be coming later.
This patch is contributed by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17011 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 05:05:29 +00:00
Chris Lattner
8cce7cd0ae
Give the X86 JIT the ability to encode global+disp constants. Patch
...
contributed by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17010 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 04:53:13 +00:00
Chris Lattner
d416f086cc
Give the X86 asm printer the ability to print out addressing modes that have
...
constant displacements from global variables. Patch by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17009 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 04:44:53 +00:00
Chris Lattner
fb3d844e50
Allow X86 addressing modes to represent globals with offsets. Patch contributed
...
by Jeff Cohen!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17008 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 04:43:20 +00:00
Reid Spencer
d96cb6eaa0
Update to reflect changes in Makefile rules.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16950 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-13 11:46:52 +00:00
Reid Spencer
81f76b324e
Initial version of automake Makefile.am file.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 22:20:40 +00:00
Chris Lattner
222b86f694
The person who was planning to add SSE support isn't anymore, so disable
...
the -sse* options (to avoid misleading people).
Also, the stack alignment of the target doesn't depend on whether SSE is
eventually implemented, so remove a comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16860 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 22:41:46 +00:00
Chris Lattner
b0f4e389db
Fix a major regression from the bugfix for 2004-10-08-SelectSetCCFold.llx,
...
which prevented setcc's from being folded into branches. It appears that
conditional branchinst's CC operand is actually operand(2), not operand(0)
as we might expect. :(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16859 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 22:24:31 +00:00
Chris Lattner
d04cd55796
Fix bug: 2004-10-08-SelectSetCCFold.llx. Normally this is hidden by the
...
instcombine xform, which is why we didn't notice it before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16840 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 16:34:13 +00:00
Chris Lattner
09c750f73d
Remove debugging code, fix encoding problem. This fixes the problems
...
the JIT had last night.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16766 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 14:31:50 +00:00
Chris Lattner
2483f67914
Codegen signed mod by 2 or -2 more efficiently. Instead of generating:
...
t:
mov %EDX, DWORD PTR [%ESP + 4]
mov %ECX, 2
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
mov %EAX, %EDX
ret
Generate:
t:
mov %ECX, DWORD PTR [%ESP + 4]
*** mov %EAX, %ECX
cdq
and %ECX, 1
xor %ECX, %EDX
sub %ECX, %EDX
*** mov %EAX, %ECX
ret
Note that the two marked moves are redundant, and should be eliminated by the
register allocator, but aren't.
Compare this to GCC, which generates:
t:
mov %eax, DWORD PTR [%esp+4]
mov %edx, %eax
shr %edx, 31
lea %ecx, [%edx+%eax]
and %ecx, -2
sub %eax, %ecx
ret
or ICC 8.0, which generates:
t:
movl 4(%esp), %ecx #3.5
movl $-2147483647, %eax #3.25
imull %ecx #3.25
movl %ecx, %eax #3.25
sarl $31, %eax #3.25
addl %ecx, %edx #3.25
subl %edx, %eax #3.25
addl %eax, %eax #3.25
negl %eax #3.25
subl %eax, %ecx #3.25
movl %ecx, %eax #3.25
ret #3.25
We would be in great shape if not for the moves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16763 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 05:01:07 +00:00
Chris Lattner
3ffdff6448
Fix a scary bug with signed division by a power of two. We used to generate:
...
s: ;; X / 4
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 1
shr %ECX, 30
mov %EDX, %EAX
add %EDX, %ECX
sar %EAX, 2
ret
When we really meant:
s:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 1
shr %ECX, 30
add %EAX, %ECX
sar %EAX, 2
ret
Hey, this also reduces register pressure too :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16761 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 04:19:43 +00:00
Chris Lattner
610f1e2785
Codegen signed divides by 2 and -2 more efficiently. In particular
...
instead of:
s: ;; X / 2
movl 4(%esp), %eax
movl %eax, %ecx
shrl $31, %ecx
movl %eax, %edx
addl %ecx, %edx
sarl $1, %eax
ret
t: ;; X / -2
movl 4(%esp), %eax
movl %eax, %ecx
shrl $31, %ecx
movl %eax, %edx
addl %ecx, %edx
sarl $1, %eax
negl %eax
ret
Emit:
s:
movl 4(%esp), %eax
cmpl $-2147483648, %eax
sbbl $-1, %eax
sarl $1, %eax
ret
t:
movl 4(%esp), %eax
cmpl $-2147483648, %eax
sbbl $-1, %eax
sarl $1, %eax
negl %eax
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16760 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 04:02:39 +00:00
Chris Lattner
d93d3b047c
Add some new instructions. Fix the asm string for sbb32rr
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16759 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 04:01:02 +00:00
Chris Lattner
955f09666d
* Prune #includes
...
* Update comments
* Rearrange code a bit
* Finally ELIMINATE the GAS workaround emitter for Intel mode. woot!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:31:08 +00:00
Chris Lattner
ac5701c562
Add support for emitting AT&T style .s files, and make it the default. Users
...
may now choose their output format with the -x86-asm-syntax={intel|att} flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16646 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:24:48 +00:00
Chris Lattner
8f99eff156
Convert some missed patterns to support AT&T style
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16645 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:23:07 +00:00
Chris Lattner
10f873b420
Apparently the GNU assembler has a HUGE hack to be compatible with really
...
old and broken AT&T syntax assemblers. The problem with this hack is that
*SOME* forms of the fdiv and fsub instructions have the 'r' bit inverted.
This was a real pain to figure out, but is trivially easy to support: thus
we are now bug compatible with gas and gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16644 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 07:08:46 +00:00
Chris Lattner
ac6a47588b
Fix incorrect suffix
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16642 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 05:20:16 +00:00
Chris Lattner
707c6fe3ad
Fix some more missed suffixes and swapped operands
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16641 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 01:38:10 +00:00
Chris Lattner
60c715c9a2
Add missing suffixes to FP instructions for AT&T mode
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16640 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-04 00:43:31 +00:00
Chris Lattner
9a3e49a1b3
Add support for the -x86-asm-syntax flag, which can be used to choose between
...
Intel and AT&T style assembly language. The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16639 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 20:36:57 +00:00
Chris Lattner
3a173dfc72
Add support to the instruction patterns for AT&T style output, which will
...
hopefully lead to the death of the 'GasBugWorkaroundEmitter'. This also
includes changes to wrap the whole file to 80 columns! Woot! :)
Note that the AT&T style output has not been tested at all.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16638 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 20:35:00 +00:00
Alkis Evlogimenos
65cbfa0f37
The real x87 floating point registers should not be allocatable. They
...
are only used by the stackifier when transforming FPn register
allocations to the real stack file x87 registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16472 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 21:22:11 +00:00
Misha Brukman
eae1bf10ea
s/ISel/X86ISel/ to have unique class names for debugging via gdb because the C++
...
front-end in gcc does not mangle classes in anonymous namespaces correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16469 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 18:21:21 +00:00
Reid Spencer
2da5c3dda6
Convert code to compile with vc7.1.
...
Patch contributed by Paolo Invernizzi. Thanks Paolo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16368 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-15 17:06:42 +00:00
Misha Brukman
a2700194ae
Fit long lines into 80 cols via creative space elimination
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16353 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-15 01:40:18 +00:00
Chris Lattner
b228657acc
Revamp the Register class, and allow the use of the RegisterGroup class to
...
specify aliases directly in register definitions.
Patch contributed by Jason Eckhardt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Misha Brukman
fb0796e82e
Fix filename: Printer.cpp has become X86AsmPrinter.cpp
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16299 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-12 21:26:04 +00:00
Alkis Evlogimenos
93c1ab2e15
Use a shorter form to express implicit use/defs in FpGETRESULT and
...
FpSETRESULT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16247 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-08 18:29:31 +00:00
Alkis Evlogimenos
978f629ba9
A call instruction should implicitely define ST0 since the return
...
value is returned in that register. The pseudo instructions
FpGETRESULT and FpSETRESULT shold also have an implicity use and def
of ST0 repsecitvely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16246 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-08 16:54:54 +00:00
Reid Spencer
551ccae044
Changes For Bug 352
...
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Reid Spencer
fc989e1ee0
Reduce the number of arguments in the instruction builder and make some
...
improvements on instruction selection that account for register and frame
index bases.
Patch contributed by Jeff Cohen. Thanks Jeff!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16110 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-30 00:13:26 +00:00
Chris Lattner
6f0161aac3
Add -sse[,2,3] arguments to LLC
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16018 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-24 08:18:44 +00:00
Chris Lattner
47d2f2bb50
Nuke commented out stuff
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16017 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-24 08:18:27 +00:00
Chris Lattner
ff0a6e6aac
Switch from bytes to bits for alignment for consistency
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15974 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:14:13 +00:00
Chris Lattner
fae896999c
Reduce uses of getRegClass
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15973 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:13:52 +00:00
Chris Lattner
f746a7d09b
Rename var
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15897 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-18 02:22:55 +00:00
Chris Lattner
c6393f82bf
Start using alignment output routines from AsmPrinter.
...
Changes to make this more similar to the ppc asmprinter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15890 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 19:25:42 +00:00
Chris Lattner
8581ee85b4
Use the AsmPrinter emitGlobalConstant.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15872 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 06:48:55 +00:00
Chris Lattner
055acae18c
Start using the AsmPrinter to emit our first class constants. This also
...
drops our half-assed support for cygwin, which noone uses and doesn't work
anyway.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15839 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-16 23:16:06 +00:00
Chris Lattner
f60b91cbe3
Disable the pattern isel
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15787 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 23:02:17 +00:00
Chris Lattner
01d0efba39
Code insertion methods now return void instead of an int.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15780 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 22:15:11 +00:00
Chris Lattner
57f1b67c34
These methods no longer take a TargetRegisterClass* operand.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15774 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-15 21:56:44 +00:00
Nate Begeman
f8be5e94aa
Eliminate MachineFunction& argument from eliminateFrameIndex in x86 Target. Get MachineFunction from MachineInstruction's parent's parent
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15739 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:05:10 +00:00
Chris Lattner
c96bb817aa
Remove a bunch of ad-hoc target-specific flags that were only used by the
...
old asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:12:04 +00:00
Chris Lattner
8e61d82528
Remove a dead method
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15659 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:07:14 +00:00
Chris Lattner
2a998bdc7c
Finally, the entire instruction asmprinter is now generated from tblgen, woo!
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15658 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 07:02:04 +00:00
Chris Lattner
e4ead0ce62
Add asmprintergen support for the last X86 instruction that needs it: pcrelative calls.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15657 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:59:12 +00:00
Chris Lattner
8198fcfc5d
This file is long dead
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15656 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:55:12 +00:00
Chris Lattner
9795b3a0e7
Scrunch memoperands, add a few more for floating point memops
...
Eliminate the FPI*m classes, converting them to use FPI instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15655 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:50:10 +00:00
Chris Lattner
8549429a78
Move hacks up
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15654 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 06:09:55 +00:00
Chris Lattner
0f38e6ccca
Make FPI take asm string and operand list
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15653 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:54:16 +00:00
Chris Lattner
f5d3a83f65
Nuke the Im*i* patterns, by asmprintergenifying all users.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15652 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:31:07 +00:00
Chris Lattner
f29ed0937f
X86 instructions that read-modify-write memory are not LLVM two-address instructions.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15651 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 05:07:25 +00:00
Chris Lattner
57a02306c5
Get rid of the Im8, Im16, Im32 classes, converting more instructions over to
...
asmprintergeneration
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15650 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 04:31:00 +00:00
Chris Lattner
916f96ace0
Remove dead method
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:26:39 +00:00
Chris Lattner
66fa1dcf90
Convert asmprinter to new style of instruction printer
...
Start asmprintergen'ifying machine instrs with memory operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15646 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:25:00 +00:00
Chris Lattner
36b689009d
This is purely a formatting patch that gets us closer to the mecca of fitting
...
X86InstrInfo.td into 80 columns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15629 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:21:30 +00:00
Chris Lattner
1b9e20e32f
Drop the first argument of FPI, and asmprinterify fxch
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15628 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 21:02:13 +00:00
Chris Lattner
30bf2d8951
This purely mechanical patch gives the "I" tblgen class operand list and asm
...
string operands, and adjusts all users to pass them in instead of using II.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15624 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 20:17:41 +00:00
Chris Lattner
869f477f34
Convert Ii32 instructions over to use the asmprinter generator
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15621 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 19:06:36 +00:00
Chris Lattner
7d620d57a4
Convert the Ii16 instructions over
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15606 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 16:22:02 +00:00
Chris Lattner
ab67067186
Convert all Ii8 instructions over to the autogenerated asmprinter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15605 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-10 16:09:54 +00:00
Alkis Evlogimenos
15876bb28c
Stop using getValues().
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15487 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-04 08:44:43 +00:00
Chris Lattner
bcdda01210
Fix a warning
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15409 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 19:31:30 +00:00
Chris Lattner
fc752713d7
Convert all I<> instructions to asmformat.
...
Delete the 'name' field of all instructions that have asmformats.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15403 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 09:52:59 +00:00
Chris Lattner
a35ce87e2e
Eliminate 3 of the X86 printImplicit* flags.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15398 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:23:17 +00:00
Chris Lattner
1626c507e8
Get rid of 3 of the 4 'printimplicit' flags. Implicit operands are now
...
explicitly listed in the asm string.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15397 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:22:29 +00:00
Chris Lattner
0e967d4f48
Convert more instructions over to the asmprinter
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15396 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:13:11 +00:00
Chris Lattner
25369cfa2b
Handle registers a bit more efficiently
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15395 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:12:41 +00:00
Chris Lattner
068758e518
give FP stack registers names
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15394 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:12:13 +00:00
Chris Lattner
ffff70827c
Switch more instructions over to using the asmprinter. Fix bugs in the emission
...
of in/out instructions (missing %'s on registers).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15393 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 07:44:35 +00:00
Chris Lattner
b12ee503f7
The tblgen'erated asmparser wants a way to print operands.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15392 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 07:43:46 +00:00
Chris Lattner
3fa861ac6c
Rename the Printer class -> X86AsmPrinter.
...
Include the tablegenerated assembly writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15389 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 06:02:08 +00:00
Chris Lattner
8f945d7756
Factor a bunch of the rules and add support for generating the asmwriter.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15388 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 06:01:32 +00:00
Chris Lattner
96563df090
Specify an asm string and operands lists for a bunch of instructions.
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This only really covers no-operand instructions so far.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15387 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 06:01:00 +00:00
Chris Lattner
1ab7c5b5e8
Completely disable the pattern isel until it is more substantial.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15380 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 03:28:02 +00:00
Chris Lattner
4ad25e432d
Entirely eliminate all patterns and expanders from this file. We shall go
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with an incremental approach rather than a revolutionary approach.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15379 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 03:25:01 +00:00
Chris Lattner
bb737edcc3
Remove obsolete file
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15377 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 03:19:28 +00:00
Alkis Evlogimenos
31e155e610
Align breaks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15371 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 10:05:44 +00:00
Chris Lattner
167cf33e1d
Add breaks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15365 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:53:31 +00:00
Alkis Evlogimenos
6103c1703c
Simplify code a bit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15364 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:44:32 +00:00
Alkis Evlogimenos
02a453074d
Correctly spell 'unconditional'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15363 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:41:44 +00:00
Alkis Evlogimenos
36f506eddb
Implement insertGoto and reverseBranchCondition for the X86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15362 91177308-0d34-0410-b5e6-96231b3b80d8
2004-07-31 09:38:47 +00:00