Commit Graph

48756 Commits

Author SHA1 Message Date
Owen Anderson
8313b48bbe Fill in some encoding information for STRD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 17:53:25 +00:00
Owen Anderson
aa3402e280 Revert r136295. It broke nightly testers because some parts of codegen weren't aware of the changes to operand ordering. I hope to revive this sometime in the future, but it's not strictly necessary for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 17:18:57 +00:00
Jim Grosbach
70a0915cd1 ARM parsing and encoding for ADR.
The label does not have a '#' prefix. Add parsing and encoding tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 16:33:54 +00:00
Nadav Rotem
2ff4bc6155 CR fix: The ANY_EXTEND can be removed because the input and putput type must be
identical.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136355 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 14:38:46 +00:00
Bill Wendling
9580641d5f Some minor cleanups. No functionalitical change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 07:44:07 +00:00
Bill Wendling
9a2dde3fd1 Leverage some of the code that John wrote to manage the landing pads.
The new EH is more simple in many respects. Mainly, we don't have to worry about
the "llvm.eh.exception" and "llvm.eh.selector" calls being in weird places.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 07:31:46 +00:00
Bill Wendling
7196184610 Don't add in the asked for size so that we don't copy too much from the old to new vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 07:26:41 +00:00
Bill Wendling
e8ce880f1a Automatically merge the landingpad clauses when we come across a callee's
landingpad.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136329 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 02:40:13 +00:00
Oscar Fuentes
4ebc5916e9 Explicitly declare a library dependency of LLVM*Desc to
LLVM*AsmPrinter.

GenLibDeps.pl fails to detect vtable references. As this is the only
referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized
builds, the algorithm that creates the list of libraries to be linked
into tools doesn't know about the dependency and sometimes places the
libraries on the wrong order, yielding error messages like this:

../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function
`llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)':
ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE
[llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo
const&)]+0x2a): undefined reference to `vtable for
llvm::ARMInstPrinter'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 02:33:52 +00:00
Bill Wendling
28d735230f Make sure that the landingpad instruction takes a Constant* as the clause's value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136326 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 02:27:12 +00:00
Bill Wendling
7f66c45f35 Add a couple of convenience functions:
* InvokeInst: Get the landingpad instruction associated with this invoke.
* LandingPadInst: A method to reserve extra space for clauses.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136325 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 02:15:52 +00:00
Bruno Cardoso Lopes
15d03fb7f4 Invert the subvector insertion to be more likely to be taken as a COPY
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:26:53 +00:00
Bruno Cardoso Lopes
93fa4766c2 Add patterns to generate copies for extract_subvector instead of
using vextractf128. This will reduce the number of issued instruction
for several avx codes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:26:50 +00:00
Bruno Cardoso Lopes
735bccda65 movd/movq write zeros in the high 128-bit part of the vector. Use
them to match 256-bit scalar_to_vector+zext.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:26:46 +00:00
Bruno Cardoso Lopes
a23236c360 Add a few patterns to match allzeros without having to use the fp unit.
Take advantage that the 128-bit vpxor zeros the higher part and use it.
This also fixes PR10491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:26:43 +00:00
Bruno Cardoso Lopes
2e64ae4101 Add SINT_TO_FP and FP_TO_SINT support for v8i32 types. Also move
a convert pattern close to the instruction definition.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:26:39 +00:00
Benjamin Kramer
b2e7c8250b Fix a use after free. An instruction can't be both an intrinsic call and a fence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 01:20:19 +00:00
Bill Wendling
2bf84c15d2 Initial stab at getting inlining working with the EH rewrite.
This takes the new 'resume' instruction and turns it into a direct jump to the
caller's landing pad code. The caller's landingpad instruction is merged with
the landingpad instructions of the callee. This is a bit rough and makes some
assumptions in how the code works. But it passes a simple test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 00:38:23 +00:00
Argyrios Kyrtzidis
814450a429 Add an optional 'bool makeAbsolute' in llvm::sys::fs::unique_file function.
If true and 'model' parameter is not an absolute path, a temp directory will be prepended.
Make it true by default to match current behaviour.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-28 00:29:20 +00:00
Owen Anderson
7b2958392c Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:36:57 +00:00
Evan Cheng
5de728cfe1 Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil.
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:22:03 +00:00
Kevin Enderby
c37d4bbf1f Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.
llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136287 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 23:01:50 +00:00
Jim Grosbach
addec77b54 ARM assembly parsing and encoding support for USAT and USAT16.
Use range checked immediate operands for instructions. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136285 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:34:17 +00:00
Eli Friedman
1464846801 Code generation for 'fence' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:21:52 +00:00
Jakub Staszak
9a24f1f070 Use BlockFrequency instead of uint32_t in BlockFrequencyInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136278 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:05:51 +00:00
Jim Grosbach
49f2ceddd2 ARM assembly parsing and encoding for UMULL.
Fix parsing of the 's' suffix for the mnemonic. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136277 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:01:42 +00:00
Devang Patel
0748f83d37 Remove outdated FIXME comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136275 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 22:00:01 +00:00
Jim Grosbach
71725a099e ARM assembly parsing and encoding for UMLAL.
Fix parsing of the 's' suffix for the mnemonic. Add tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136274 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:58:11 +00:00
Bill Wendling
91c56a8d8d Refuse to inline two functions which use different personality functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136269 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:44:28 +00:00
Jim Grosbach
fb8989e640 ARM parsing and encoding of SBFX and UBFX.
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136264 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 21:09:25 +00:00
Owen Anderson
06470311c5 Refactor the STRT and STRBT instructions to distinguish between the register-addend and immediate-addend versions. Temporarily XFAIL the asm parsing tests for these instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136255 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:29:48 +00:00
Bill Wendling
772fe17a6d Merge the contents from exception-handling-rewrite to the mainline.
This adds the new instructions 'landingpad' and 'resume'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:18:04 +00:00
Jim Grosbach
7e1547ebf7 ARM assembly parsing and encoding for extend instructions.
Assembly parser handling for extend instruction rotate operands. Add tests
for the sign extend instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136252 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 20:15:40 +00:00
Nick Lewycky
e511186183 Teach the ConstantMerge pass about alignment. Fixes PR10514!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 19:47:34 +00:00
Eli Friedman
84e7f7e267 X86ISD::MEMBARRIER does not require SSE2; it doesn't actually generate any code, and all x86 processors will honor the required semantics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136249 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 19:43:50 +00:00
Jim Grosbach
766c63e78b ARM assembly parsing aliases for extend instructions w/o rotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 18:19:32 +00:00
Jim Grosbach
7032741e7b ARM cleanup of remaining extend instructions.
Refactor the rest of the extend instructions to not artificially distinguish
between a rotate of zero and a rotate of any other value. Replace the by-zero
versions with Pat<>'s for ISel.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 17:48:13 +00:00
Jim Grosbach
c5a8c861c9 ARM extend instructions simplification.
Refactor the SXTB, SXTH, SXTB16, UXTB, UXTH, and UXTB16 instructions to not
have an 'r' and an 'r_rot' version, but just a single version with a rotate
that can be zero. Use plain Pat<>'s for the ISel of the non-rotated version.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 16:47:19 +00:00
Jakub Staszak
ffcc2a542c Optimize 96-bit division a little bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136222 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 16:00:40 +00:00
Jakub Staszak
636a02b57c Move static methods to the anonymous namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136221 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 15:51:51 +00:00
Frits van Bommel
a09d514b29 Trim includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136218 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 15:20:06 +00:00
Jeffrey Yasskin
a44defeb22 Explicitly cast narrowing conversions inside {}s that will become errors in
C++0x.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136211 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 06:22:51 +00:00
Dan Gohman
cbdccdeea9 Revert r136156, which broke several buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136206 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 01:10:27 +00:00
Eli Friedman
8a552bb85a Misc mid-level changes for new 'fence' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136205 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 01:08:30 +00:00
Eli Friedman
751bef77d0 Minor simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 01:02:25 +00:00
Bruno Cardoso Lopes
9b4ad12b1e Move some code around to open opportunity for more shuffle matching
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:37 +00:00
Bruno Cardoso Lopes
cea34e41fa The vpermilps and vpermilpd have different behaviour regarding the
usage of the shuffle bitmask. Both work in 128-bit lanes without
crossing, but in the former the mask of the high part is the same
used by the low part while in the later both lanes have independent
masks. Handle this properly and and add support for vpermilpd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136200 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:34 +00:00
Bruno Cardoso Lopes
cd9e5aed53 Remove more dead code!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:56:27 +00:00
Eli Friedman
6f3ba37ebb Fix AliasSetTracker so that it doesn't make any assumptions about instructions it doesn't know about (like the atomic instructions I'm adding).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:46:46 +00:00
Evan Cheng
bd27f5adbd Support .code32 and .code64 in X86 assembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:38:12 +00:00
Devang Patel
26a92003cd It is quiet possible that inlined function body is split into multiple chunks of consequtive instructions. But, there is not any way to describe this in .debug_inline accelerator table used by gdb. However, describe non contiguous ranges of inlined function body appropriately using AT_range of DW_TAG_inlined_subroutine debug info entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136196 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-27 00:34:13 +00:00
Jakob Stoklund Olesen
00005782fa Add support for multi-way live range splitting.
When splitting global live ranges, it is now possible to split for
multiple destination intervals at once. Previously, we only had the main
and stack intervals.

Each edge bundle is assigned to a split candidate, and splitAroundRegion
will insert copies between the candidate intervals and the stack
interval as needed.

The multi-way splitting is used to split around compact regions when
enabled with -compact-regions. The best candidate register still gets
all the bundles it wants, but everything outside the main interval is
first split around compact regions before we create single-block
intervals.

Compact region splitting still causes some regressions, so it is not
enabled by default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 23:41:46 +00:00
Jakob Stoklund Olesen
3b92527885 Print out the MBB live-in registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136178 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 23:12:08 +00:00
Jakob Stoklund Olesen
e4709777e3 Eliminate copies of undefined values during coalescing.
These copies would coalesce easily, but the resulting value would be
defined by a deleted instruction. Now we also remove the undefined value
number from the destination register.

This fixes PR10503.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 23:00:24 +00:00
Benjamin Kramer
162ee5c725 Add a neat little two's complement hack for x86.
On x86 we can't encode an immediate LHS of a sub directly. If the RHS comes from a XOR with a constant we can
fold the negation into the xor and add one to the immediate of the sub. Then we can turn the sub into an add,
which can be commuted and encoded efficiently.

This code is generated for __builtin_clz and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136167 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:42:13 +00:00
Bruno Cardoso Lopes
4ea496846a Recognize unpckh* masks and match 256-bit versions. The new versions are
different from the previous 128-bit because they work in lanes.
Update a few comments and add testcases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136157 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:03:40 +00:00
Dan Gohman
c680b92460 Delete unnecessarily cautious LastCALLSEQ code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136156 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 22:00:59 +00:00
Jim Grosbach
45f3929ef0 ARM rot_imm printing adjustment.
Allow the rot_imm operand to be optional. This sets the stage for refactoring
away the "rr" versions from the multiclasses and replacing them with Pat<>s.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136154 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 21:44:37 +00:00
Jim Grosbach
85bfd3b023 ARM cleanup of rot_imm encoding.
Start of cleaning this up a bit. First step is to remove the encoder hook by
storing the operand as the bits it'll actually encode to so it can just be
directly used. Map it to the assembly source values 8/16/24 when we print it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136152 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 21:28:43 +00:00
Eli Friedman
61cc47e15d Prevent x86-specific DAGCombine from creating nodes with illegal type (which could not be selected). Fixes a minor isel issue that was breaking the testcase from r136130.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 21:02:58 +00:00
Evan Cheng
bfe3686aee Remove one last reference to Target in MC library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136145 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:57:44 +00:00
Owen Anderson
793e79601f Split am2offset into register addend and immediate addend forms, necessary for allowing the fixed-length disassembler to distinguish between SBFX and STR_PRE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136141 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:54:26 +00:00
Nicolas Geoffray
45c8d2bc9c Update generated code to use new API of GetElementPtrInst::Create.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136138 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:52:25 +00:00
Jim Grosbach
0d87ec21d7 Fix over-zealous rename from r136095.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136132 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:41:24 +00:00
Eli Friedman
24f05334e6 Add obvious missing case to switch. PR10497.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136130 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 20:38:49 +00:00
Bill Wendling
726f1b90a9 Use the correct for for the version. It's little endian and my brain is
obviously big endian. :-)
PR10502


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:31:41 +00:00
Jim Grosbach
189610f946 ARM diagnostics for ldrexd/stredx out of order paired register operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:25:39 +00:00
Bruno Cardoso Lopes
cf128eab90 Remove now unused patterns. 0 insertions(+), 98 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:39 +00:00
Bruno Cardoso Lopes
5e3267dac9 Cleanup old matching for PUNPCK* variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:22:27 +00:00
Devang Patel
a671a3092a While extracting lexical scopes from machine instruction stream, work on one machine basic block at a time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:09:53 +00:00
Jim Grosbach
dfdf02dbad ARM fix for LDREX source register encoding.
rdar://9842203


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:44:46 +00:00
Andrew Trick
5116ff671f SCEV: Added a data structure for storing not-taken info per loop
exit. Added an interfaces for querying either the loop's exact/max
backedge taken count or a specific loop exit's not-taken count.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:19:55 +00:00
Jim Grosbach
4f6f13db1a ARM assembly parsing and encoding for SWP[B] instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:15:11 +00:00
Jim Grosbach
1ef91417bd ARM SWP instructions store, too, not just load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:11:05 +00:00
Jim Grosbach
1355cf1f76 Clean up the ARM asm parser a bit.
No intendeded functional change. Just cleaning up a bit to make things more
self-consistent in layout and style.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 17:10:22 +00:00
Jim Grosbach
3d5ab367b6 ARM fix asm parsing range check for [0,31] immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 16:44:05 +00:00
Jim Grosbach
ed8384806e ARM parsing and encoding for SVC instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 16:24:27 +00:00
Duncan Sands
652b48bf23 Teach the Triple class about kfreebsd (FreeBSD kernel with
a GNU userspace).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:30:04 +00:00
Rafael Espindola
3d72290ecb Add LLVMAddAlwaysInlinerPass to the C API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:23:23 +00:00
Rafael Espindola
a03084d86e LLVM 3.0 is here, remove old do nothing method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:17:32 +00:00
Duncan Sands
7becbc41ab SrcDef is only written and never read. Remove it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:05:06 +00:00
Duncan Sands
f56138d4ae Add helper function for getting true/false constants in a uniform
way for i1 and vector of i1 types.  Use these to make some code
more self-documenting.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 15:03:53 +00:00
Bill Wendling
de77055a68 The compact unwinding offsets are divided by 8 on 64-bit machines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 08:03:49 +00:00
Bruno Cardoso Lopes
5d348b4dc4 Add 256-bit isel for movsldup/movshdup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136051 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:32 +00:00
Bruno Cardoso Lopes
9123c6fea0 More movsldup/movshdup cleanup. Rewrite the mask matching function and add
support for 256-bit versions (but no instruction selection yet, coming next).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:28 +00:00
Bruno Cardoso Lopes
5f6c440e53 More cleanup, subtarget info isn't used here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:25 +00:00
Bruno Cardoso Lopes
cc1c3526a7 Add 128-bit AVX versions of movshdup/mosldup
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:23 +00:00
Bruno Cardoso Lopes
3e9235c720 Cleanup movsldup/movshdup matching.
27 insertions(+), 62 deletions(-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 02:39:13 +00:00
Jakob Stoklund Olesen
165e231c42 Revert to RA_Assign when a virtreg separates into components.
When dead code elimination deletes a PHI value, the virtual register may
split into multiple connected components. In that case, revert each
component to the RS_Assign stage.

The new components are guaranteed to be smaller (the original value
numbers are distributed among the components), so this will always be
making progress. The components are now allowed to evict other live
ranges or be split again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136034 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:54:56 +00:00
Evan Cheng
28c85a81a1 Rename createCodeEmitter to createMCCodeEmitter; createObjectStreamer to createMCObjectStreamer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:42:34 +00:00
Chandler Carruth
0682597817 Remove a file from CMakeLists.txt that Evan removed in r136027.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:30:33 +00:00
Evan Cheng
94b9550a32 Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:24:13 +00:00
Chandler Carruth
b35552d440 Clean up a pile of hacks in our CMake build relating to TableGen.
The first problem to fix is to stop creating synthetic *Table_gen
targets next to all of the LLVM libraries. These had no real effect as
CMake specifies that add_custom_command(OUTPUT ...) directives (what the
'tablegen(...)' stuff expands to) are implicitly added as dependencies
to all the rules in that CMakeLists.txt.

These synthetic rules started to cause problems as we started more and
more heavily using tablegen files from *subdirectories* of the one where
they were generated. Within those directories, the set of tablegen
outputs was still available and so these synthetic rules added them as
dependencies of those subdirectories. However, they were no longer
properly associated with the custom command to generate them. Most of
the time this "just worked" because something would get to the parent
directory first, and run tablegen there. Once run, the files existed and
the build proceeded happily. However, as more and more subdirectories
have started using this, the probability of this failing to happen has
increased. Recently with the MC refactorings, it became quite common for
me when touching a large enough number of targets.

To add insult to injury, several of the backends *tried* to fix this by
adding explicit dependencies back to the parent directory's tablegen
rules, but those dependencies didn't work as expected -- they weren't
forming a linear chain, they were adding another thread in the race.

This patch removes these synthetic rules completely, and adds a much
simpler function to declare explicitly that a collection of tablegen'ed
files are referenced by other libraries. From that, we can add explicit
dependencies from the smaller libraries (such as every architectures
Desc library) on this and correctly form a linear sequence. All of the
backends are updated to use it, sometimes replacing the existing attempt
at adding a dependency, sometimes adding a previously missing dependency
edge.

Please let me know if this causes any problems, but it fixes a rather
persistent and problematic source of build flakiness on our end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 00:09:08 +00:00
Evan Cheng
c9a7c8dd1e TargetAsmBackend has been renamed to MCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136012 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:28:36 +00:00
Evan Cheng
78c10eeaa5 Rename TargetAsmBackend to MCAsmBackend; rename createAsmBackend to createMCAsmBackend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:24:55 +00:00
Eli Friedman
47f3513dd5 Initial implementation of 'fence' instruction, the new C++0x-style replacement for llvm.memory.barrier.
This is just a LangRef entry and reading/writing/memory representation; optimizer+codegen support coming soon.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:16:38 +00:00
Nick Lewycky
5a1cb644c9 Finish adding support for lifetime intrinsics to SROA. Fixes PR10121!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:14:22 +00:00
Jim Grosbach
f49433523e ARM assembly parsing and encoding for SSAT16 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:09:14 +00:00
Bruno Cardoso Lopes
863bd9d5cf Codegen allonesvector better while using AVX: vpcmpeqd + vinsertf128
This also fixes PR10452

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:32 +00:00
Bruno Cardoso Lopes
51e92e8e41 Add remaining 256-bit vector bitcasts. This also fixes PR10451
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136003 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 23:05:28 +00:00