Commit Graph

11184 Commits

Author SHA1 Message Date
Chris Lattner
48a7d0257f Make isel determine where to emit PLT-relative calls instead of having
asmprinter do it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75104 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 05:02:21 +00:00
Chris Lattner
fb37d9561e isPICStyleStub() is now never true in -static mode, so simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75102 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 04:43:12 +00:00
Chris Lattner
15a380a035 simplify some code based on the fact that picstyles != none are only valid
in pic or dynamic-no-pic mode. Also, x86-64 never used picstylegot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 04:39:06 +00:00
Chris Lattner
3fff30d471 all this logic always returns true because GOT mode is never active in x86-64 mode.
Simplify it away, someone should evaluate this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75100 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 04:27:47 +00:00
Chris Lattner
88e1fd539e isPICStyleRIPRel() and friends are never true in -static mode.
Simplify code based on this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75099 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 04:24:46 +00:00
Nick Lewycky
f16120475e Move PR4517 to README.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75098 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 04:03:30 +00:00
Chris Lattner
482fa0f2bc .o file writing shouldn't mess around with pic/relo models like the JIT does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75096 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 03:40:30 +00:00
Chris Lattner
b2fc55b721 move a hack out of the asm-printer specific path to the main target selection path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75095 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 03:37:30 +00:00
Chris Lattner
11348ee263 many more cleanups, for example if in the "none" pic-style,
make sure we're set to static codegen.  Simplify the decision
tree of target->picstyle/picmode settings.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 03:32:31 +00:00
Chris Lattner
73b5b71369 Reduce indentation in GVRequiresExtraLoad. Return true for windows
with DLLImport symbols even when in -static mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75093 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 03:27:27 +00:00
Chris Lattner
e4df756289 When in -static mode, force the PIC style to none. Doing this requires fixing
code which conflated RIPRel PIC with x86-64.  Fix these to just check for X86-64
directly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75092 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 03:15:51 +00:00
Chris Lattner
b133a0aff7 merge two identical functions and simplify things that are GOT specific
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75091 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 02:55:47 +00:00
Chris Lattner
e3ee6f1e1f hoist check for IsTailCall to callers. Eliminate redundant check for
x86-64: GOT-style PIC is never used on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75090 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 02:46:53 +00:00
Chris Lattner
951bf7d74f change a few methods to be static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 02:44:11 +00:00
Chris Lattner
7c10e0e26c one more added assert.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75088 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 02:43:55 +00:00
Chris Lattner
4aa21aa6d1 move handling of dllimport linkage in isel, not in asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75086 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 00:58:53 +00:00
Chris Lattner
885ce84ab8 one more assertion!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75083 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 00:49:29 +00:00
Chris Lattner
033bcee4ef add some more assertions. Remove code to handle dllimport on darwin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75082 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 00:47:59 +00:00
Chris Lattner
44f7bbd531 remove "asmcall", using print_pcrel_imm instead of printOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75080 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 00:39:19 +00:00
Chris Lattner
b172b0b1ba simplify some logic
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75079 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 00:32:12 +00:00
Chris Lattner
9f44b3a411 * add some assertions for sanity checking.
* remove some old code that was needed when we'd put ESP in the scale instead of 
  the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75077 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-09 00:27:29 +00:00
David Goodwin
f1daf7d8ab Use common code for both ARM and Thumb-2 instruction and register info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 23:10:31 +00:00
Chris Lattner
8529d28ee3 * manually concatenate two string literals
* remove some dead code: darwin doesn't support dllimport linkage.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75066 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 23:09:14 +00:00
Evan Cheng
dda0f4cb79 - Add some NEON ld / st instruction static encoding.
- Make bits 25-27 for ldrh, etc. explicitly zero. Previously only the JIT uses the encoding information and it's assuming anything not specified to be zero. Making them explicit so the disassembler is happy.
Patch by Sean Callanan.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75065 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 22:51:32 +00:00
Evan Cheng
e7cbe4118b Change how so_imm and t2_so_imm are handled. At instruction selection time, the immediates are no longer encoded in the imm8 + rot format, that are left as it is. The encoding is now done in ams printing and code emission time instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75048 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 21:03:57 +00:00
Bill Wendling
c3d505c3c2 Recommit r74952 with a bug fix:
DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
       pushl   %ebp
Llabel1:
       movl    %esp, %ebp
Llabel2:
       pushl   %esi
Llabel3:
       subl    $20, %esp
       call    "L1$pb"
"L1$pb":
       popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.

There is some ugliness where we generate code like this:


LBB22_0:	## entry
	pushl	%ebp
Llabel280:
	movl	%esp, %ebp
Llabel281:
Llabel284:
	pushl	%ebp  <----------
	pushl	%ebx
	pushl	%edi
	pushl	%esi
Llabel282:
	subl	$328, %esp

Notice the extra "pushl %ebp". If we generate a "machine move" instruction in
the FDE for that pushl, the linker may get very confused about what value %ebp
should have when exitting the function. I.e., it'll give it the value %esp
instead of the %ebp value from the first "pushl". Not to mention that, in this
case, %ebp isn't modified in the function (that's a separate bug). I put a small
hack in to get it to work. It might be the only solution, but should be
revisited once the above case is fixed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75047 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 21:02:53 +00:00
Torok Edwin
3046470919 Missed an exit during the conversion.
Will convert assert(0) that don't have abort() to LLVM_UNREACHABLE in a later
commit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75045 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:55:50 +00:00
Torok Edwin
dac237e182 Implement changes from Chris's feedback.
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:53:28 +00:00
Bob Wilson
2ed334694f Implement NEON vst1 instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:32:02 +00:00
David Goodwin
77521f5232 Generalize opcode selection in ARMBaseRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75036 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:28:28 +00:00
Xerxes Ranby
cecbc964e1 Fix cmake build.
Added ARMBaseRegisterInfo.cpp to lib/Target/ARM/CMakeLists.txt


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75035 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 20:13:41 +00:00
Torok Edwin
804e0fea40 Convert more abort() calls to llvm_report_error().
Also remove trailing semicolon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75027 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 19:04:27 +00:00
David Goodwin
db5a71a8e0 Push methods into base class in preparation for sharing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75020 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:31:39 +00:00
Bob Wilson
205a5ca6cf Implement NEON vld1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:11:30 +00:00
Torok Edwin
ab7c09b6b6 Start converting to new error handling API.
cerr+abort -> llvm_report_error
assert(0)+abort -> LLVM_UNREACHABLE (assert(0)+llvm_unreachable-> abort() included)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75018 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 18:01:40 +00:00
David Goodwin
c140c4803d Start breaking out common base functionality for register info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75016 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 17:28:55 +00:00
David Goodwin
334c26473b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 16:09:28 +00:00
Sanjiv Gupta
2d76f256f8 Mark sublw_cc and subfw_cc as Terminator insns so that they are part of the terminator insns for a basic block alongwith branch insns. This way a copy is not getting inserted between cmp and branch during PHIElimination disturbing the status flags.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74992 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 05:40:05 +00:00
Nick Lewycky
7f6aa2b162 Remove the vicmp and vfcmp instructions. Because we never had a release with
these instructions, no autoupgrade or backwards compatibility support is
provided.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74991 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 03:04:38 +00:00
Evan Cheng
34a0fa362d Add a Thumb2 instruction flag to that indicates whether the instruction can be transformed to 16-bit variant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74988 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 01:46:35 +00:00
Evan Cheng
c9a4153eef Add a todo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74976 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-08 00:05:05 +00:00
Evan Cheng
0fc0ade095 Also statically set bit 25 for BR_JT instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74974 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:45:10 +00:00
Evan Cheng
bc8a94540a Statically encode bit 25 to indicate immediate form of data processing instructions. Patch by Sean Callanan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74972 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:40:25 +00:00
Bill Wendling
97b4d4a8b5 --- Reverse-merging (from foreign repository) r74952 into '.':
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86RegisterInfo.h

Temporarily revert. This was causing an infinite loop in the linker on Leopard.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74970 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:37:49 +00:00
Dale Johannesen
9fcff043fe Commit the file I actually changed as part of last
patch, instead of one I didn't.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74968 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 23:28:22 +00:00
Bill Wendling
66c6324fcf DWARF requires frame moves be specified at specific times. If you have a
prologue like this:

__Z3fooi:
Leh_func_begin1:
LBB1_0: ## entry
        pushl   %ebp
Llabel1:
        movl    %esp, %ebp
Llabel2:
        pushl   %esi
Llabel3:
        subl    $20, %esp
        call    "L1$pb"
"L1$pb":
        popl    %esi

The "pushl %ebp" needs a table entry specifying the offset. The "movl %esp,
%ebp" makes %ebp the new stack frame register, so that needs to be specified in
DWARF. And "pushl %esi" saves the callee-saved %esi register, which also needs
to be specified in DWARF.

Before, all of this logic was in one method. This didn't work too well, because
as you can see there are multiple FDE line entries that need to be created.

This fix creates the "MachineMove" objects directly when they're needed; instead
of waiting until the end, and losing information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74952 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 21:53:07 +00:00
Evan Cheng
e253c951b3 Add Thumb2 movcc instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 20:39:03 +00:00
Evan Cheng
1c83eb33c3 Add BX and BXr9 encodings. Patch by Sean Callanan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74938 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 19:16:24 +00:00
Owen Anderson
a9d1f2c559 Have scoped mutexes take referenes instead of pointers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74931 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 18:33:04 +00:00
Evan Cheng
40289b041a Add Thumb2 pkhbt / pkhtb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 05:35:52 +00:00
Evan Cheng
5b9fcd1c8e Add some more Thumb2 multiplication instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 01:17:28 +00:00
Evan Cheng
58541fd627 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74888 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 01:16:41 +00:00
Dale Johannesen
76a1e2e250 Don't accept globals as matching 'i' constraint
in PIC modes (in accordance with existing comment).
gcc.apple/asm-block-25.c



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74886 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-07 00:18:49 +00:00
Devang Patel
92c551103f Avoid directly relying on llvm.dbg.compile_unit and llvm.dbg.global_variables.
PIC16 developers, please verify. Thanks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74880 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 23:28:36 +00:00
Devang Patel
8d6162a4be Add FIXMEs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74879 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 23:11:08 +00:00
Evan Cheng
3147fb2cff isThumb2 really should mean thumb2 only, not thumb2+.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74871 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:29:14 +00:00
Evan Cheng
36a0aebac2 Add bfc to armv6t2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:23:46 +00:00
Evan Cheng
edcbada3d0 Added ARM::mls for armv6t2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 22:05:45 +00:00
Sanjiv Gupta
53cf8298cf pic16 doesn't have a Data64bitsDirective. Set it NULL explicitly to tell the generic code to not pick the default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74839 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 18:09:11 +00:00
Sanjiv Gupta
024e94ce58 pic16 isn't ready to handle llvm.metadata yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74838 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 18:07:06 +00:00
Sanjiv Gupta
505996fdd5 Implement _CONFIG macro to allow users to se to configuration settings on the part.
Implement _section macro to allow users to place objects in specific sections.
Implement _address macro to allow users to place objects at a particular address.
Placing objects at a memory address:
crate a unique section name from varname, address, object type and put that section at specified address. Mark this section a full (size = banksize) so that other objects do not compete for it while placing objects to sections in AsmPrinter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74822 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 10:18:37 +00:00
Sanjiv Gupta
d7649417d1 Corrected the names description. Change in a comment. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74819 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 08:22:15 +00:00
Bruno Cardoso Lopes
ac57e6e498 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74813 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-06 05:09:34 +00:00
Duncan Sands
430506924d Silence a warning when assertions are turned off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74779 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:11:59 +00:00
Duncan Sands
f7f2d30bb8 Silence a warning when assertions are turned off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74778 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:11:34 +00:00
Duncan Sands
10ac96b276 Silence warning when building without assertions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74777 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:06:07 +00:00
Duncan Sands
8d8628a1fe Silence warnings when assertions are turned off.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74776 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 16:03:33 +00:00
Sanjiv Gupta
1d2e6ed1ef For extended loads of type i1 to i8, we will need to at least one byte from memory.
The change in the .td file is to mark the side effects of mov insn.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74768 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 07:58:59 +00:00
Tilmann Scheller
6a3a1ba97e Various small changes related to the Condition Register on PowerPC.
Don't spill to the CR save area when using the SVR4 ABI for now.
Don't rely on constants assigned for registers to be in order (they aren't assigned in order).
Make sure CR bits are mapped to the corresponding CR field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74767 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:47:55 +00:00
Tilmann Scheller
2a9ddfb903 Refactor ABI code in the PowerPC backend.
Make CalculateParameterAndLinkageAreaSize() Darwin-specific.
Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin().
Rename MachoABI to DarwinABI for consistency.
Rename ELF ABI to SVR4 ABI for consistency.
Factor out common call return lowering between the Darwin and SVR4 ABI.
Factor out common call lowering between the Darwin and SVR4 ABI.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74766 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 06:47:08 +00:00
Tilmann Scheller
ffd0200abf Implement the SVR4 ABI for PowerPC.
Implement LowerFORMAL_ARGUMENTS_SVR4().
Implement LowerCALL_SVR4().
Add support for split arguments.
Implement by value parameter passing for aggregates.
Add support for variable argument lists.
Create the spill area for argument registers of variable argument functions no longer at a fixed offset.
Make sure callee saved registers are spilled to the correct stack offsets.
Change allocation order of non-volatile floating-point registers.
Add VRSAVE to the list of callee-saved registers, add CallConvLowering for vararg calls.
Add support for variable argument calls with Vector arguments.
Add support for VR and VRSAVE save area, improve allocation order for non-volatile vector registers.
Stop creating illegal i8 values in LowerVASTART().
Add memory access width hints.
Make sure to reserve space on the stack for the frame pointer.
When using the SVR4 ABI, reserve r13 for the Small Data Area pointer.
Assure that the frame pointer is spilled to the correct location on the stack.
Some FP registers were not marked as volatile.
Make sure the i64 words from a long double are passed either both in registers or both on the stack.
Only put integer arguments in registers which are not marked with the inreg flag.


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2009-07-03 06:45:56 +00:00
Tilmann Scheller
6b61cd185e Add NumFixedArgs attribute to CallSDNode which indicates the number of fixed arguments in a vararg call.
With the SVR4 ABI on PowerPC, vector arguments for vararg calls are passed differently depending on whether they are a fixed or a variable argument. Variable vector arguments always go into memory, fixed vector arguments are put 
into vector registers. If there are no free vector registers available, fixed vector arguments are put on the stack.

The NumFixedArgs attribute allows to decide for an argument in a vararg call whether it belongs to the fixed or variable portion of the parameter list.


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2009-07-03 06:44:53 +00:00
Tilmann Scheller
667ee3cb43 Small cleanups in the PowerPC backend.
Small refactoring in LowerFORMAL_ARGUMENTS().
Correct minor formatting issues.
Remove size argument of CreateCopyOfByValArgument().
Remove dead argument from CalculateStackSlotSize().
Remove unused variable ReturnAddrIndex from various targets.


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2009-07-03 06:43:35 +00:00
Evan Cheng
d27c9fc403 Add thumb2 sign / zero extend with rotate instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 01:43:10 +00:00
Evan Cheng
2889ccea62 Add Thumb2 load / store multiple instructions. Not used yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 00:18:36 +00:00
Evan Cheng
78236f8c8a t2LDR_PRE etc are loads.
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2009-07-03 00:08:19 +00:00
Evan Cheng
6d94f11196 Added indexed stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74740 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-03 00:06:39 +00:00
Evan Cheng
4fbb9960ad Sign extending pre/post indexed loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 23:16:11 +00:00
David Goodwin
b50ea5c48f Checkpoint refactoring of ThumbInstrInfo and ThumbRegisterInfo into Thumb1InstrInfo, Thumb2InstrInfo, Thumb1RegisterInfo and Thumb2RegisterInfo. Move methods from ARMInstrInfo to ARMBaseInstrInfo to prepare for sharing with Thumb2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74731 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 22:18:33 +00:00
Douglas Gregor
033080cf6a CMake build fixes, from Xerxes Ranby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74720 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 18:53:52 +00:00
Chris Lattner
2067433852 simplify some logic by using isWeakForLinker(). Thanks to Anton for
pointing this out.


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2009-07-02 16:08:53 +00:00
Evan Cheng
e88d5cee9d Thumb2 pre/post indexed loads.
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2009-07-02 07:28:31 +00:00
Evan Cheng
0412957764 80 col violation.
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2009-07-02 06:44:30 +00:00
Evan Cheng
d770d9e7d1 Change the meaning of predicate hasThumb2 to mean thumb2 ISA is available, not that it's in thumb mode and thumb2 is available. Added isThumb2 predicate to replace the old predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74692 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 06:38:40 +00:00
Chris Lattner
cd714b12fc @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.
This fixes an llvm-gcc bootstrap problem I introduced.


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2009-07-02 04:22:01 +00:00
Chris Lattner
27598ec1e2 Fix yet-another bug I introduced into fastisel, this time handling
constant pool references that weren't getting properly rip-relative.


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2009-07-02 03:14:25 +00:00
Bruno Cardoso Lopes
3d62a412fb Remove getFunctionAlignment from TargetELFInfo and use new MachineFunction alignment method
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74686 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 02:13:13 +00:00
Evan Cheng
31926a78e3 80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74683 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 01:30:04 +00:00
Chris Lattner
c4b0b400b0 clarify: stub emission depends on the version of the linker you use, it has nothing
to do with the target.  Also, the stub elimination optimization *requires* making the
stub explicit.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74682 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 01:24:34 +00:00
Evan Cheng
af4550f826 Factor out ARM indexed load matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74681 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-02 01:23:32 +00:00
Dan Gohman
f530c92cd5 Fix a bunch of other places that used operator[] to test whether
a key is present in a std::map or DenseMap to use find instead.


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2009-07-02 00:17:47 +00:00
Dale Johannesen
7074feab96 Add darwin stub removal to wishlist.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74667 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 23:36:02 +00:00
Bob Wilson
8b024a5eb5 Add a new addressing mode for NEON load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74658 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 23:16:05 +00:00
Bob Wilson
b864e89fe4 Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74650 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 21:59:43 +00:00
Bob Wilson
d4d826e170 Fix up a comment: besides the >80col lines, the operation for this
addressing mode is encoded in the second operand, not the third.


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2009-07-01 21:22:45 +00:00
Bill Wendling
b4202b84d7 Update comments to make it clear that the function alignment is the Log2 of the
bytes and not bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74624 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 18:50:55 +00:00
Chris Lattner
4fb75e5425 Fix codegen for references to available_externally symbols. This fixes
PR4482.



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2009-07-01 16:53:44 +00:00
Chris Lattner
35c28eca62 Fix some fast-isel problems selecting global variable addressing in
pic mode.


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2009-07-01 03:27:19 +00:00
Evan Cheng
2578ba26e7 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 01:59:31 +00:00
Daniel Dunbar
5bcc8bd0c6 Remove unused AsmPrinter OptLevel argument, and propogate.
- This more or less amounts to a revert of r65379. I'm curious to know what
   happened that caused this variable to become unused.


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2009-07-01 01:48:54 +00:00
David Goodwin
d1fa120aee Add PIC load and store patterns for Thumb-2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74577 91177308-0d34-0410-b5e6-96231b3b80d8
2009-07-01 00:01:13 +00:00
David Goodwin
6647cea111 Thumb-2 load and store double description. But nothing yet creates them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74566 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 22:50:01 +00:00
Bill Wendling
20c568f366 Add an "alignment" field to the MachineFunction object. It makes more sense to
have the alignment be calculated up front, and have the back-ends obey whatever
alignment is decided upon.

This allows for future work that would allow for precise no-op placement and the
like.


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2009-06-30 22:38:32 +00:00
David Goodwin
73b8f16b36 Add thumb-2 store word, halfword, and byte.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74555 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 22:11:34 +00:00
David Goodwin
c9a59b5960 Improve Thumb-2 jump table support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 19:50:22 +00:00
David Greene
f0c3d023ae Add 256-bit memory operand support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74548 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 19:24:59 +00:00
David Goodwin
5e47a9a6e4 Add conditional and unconditional thumb-2 branch. Add thumb-2 jump table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74543 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 18:04:13 +00:00
Rafael Espindola
af5f6ba32d Fix PR4485.
Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74534 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 16:40:03 +00:00
Rafael Espindola
f55715c5c7 Fix PR4484.
This was caused by me confounding FP0 and ST(0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 12:18:16 +00:00
Evan Cheng
4784f1fc73 Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them.
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 08:49:04 +00:00
Chris Lattner
e3821c79bc remove a bogus note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74509 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 05:22:31 +00:00
Chris Lattner
a05ec61684 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74508 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 04:20:46 +00:00
Evan Cheng
f3c21b857b A few more load instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 02:15:48 +00:00
David Greene
d94c101abb Add a 256-bit register class and YMM registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74469 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 22:50:51 +00:00
David Goodwin
baeb911d60 Add Thumb-2 support for TEQ amd TST.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74468 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 22:49:42 +00:00
Rafael Espindola
63de5c3b7e FIX PR 4459.
Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74446 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 20:29:59 +00:00
Owen Anderson
9917700af4 Add a target-specific DAG combine on X86 to fold the common pattern of
fence-atomic-fence down to just the atomic op.  This is possible thanks to
X86's relatively strong memory model, which guarantees that locked instructions
(which are used to implement atomics) are implicit fences.


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2009-06-29 18:04:45 +00:00
David Greene
3016af5a1d Add processor descriptions for Istanbul and Shanghai.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74429 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 16:54:06 +00:00
David Greene
640a0c1477 Fix a subtarget feature bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74428 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 16:51:01 +00:00
David Greene
9b9838dbd4 Add more vector ValueTypes for AVX and other extended vector instruction
sets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74427 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 16:47:10 +00:00
David Goodwin
c0309b48b5 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 15:33:01 +00:00
Duncan Sands
c91e68a0c4 Include the new file ThumbRegisterInfo.cpp to CMakeLists.txt
to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74421 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 13:11:32 +00:00
Evan Cheng
055b0310f8 Implement Thumb2 ldr.
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-29 07:51:04 +00:00
Anton Korobeynikov
55ad1f22b4 Simplify a bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74385 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 12:59:03 +00:00
Anton Korobeynikov
a98cbc554c ARM refactoring. Step 2: split RegisterInfo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74384 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 12:16:40 +00:00
Douglas Gregor
1b573d8b20 Add ThumbInstrInfo.cpp to the CMake makefiles
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74382 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 07:44:59 +00:00
Chris Lattner
f7789c72bd remove a bunch of fixmes (old checking code) and commonize all the
target-specific operand printing functionality.  Yay.


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2009-06-27 05:46:24 +00:00
Chris Lattner
b1acd68fe4 pull @GOT, @GOTOFF, @GOTPCREL handling into isel from the asmprinter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74378 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 05:39:56 +00:00
Chris Lattner
4c1b606ecd simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 05:24:12 +00:00
Chris Lattner
553e571b43 fix clang/test/CodeGenObjC/try.m, a basereg doesn't mean no global anymore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74375 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 04:50:14 +00:00
Chris Lattner
380135cc3e fix a bunch of failures in the X86-64 JIT by tolerating RIP as
a base register.  We just ignore it for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74374 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 04:46:33 +00:00
Chris Lattner
74d3f50a80 factor some logic out into a helper function, allow remat of loads from constant
globals.  This implements remat-constant.ll even without aggressive-remat.


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2009-06-27 04:38:55 +00:00
Chris Lattner
18c5987fa3 Reimplement rip-relative addressing in the X86-64 backend. The new
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.



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2009-06-27 04:16:01 +00:00
Evan Cheng
9cb9e6778c Renaming for consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74368 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 02:26:13 +00:00
Chris Lattner
89da699092 Fix PR4466 by making fastisel set operand flags correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74366 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-27 01:31:51 +00:00
David Goodwin
8eba8e0ca3 Remove outdated comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74357 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 23:39:02 +00:00
David Goodwin
dcdaebc592 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 23:13:13 +00:00
David Greene
343dadbb36 Add feature flags for AVX and FMA and fix some SSE4A feature flag
initialization problems.


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2009-06-26 22:46:54 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 22:00:19 +00:00
Chris Lattner
d8220e5794 simplify printing of MO_ExternalSymbol in a non-pcrel context.
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2009-06-26 21:47:27 +00:00
Owen Anderson
2af72d455b Privatize some data.
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2009-06-26 21:45:04 +00:00
Anton Korobeynikov
d49ea77cbc Split thumb-related stuff into separate classes.
Step 1: ARMInstructionInfo => {ARM,Thumb}InstructionInfo

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2009-06-26 21:28:53 +00:00
Chris Lattner
c4233af200 add %rip to the GR64 register class. Lets avoid allocating it to anything though! :)
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2009-06-26 21:25:00 +00:00
Chris Lattner
b903bed0fe Move all the TLS processing logic into isel, don't do it in asmprinter at all.
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2009-06-26 21:20:29 +00:00
Chris Lattner
ba8ef45d12 make sure to propagate operand flags in SelectTLSADDRAddr properly.
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2009-06-26 21:18:37 +00:00
David Goodwin
24062ac5be Thumb-2 has CLZ.
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2009-06-26 20:47:43 +00:00
David Goodwin
7ce720b448 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc".
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2009-06-26 20:45:56 +00:00
Chris Lattner
03a597f2b7 minor cleanup/framework changes.
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2009-06-26 20:00:05 +00:00
Owen Anderson
52132bf643 Privatize some variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74315 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 19:48:37 +00:00
Chris Lattner
41621a2700 move magic for PIC constantpool references from asmprinter to isel.
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2009-06-26 19:22:52 +00:00
Chris Lattner
89ca575c31 use jump table operand flags in asm printer instead of "magic predicates"
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2009-06-26 18:55:01 +00:00
David Goodwin
93d95bd2c3 ADC used to implement adde should use "adcs" opcode instead of "adc".
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2009-06-26 18:07:25 +00:00
David Goodwin
83b3593478 Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI.
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.


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2009-06-26 16:10:07 +00:00
Evan Cheng
2b51d51bc3 Simplify predicate CarryDefIsUsed.
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2009-06-26 06:10:18 +00:00
Chris Lattner
0b0deab464 fix a pasto.
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2009-06-26 05:56:49 +00:00
Chris Lattner
b8afeb99e9 propagate target operand flags through addressing mode selection.
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2009-06-26 05:51:45 +00:00
Nick Lewycky
b8b7347c10 Escape the name of the module since it comes from the file name and may include
invalid characters like backslashes on Windows. Patch by James Abbatiello!


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2009-06-26 04:33:37 +00:00
Devang Patel
0f05d22a31 Let's ignore MDStrings also!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74255 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 02:26:12 +00:00
Daniel Dunbar
1c723b7145 Fix may-be-used-uninitialized warning.
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2009-06-26 02:03:52 +00:00
Chris Lattner
55e7c82730 start adding logic in isel to determine asm printer semantics, step N of M.
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2009-06-26 00:43:52 +00:00
Evan Cheng
151b9afdee Add a note about commuting conditional move.
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2009-06-26 00:28:48 +00:00
Evan Cheng
b604b2c470 These are done / no longer applicable.
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2009-06-26 00:25:27 +00:00
Evan Cheng
8de898abc8 Mark a bunch of instructions commutable.
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2009-06-26 00:19:44 +00:00
Evan Cheng
e864b74e95 tst is also commutable.
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2009-06-26 00:19:07 +00:00
Owen Anderson
62c38434e2 Committed the wrong version in my last commit.
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2009-06-26 00:17:05 +00:00
Owen Anderson
94326677f0 Privatize a static variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74234 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-26 00:15:27 +00:00
Evan Cheng
6267422318 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used.
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2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf Use MVN for ~t2_so_imm immediates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 23:11:21 +00:00
David Goodwin
c9ee1189c5 Add Def/Use of CPSR for Thumb-1 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74219 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 22:49:55 +00:00
Evan Cheng
9e03cbefc5 Unbreak mingw build. Patch by Viktor Kutuzov.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74212 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 22:04:44 +00:00
Evan Cheng
1e249e3705 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 20:59:23 +00:00
Owen Anderson
3ea93ded0f Privatize this map.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74189 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 18:13:04 +00:00
Sanjiv Gupta
cbd5f0a6b9 Added floating point conditional operations support via libcalls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74187 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 18:12:06 +00:00
Chris Lattner
2b0de6a286 simplify shouldPrintPLT
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74186 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 17:58:52 +00:00
David Goodwin
9a36bdbaf1 Test commit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74185 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 17:52:32 +00:00
Chris Lattner
ac5e887a6c Use target-specific machine operand flags to eliminate a gross hack
from the asmprinter.


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2009-06-25 17:38:33 +00:00
Chris Lattner
b1fb84dee9 just eliminate the code entirely!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74183 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 17:28:07 +00:00
Bob Wilson
e481f12749 Revert 74164. We'll want to use this method later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74176 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 16:03:07 +00:00
Sanjiv Gupta
8ebd4b6422 Identify unconditional gotos and generate a page sel instructions before them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74172 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 11:03:14 +00:00
Bob Wilson
c9028e69f1 Remove unused hasV6T2Ops method. We already have a separate feature to
identify Thumb2.


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2009-06-25 05:20:31 +00:00
Douglas Gregor
4b73893d82 Add missing dependencies to the CMake build system.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74161 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 05:03:06 +00:00
Evan Cheng
0aa1d8c52d Change thumb2 instruction definitions so if-converter so add predicate operands and / or flip the 's' bit to set the condition flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74158 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 02:08:06 +00:00
Evan Cheng
b6c29d5512 Add thumb2 add sp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74156 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 01:21:30 +00:00
Chris Lattner
4b950ec072 fix comments to be correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74154 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 01:15:47 +00:00
Evan Cheng
7dcf4a826c Some reorg and additional comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74152 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 01:05:06 +00:00
Devang Patel
e4c0c0fab8 No need to code gen MDNodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74150 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-25 00:47:42 +00:00
Evan Cheng
a09b9ca10f Add Thumb2 pc relative add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 23:47:58 +00:00
Evan Cheng
023dd3fb0b 80 col violation.
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2009-06-24 23:14:45 +00:00
Chris Lattner
ab16299346 move some functions, add a FIXME, use PrintPICBaseSymbol to print the
picbase instead of inlining it.


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2009-06-24 19:44:36 +00:00
Chris Lattner
b5299dd06a reimplement getPICLabelString as PrintPICBaseSymbol to eliminate std::string heap thrashing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74105 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 19:19:16 +00:00
Chris Lattner
0de1fc4f41 sink management of DwarfWriter & MachineModuleInfo into the AsmPrinter base class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74101 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 19:09:55 +00:00
Chris Lattner
1f522feabf sink dwarf finalization out of each target into AsmPrinter::doFinalization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74097 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 18:54:37 +00:00
Chris Lattner
0a7befa8bd eliminate the ExtWeakSymbols set from AsmPrinter. This eliminates
a bunch of code from all the targets, and eliminates nondeterministic
ordering of directives being emitted in the output.


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2009-06-24 18:52:01 +00:00
Chris Lattner
52cff83526 only emit one .align for all the hidden gv stubs instead of one for each.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74094 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 18:24:42 +00:00
Chris Lattner
8f61f984b0 inline print*Stub and rearrange function stub printing to more closely match
gv and hiddengv stub printing.


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2009-06-24 18:24:09 +00:00
Chris Lattner
3a03f74349 remove dead code now that personality functions don't print stubs directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74092 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 18:19:01 +00:00
Chris Lattner
9dd71749bc remove now-dead argument.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74091 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 18:17:56 +00:00
Chris Lattner
381d4fef6f simplify personality function stub printing to use the mangler and
decorateName like other stuff instead of special casing _.  Also, stick
it into GVStubs and let the normal stub printer print the stub instead 
of doing it manually.


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2009-06-24 18:17:00 +00:00
Chris Lattner
7af485e109 remove dead argument
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74089 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 18:00:11 +00:00
Chris Lattner
974469d7aa factor some code better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74067 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-24 05:47:59 +00:00