Chris Lattner
f7f2255505
Implement stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22963 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 01:27:59 +00:00
Chris Lattner
ddf3e7dfd7
Fix compilation of:
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float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, %Q
ret float %R
}
By returning the right result.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22961 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 00:59:14 +00:00
Chris Lattner
b30ee6a41a
Make sure expressions only have one use before emitting them into a place that is conditionally executed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22960 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-22 00:47:28 +00:00
Chris Lattner
9944b76cfe
Implement most of load support. There is still a bug though.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22959 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 22:31:09 +00:00
Chris Lattner
1db1adbdee
Don't print out the MBB label for the entry mbb
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22953 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 19:09:33 +00:00
Chris Lattner
f913d3f91c
Simplify the logic for BRTWOWAY_CC handling. The isel code already
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simplifies BRTWOWAY into BR if one of the results is a fall-through.
Unless I'm missing something, there is no reason to duplicate this
in the target-specific code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22952 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 19:03:28 +00:00
Chris Lattner
2fbb4579d6
Implement selection for branches.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22951 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 18:50:37 +00:00
Chris Lattner
4dd4a2d278
If the false value for a select_cc is really simple (has no inputs), evaluate
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it in the block. This codegens:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
as:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
li r4, 1
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r2, r4, r4
.LBB_test_2: ;
or r3, r2, r2
blr
... which is one fewer instruction. The savings are more significant for
global address and constantfp nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22946 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-21 17:41:11 +00:00
Chris Lattner
4416f1a0a5
add support for global address, including PIC support.
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This REALLY should be lowered by the legalizer!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22941 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 22:38:53 +00:00
Chris Lattner
7e65997c43
Fix a typeo, no wonder all tokenfactor edges were the same!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 21:33:02 +00:00
Chris Lattner
ecbce617ca
Split RegisterClass 'Methods' into MethodProtos and MethodBodies
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22929 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 19:13:20 +00:00
Chris Lattner
fabc8ffacb
Put reg classes into namespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22926 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:52:55 +00:00
Chris Lattner
0b1e641b82
Now that the simple isels are dead, so is this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22913 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 18:30:39 +00:00
Nate Begeman
27d53ba6dd
Fix a bug where we were passing the wrong number of arguments to an
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instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22901 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 03:42:28 +00:00
Nate Begeman
02b88a4586
ISD::OR, and it's accompanying SelectBitfieldInsert
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22889 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-19 00:38:14 +00:00
Nate Begeman
73bfa71524
Remove the X86 and PowerPC Simple instruction selectors; their time has
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passed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22886 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:53:15 +00:00
Nate Begeman
c15ed447f4
Add shifts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22884 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:38:00 +00:00
Chris Lattner
45fcb8f410
Fix operand numbers by marking variable arity nodes as such and by fixing
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the operand lists of a few other nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22883 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:25:33 +00:00
Chris Lattner
3f852b45fc
MFLR doesn't take an operand, the LR register is implicit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22882 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 23:24:50 +00:00
Chris Lattner
0bc04231c0
Move this to the emitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22877 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 20:08:53 +00:00
Jim Laskey
5b5f0b7fd5
More optimal solution for loading constants.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22870 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 18:58:23 +00:00
Chris Lattner
d607c12e8e
After selecting the instructions for a basic block, emit the instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22869 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 18:46:06 +00:00
Chris Lattner
f5fac3b4a6
remove some unused stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22866 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 18:34:00 +00:00
Nate Begeman
58dfb08319
Fix int foo() { return 65535; } by using the top 16 bits of the constant
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as the argument to LIS rather than the result of HA16(constant).
The DAG->DAG ISel was already doing the right thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22865 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 18:14:49 +00:00
Nate Begeman
a694047813
Improve ISD::Constant codegen.
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Now for int foo() { return -1; } we generate:
_foo:
li r3, -1
blr
instead of
_foo:
lis r2, -1
ori r3, r2, 65535
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22864 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 18:01:39 +00:00
Chris Lattner
0c09a411e0
replace switch stmt with an assert, generate li 0 instead of lis 0 for 0,
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to make the code follow people's expectations better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22861 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 17:16:52 +00:00
Jim Laskey
3285aadce9
Handle loading of 0x????0000 constants with a single instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22858 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 15:52:30 +00:00
Nate Begeman
cffc32b6e2
Add support for ISD::AND, and its various optimized forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22857 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 07:30:46 +00:00
Nate Begeman
131a880520
Maintain consistency in negating things
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22855 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 05:44:50 +00:00
Nate Begeman
0f3257a330
Implement XOR, remove a broken sign_extend_inreg case
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22854 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 05:00:13 +00:00
Nate Begeman
305a1c75cf
Add a bunch more simple nodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22851 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 03:04:18 +00:00
Nate Begeman
6a7d61179c
Add a couple more nodes that are easy to handle
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22850 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 00:53:47 +00:00
Nate Begeman
b5a0668d43
Be fruitful and multiply!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22849 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 00:21:41 +00:00
Jim Laskey
b454cfd453
Better version of isIntImmediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22848 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-18 00:15:15 +00:00
Nate Begeman
26653500bb
Teach the DAG->DAG ISel about FNEG, and how it can be used to invert
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several of the PowerPC opcodes that come in both negated and non-negated
forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22845 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 23:46:35 +00:00
Chris Lattner
8482dd894d
add a beta option for turning on dag->dag isel
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22837 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:33:30 +00:00
Chris Lattner
a5a91b1026
initial hack at a dag->dag instruction selector. This is obviously woefully
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incomplete, but it is a start. It handles basic argument/retval stuff, immediates,
add and sub.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22836 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:33:03 +00:00
Chris Lattner
d1c4626e14
add prototype, remove dead proto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22835 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 19:32:03 +00:00
Chris Lattner
6d9aed4f8f
Fix a few small typos I noticed when converting this over to the DAG->DAG
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selector. Also, there is no difference between addSImm and addImm, so just
use addImm, folding some branches.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22819 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 01:25:14 +00:00
Jim Laskey
a033b4d8eb
Removed UINT_TO_FP and SINT_TO_FP from ISel outright.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22818 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 01:14:38 +00:00
Jim Laskey
361ca5c927
Remove ISel code generation for UINT_TO_FP and SINT_TO_FP. Now asserts if
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marked as legal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22816 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 00:41:40 +00:00
Jim Laskey
ad23c9d4f2
Make UINT_TO_FP and SINT_TO_FP use generic expansion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22815 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 00:40:22 +00:00
Nate Begeman
456f1e890c
Implement a couple improvements:
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Remove dead code in ISD::Constant handling
Add support for add long, imm16
We now codegen 'long long foo(long long a) { return ++a; }'
as:
addic r4, r4, 1
addze r3, r3
blr
instead of:
li r2, 1
li r5, 0
addc r2, r4, r2
adde r3, r3, r5
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22811 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-17 00:20:08 +00:00
Chris Lattner
a8cd01524f
updates for changes in nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22808 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 21:58:15 +00:00
Nate Begeman
7cbd525ba8
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
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fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 19:49:35 +00:00
Chris Lattner
7c5a3d390a
Pull the LLVM -> DAG lowering code out of the pattern selector so that it
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can be shared with the DAG->DAG selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22799 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-16 17:14:42 +00:00
Chris Lattner
b0096bd19d
Turn loop strength reduction on by default.
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Only run createLowerConstantExpressionsPass for the simple isel. The DAG
isel has no need for it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22794 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-15 23:47:04 +00:00
Jim Laskey
ea0617a023
Broke 80 column rule.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22792 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-15 17:35:26 +00:00
Jim Laskey
30679e691d
Changed code gen for int to f32 to use rounding. This makes FP results
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consistent with gcc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22791 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-15 17:14:19 +00:00
Nate Begeman
2d56e72f09
Fix last night's PPC32 regressions by
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1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22789 91177308-0d34-0410-b5e6-96231b3b80d8
2005-08-14 18:38:32 +00:00