Nate Begeman
439b444cad
Rename canUseAsImmediateForOpcode to getImmediateForOpcode to better
...
indicate that it is not a boolean function.
Properly emit the pseudo instruction for conditional branch, so that we
can fix up conditional branches whose displacements are too large.
Reserve the right amount of opcode space for said pseudo instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21094 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 04:22:58 +00:00
Nate Begeman
80196b1331
Implement SDIV by power of 2 as srawi/addze rather than load imm, divw
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21091 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-05 00:15:08 +00:00
Nate Begeman
93075ec0a5
Pattern match fp mul-add, mul-sub, neg-mul-add, and neg-mul-sub
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21090 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 23:40:36 +00:00
Nate Begeman
178bb34ee5
Add support for multiply-add, multiply-sub, and their negated versions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21089 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 23:01:51 +00:00
Nate Begeman
d860aa62ac
Make sure that arg regs used by the call instruction are marked as such, so
...
that regalloc doesn't cleverly reuse early arg regs loading later arg regs.
This fixes almost all outstanding failures in the pattern isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21086 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 22:17:48 +00:00
Nate Begeman
04ec80173b
Remove unnecessary register copy now that regalloc is fixed
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21085 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 21:48:13 +00:00
Nate Begeman
c3e2db407e
i1 loads should also be from the low byte of the argument word.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 09:09:00 +00:00
Nate Begeman
e584668f04
Fix i64 return, fix CopyFromReg
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21076 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-04 06:52:38 +00:00
Nate Begeman
6644d4c933
Full varargs support. All of UnitTests now passes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 23:11:17 +00:00
Nate Begeman
4ec0cbdf15
Pass the correct value for the chain to the store
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21066 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 22:22:56 +00:00
Nate Begeman
fa55470e39
Fix SHL_PARTS
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Start implementation of integer varargs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21065 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 22:13:27 +00:00
Nate Begeman
aa73a9f16f
Keeping up with the Joneses.
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Implement not, nor, nand, and eqv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21060 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-03 11:20:20 +00:00
Nate Begeman
27eeb00a1a
Set shift amount to Extend
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Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21018 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:59:34 +00:00
Chris Lattner
43fdea070c
This target doesn't support fabs/fneg yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21010 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 05:03:24 +00:00
Nate Begeman
27523a1c92
Fix i64 returns
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Generate PowerPC 'subfic' instruction when appropriate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20995 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-02 00:42:16 +00:00
Nate Begeman
fc1b1dad88
Add ISD::UNDEF node
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Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20988 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 22:34:39 +00:00
Nate Begeman
6cb2e1b124
Fix Olden/bh, CR0 was being set in the wrong order
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LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20981 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 08:57:43 +00:00
Nate Begeman
31318e4b6c
Also apply Chris's fix to FP select and SETCC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20979 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 07:21:30 +00:00
Chris Lattner
3071019026
Move the selection of the arms of the select operation up to the conditional
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part to make sure we get the side effects and to avoid confusing the CFG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20977 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 07:10:02 +00:00
Nate Begeman
a7e11a4bb5
Fix stores to global addresses
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Fix calls with no arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20975 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 05:57:17 +00:00
Nate Begeman
04730361b5
Support indexed loads and stores. This drops Shootout/matrix time from
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18.8 to 14.8 seconds. The Pattern ISel is now often faster than the
Simple ISel, esp. on memory intensive code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20973 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 04:45:11 +00:00
Nate Begeman
6b55997df5
Implement FP_TO_SINT and FP_TO_UINT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20972 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 02:59:27 +00:00
Nate Begeman
6d369ccae0
Add support for adding 0.0 and -0.0 to the constant pool, since we lie and
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say that we support them, for the purposes of generating fsel instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20970 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 01:08:07 +00:00
Nate Begeman
dffcfccc13
Factor out common code, support FP comparison in folded SetCC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20969 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-01 00:32:34 +00:00
Nate Begeman
3e89716ad7
fsel generation for f32 and f64 select
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generate compare immediate for integer compare with constant
fold setcc into branch
fold setcc into select
Code generation quality for Shootout is now on par with the Simple ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20968 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 23:55:40 +00:00
Nate Begeman
96fc681d7e
Pass the correct values to the chain argument for node construction during
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LowerCallTo.
Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for
loads and stores, amazing!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20946 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 02:05:53 +00:00
Nate Begeman
74d734574e
Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs
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Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads
As a result, all of Shootout, and likely many other programs are now
working.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20945 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-31 00:15:26 +00:00
Nate Begeman
fdcf3418e0
Fix calls whose arguments fit entirely in registers to not break the Chain.
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Implement SINT_TO_FP and UINT_TO_FP
Remove some dead code from the simple ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20944 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30 19:38:35 +00:00
Nate Begeman
58f718cd97
Fix frame index code to generate legal PowerPC instructions. About half of
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Shootout now works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20940 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30 02:23:08 +00:00
Nate Begeman
01d05266f9
Fix external symbol printing in the AsmPrinter. Tell the ISel that we
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don't support things like memcpy directly. This allows a handful of the
Shootout programs to work, yay!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20939 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-30 01:45:43 +00:00
Nate Begeman
23afcfb063
Fix BranchCC (it's still dumb), and implement FP select (also dumb)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20935 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29 22:48:55 +00:00
Nate Begeman
74747861b9
Implement integer select and i1 sign extend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20934 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29 22:24:51 +00:00
Nate Begeman
3316252034
Implement SetCC, fix ZERO_EXTEND_INREG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20933 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29 21:54:38 +00:00
Chris Lattner
848132d671
fix a warning in the optimized build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20920 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29 15:13:27 +00:00
Nate Begeman
f3d08f31b3
Implement div, rem, and frameindex
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20907 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-29 00:03:27 +00:00
Nate Begeman
f70b576ccc
Pattern ISel: fix argument loading for i64s (thanks chris)
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Simple ISel: fix i64 subtract
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20903 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-28 23:08:54 +00:00
Nate Begeman
ca12a2bd91
Remove fake instruction 'subc' (mnemonic for subfc).
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More pattern isel updates
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20902 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-28 22:28:37 +00:00
Nate Begeman
9db505ca9d
Implement proper loads and zero-extends of all types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20897 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-28 19:36:43 +00:00
Nate Begeman
7532e2f555
Fix that pesky floats in integer regs problem by assigning the f32 type to
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the correct register class. Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20857 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 08:25:22 +00:00
Nate Begeman
f7e4338035
Get closer to having varargs working. There's still something strange
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going on with copies between floating point and integer register files
being generated. Once that is solved, varargs will be done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20856 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 07:46:36 +00:00
Nate Begeman
f26226155e
Make 64bit args and float args work correct with calls. Thanks to Chris
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for explaining EXTRACT_ELEMENT to me.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20847 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 02:17:46 +00:00
Nate Begeman
307e7443b8
Next round of pattern isel changes, mostly dealing with calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20841 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 01:28:53 +00:00
Nate Begeman
c13a7f0eb3
Correct a documention link
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20840 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-26 01:28:05 +00:00
Nate Begeman
c7b09f1f01
Support global addresses and fix call returns. Varargs still aren't
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handled correctly for floating point arguments, or more than 8 arguemnts.
This does however, allow hello world to run.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20832 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-25 08:34:25 +00:00
Nate Begeman
9e3e1b5d44
Implement next round of Pattern ISel fixes
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1. void returns
2. multiplies
3. calls
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20822 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 23:35:30 +00:00
Nate Begeman
7ca541b75a
Fix an incorrect argument being passed to BuildMI for indirect calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20821 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 23:34:38 +00:00
Nate Begeman
2daec45751
Commit Gabor Greif's patch to use iterators in lowering intrinsics.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20816 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 20:07:16 +00:00
Chris Lattner
1bcb9abb30
eliminate dead variables, patch contributed by Gabor Greif!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20812 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 17:32:20 +00:00
Nate Begeman
5e9666129a
Implement more of the PPC32 Pattern ISel:
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1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel
Remove dead arguments from getGlobalBaseReg in the simple ISel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20810 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 06:28:42 +00:00
Chris Lattner
246fa6316d
Fix silly "no newline at end of file" warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20809 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 06:16:18 +00:00
Nate Begeman
a9795f81e9
Addition of the PPC32 Pattern ISel. While it is far from complete, it will
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be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20805 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-24 04:41:43 +00:00
Misha Brukman
c7cd5e5672
We may be adding functions to the Module during initialization, so
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conservatively, it's modified
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20735 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-21 19:22:14 +00:00
Chris Lattner
e4d5c441e0
This mega patch converts us from using Function::a{iterator|begin|end} to
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using Function::arg_{iterator|begin|end}. Likewise Module::g* -> Module::global_*.
This patch is contributed by Gabor Greif, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20597 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-15 04:54:21 +00:00
Chris Lattner
411eba0eaf
Fix a crash handling 'undef bool', fixing an llc crash on 186.crafty
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-08 22:53:09 +00:00
Chris Lattner
4318a3d0e9
cleanup the cfg after lsr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20410 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-02 21:56:00 +00:00
Chris Lattner
0c7490617a
Add a temporary option for llc-beta: -enable-lsr-for-ppc, which turns on
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Loop Strength Reduction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20399 91177308-0d34-0410-b5e6-96231b3b80d8
2005-03-02 06:19:22 +00:00
Chris Lattner
7a823bd01f
Fix a problem where the PPC backend lost track of the fact that it had
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to save and restore the LR register on entry and exit of a leaf function
that needed to access globals or the constant pool. This should hopefully
fix oscar from sending the PPC tester spinning out of control.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20197 91177308-0d34-0410-b5e6-96231b3b80d8
2005-02-15 20:26:49 +00:00
Chris Lattner
3c70764907
Fix Regression/CodeGen/PowerPC/2005-01-14-UndefLong.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19557 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-14 20:22:02 +00:00
Chris Lattner
fbd4de1d9b
Fix: Regression/CodeGen/PowerPC/2005-01-14-SetSelectCrash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19555 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-14 19:31:00 +00:00
Chris Lattner
35e5c7c186
This hunk:
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- unsigned TrueValue = getReg(TrueVal, BB, BB->begin());
+ unsigned TrueValue = getReg(TrueVal);
Fixes the PPC regressions from last night.
The other hunk is just a clarity improvement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19263 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-02 23:07:31 +00:00
Chris Lattner
6dec0b09d5
Fix a FIXME: Select instructions on longs were miscompiled.
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While we're at it, improve codegen of select instructions. For this
testcase:
int %test(bool %C, int %A, int %B) {
%D = select bool %C, int %A, int %B
ret int %D
}
We used to generate this code:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
b .LBB_test_3 ;
.LBB_test_2: ;
or r5, r4, r4
.LBB_test_3: ;
or r3, r5, r5
blr
Now we emit:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r4, r5, r5
.LBB_test_2: ;
or r3, r4, r4
blr
-Chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19214 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-01 16:10:12 +00:00
Chris Lattner
47f9dd14b2
Specify all of the targets built.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18985 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-16 17:26:44 +00:00
Chris Lattner
be686a8897
Factor out common .td file chunks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18982 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-16 16:31:57 +00:00
Chris Lattner
869f45937b
Fix Regression/CodeGen/PowerPC/2004-12-12-ZeroSizeCommon.ll, and all programs
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when compiled with debug information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18835 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-12 20:36:19 +00:00
Chris Lattner
8363ad6bfc
CSE calls to getTypeSize.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18833 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-12 20:31:00 +00:00
Chris Lattner
3ea78c4276
Use the target triple to pick this target.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18830 91177308-0d34-0410-b5e6-96231b3b80d8
2004-12-12 17:40:28 +00:00
Chris Lattner
0284628e8e
Fix several bugs in 'op x, imm' handling. Foremost is that we now emit
...
addi r3, r3, -1
instead of
addi r3, r3, 1
for 'sub int X, 1'.
Secondarily, this fixes several cases where we could crash given an unsigned
constant. And fixes a couple of minor missed optimization cases, such as
xor X, ~0U -> not X
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18379 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-30 07:30:20 +00:00
Chris Lattner
35f2bbe8c6
Fix CodeGen/PowerPC/2004-11-30-shr-var-crash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18376 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-30 06:40:04 +00:00
Chris Lattner
e74ed0d53b
Fix test/Regression/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18374 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-30 06:36:11 +00:00
Chris Lattner
7747040410
Fix test/Regression/CodeGen/PowerPC/2004-11-30-shift-crash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18371 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-30 06:29:10 +00:00
Chris Lattner
9d0087e043
The LLVM bool type shall have 1 byte alignment on PPC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18311 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-28 21:16:45 +00:00
Nate Begeman
3330e08888
Remove the ISel->AsmPrinter link via the TargetMachine that was put in
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place to help bring up the PowerPC back end on Darwin. This code is no
longer serves any purpose now that the AsmPrinter does the right thing
all the time printing GlobalValues. --Cruft.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18267 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-27 04:45:11 +00:00
Chris Lattner
15ee8adb00
There is no reason to store <x,x>, just store <x>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18263 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-26 20:25:17 +00:00
Nate Begeman
d4c8bea47f
Enable optimization suggested by Chris Lattner to not emit reloc stubs for
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static global variables whose addresses are taken. This allows us to
convert the following code for taking the address of a static function foo
addis r2, r30, ha16(Ll1__2E_foo_2$non_lazy_ptr-"L00001$pb")
lwz r3, lo16(Ll1__2E_foo_2$non_lazy_ptr-"L00001$pb")(r2)
which also includes linker stub code emitted at the end of the .s file not
shown here, and replace it with this:
addis r2, r30, ha16(l1__2E_foo_2-"L00001$pb")
la r3, lo16(l1__2E_foo_2-"L00001$pb")(r2)
which in addition to not needing linker help, also has no load instruction.
For those not up on PowerPC mnemonics, la is shorthand for add immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18239 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 07:09:01 +00:00
Chris Lattner
fde839b4ff
Fix the build on non ppc machines
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18235 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 06:14:45 +00:00
Chris Lattner
2a0c0dff0b
The JIT works enough
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18228 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 04:14:54 +00:00
Chris Lattner
5cbf3bc202
Fix encoding of fsel, fixing olden/power, McCat/bisort and several others.
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All of Olden passes now! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18227 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 04:11:07 +00:00
Chris Lattner
a1ab451392
Fix encoding of fneg instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18226 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 03:53:44 +00:00
Chris Lattner
cd61ec837f
Fix encoding of swari, fixing several programs, including Olden/mst
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18225 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 03:40:20 +00:00
Chris Lattner
b752a97ca4
There is not a 1-1 mappign between llvm blocks and PPC blocks, do not use
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LLVM blocks as the keys for the branch rewriter. This fixes treeadd and
many other programs with the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18223 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-25 00:33:57 +00:00
Chris Lattner
5efb75daed
* Rename existing relocations to be more specific
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* Add relocations for refernces to non-lazy darwin stubs and implement
them correctly.
With this change, we can correctly references external globals, and now
all but two UnitTests and all but 1 Regression/C tests pass.
More importantly, bugpoint-jit will start giving us useful testcases,
instead of always telling us that references to external globals don't
work :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18222 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 22:30:08 +00:00
Nate Begeman
53e4aa57c6
Add the same optimization that we do loading from fixed alloca slots to
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storing to fixed alloca slots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18221 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 21:53:14 +00:00
Chris Lattner
73278080c8
Write CompilationCallback as an explicit assembly stub to avoid getting GCC's
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prolog.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18220 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 21:01:46 +00:00
Chris Lattner
892afa9556
When rewriting the original call instruction, make sure to rewrite it to
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call the right address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18213 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 18:00:02 +00:00
Chris Lattner
fb887e010d
Force the intregs ptr into R2 and the FPregs ptr into R3. This fixes a really
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obscure problem where we were doing:
lmw r3,0(r9)
which is undefined on PPC. Now we do:
lmw r3,0(r2)
by force, not relying on the GCC register allocator for luck :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18212 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 17:42:55 +00:00
Chris Lattner
69efbdd4f3
Fix a few more tests by encoding the extsb and other XForm11 instructions
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correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18200 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 03:52:02 +00:00
Chris Lattner
2f5091ac2a
Fix the encoding of ORi and other DForm4 instructions. This brings us to
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36/42 SingleSource/UnitTests passing!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18199 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 02:15:41 +00:00
Chris Lattner
00a8c01999
Loads are relocatable too
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18198 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 02:03:44 +00:00
Chris Lattner
b765ff1219
Calls do not need a MovPCtoLR instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18197 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 02:00:06 +00:00
Chris Lattner
b9f26da5dd
Get constant pools working. This fixes even more programs, allowing us to
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pass 24/42 in UnitTests (up from 20).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18196 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 01:56:12 +00:00
Chris Lattner
8599d385a2
Rewrite branches more closely to correct. This makes more stuff pass, and
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stops the infinite loops!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18194 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 01:35:12 +00:00
Chris Lattner
310a752872
Branch instructions explicitly represent CRx in them. bEcause of this, encode
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them explicitly as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18193 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 01:15:19 +00:00
Nate Begeman
3b78e3b6a9
Fix encoding of bctrl, and remove some unused instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18192 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-24 00:16:37 +00:00
Chris Lattner
6f407893e2
Fix encoding of blr and bctr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18178 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 22:06:24 +00:00
Nate Begeman
65b7f3ed2a
Use the correct register class as a constaint to gcc's inline assembly, so
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that we don't end up trying to use r0 as a base register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18176 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 21:37:22 +00:00
Nate Begeman
ca6d0f53ff
Save/Restore arg regs and nonvolatile regs the compiler might use during
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CompilationCallback
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18175 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 21:34:18 +00:00
Chris Lattner
5afa9af81b
Fix the encoding of OR, AND and many other instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18174 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 21:17:35 +00:00
Chris Lattner
d162032013
Remove argtype and argcount magic, which was used by the old asmprinter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18170 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 20:41:34 +00:00
Chris Lattner
583e32b653
Get rid of flags that are dead
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18169 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 20:37:41 +00:00
Chris Lattner
89d60de90e
Fix encoding of rlwinm?
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18165 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 19:23:32 +00:00
Chris Lattner
943f45208c
Fix encodings
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18164 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 19:23:18 +00:00
Chris Lattner
9ba12359e3
Enumerate CR registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18162 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 18:59:59 +00:00
Chris Lattner
d9d06b3af1
Initial implementation of exiting CompilationCallback
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This should save all argument registers on entry and restore on exit, despite
that, simple things seem to work!!!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18161 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 18:49:46 +00:00
Chris Lattner
22cd028eef
This method is dead
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18160 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 18:47:55 +00:00
Chris Lattner
05ad23711e
Remove this method.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18159 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 18:47:42 +00:00
Chris Lattner
d7fa35c6d2
Squelch a bogus warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18156 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 15:56:38 +00:00
Nate Begeman
dd30751654
Don't return value from void function. This is only temporary anyway while
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the JIT is made to work!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 10:04:49 +00:00
Chris Lattner
7598bbac66
Fix a minor bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18153 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:56:31 +00:00
Chris Lattner
c9a6b1f4f6
Be really paranoid about not breaking stuff yet
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18152 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:56:18 +00:00
Chris Lattner
e61198b323
Implement the first hunk of CompilationCallback. The pieces missing are the
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ones noted, which require funny PPC specific inline assembly.
If some angel felt the desire to help me, I think this is that last bit missing
for JIT support (however, generic code emitter might night work right with
the constant pool yet).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18151 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:55:05 +00:00
Chris Lattner
7c83dc2714
Implement the stub needed to get into compilation callback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18147 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:27:02 +00:00
Chris Lattner
64729d064a
Simplify code a bit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18146 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:05:44 +00:00
Chris Lattner
9b3d989cb7
Initial implementation of the JIT interfaces. Relocation is done and stubs
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for external functions work. CompilationCallback has not been written, and
stubs for internal functions are not generated yet. This means you can call
printf and exit, and use global variables, but cannot call functions local to
a module yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18145 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 06:02:06 +00:00
Chris Lattner
e94c517bb5
Emit relocations for the global variable using instructions. This gets us
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LA, LOADHiAddr, CALLpcrel, and MovePCtoLR working, though the constant pool
probably is not right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18144 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:59:53 +00:00
Chris Lattner
163393732a
Implement all of the methods
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18142 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:57:57 +00:00
Chris Lattner
42edd31209
Initial checkin of the 32-bit PPC relocation types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18141 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:57:38 +00:00
Chris Lattner
e4fce6f19c
Move JITInfo from PPCTM to PPC32TM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18140 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:56:40 +00:00
Chris Lattner
942d7b5a68
Do not provide the non-specialized PowerPCJITInfo object, it is pretty useless.
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Instead, let derived classes provide specialized ones.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18139 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:55:38 +00:00
Chris Lattner
6540c6c344
LA is really addi. Be consistent with operand ordering to avoid confusing the code emitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18138 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-23 05:54:25 +00:00
Chris Lattner
f2190b39d0
Remove some dead code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 23:07:22 +00:00
Chris Lattner
dd99885da3
Comment out a couple of unused instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18135 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 23:07:01 +00:00
Chris Lattner
213c969c92
Disable this.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18130 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 21:51:40 +00:00
Chris Lattner
99b394db15
This chunk of code needs to be rewritten
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18127 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-22 21:45:54 +00:00
Nate Begeman
486ebfd704
Fix Shootout-C++/wc, which was broken by my recent changes to emit fewer
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reg-reg copies. The necessary conditions for this bug are a GEP that is
used outside the basic block in which it is defined, whose components
other than the pointer are all constant zero, and where the use is
selected before the definition (backwards branch to successsor block).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18084 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 05:14:06 +00:00
Chris Lattner
cdc79e3763
ignore generated files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18072 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-21 00:00:54 +00:00
Chris Lattner
1deb74d7ee
Remove this method, it's not clear how it could be implemented indep of 32 or 64-bit mode
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18038 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 04:17:17 +00:00
Chris Lattner
a8b0fa5172
getJITStubForFunction is optional and unimplemented, just remove it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@18036 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-20 04:14:44 +00:00
Nate Begeman
bc3a5378d0
Eliminate another 6k register copies that the register allocator would just
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coalesce out of hbd. Speeds up compilation by 2% (0.6s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17987 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-19 08:01:16 +00:00
Nate Begeman
8531f6f42a
Generate fewer reg-reg copies for the register allocator to deal with.
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This eliminates over 2000 in hbd alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17973 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-19 02:06:40 +00:00
Nate Begeman
db869aad8c
Eliminate another common source of moves that the register allocator
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shouldn't be forced to coalesce for us: folded GEP operations. This too
fires thousands of times across the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17947 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-18 07:22:46 +00:00
Nate Begeman
1f5308e5b5
When accessing the base register for global variables, use the register
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directly rather than making a copy for the register allocator to coalesce.
This kills thousands of live intervals across the testsuite.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17946 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-18 06:51:29 +00:00
Nate Begeman
0113638073
Clean up and fix cast codegen by removing cases that are handled elsewhere,
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and properly emitting signed short to unsigned int. This fixes the last
regression vs. the CBE, MultiSource/Applications/hbd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17942 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-18 04:56:53 +00:00
Chris Lattner
eea9b134fc
Simplify namespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17870 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-16 04:47:33 +00:00
Misha Brukman
145a5a3746
Add BCTR and LWZU instruction opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17851 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-15 21:20:09 +00:00
Misha Brukman
3a8a42a9b4
Handle GhostLinkage (should not ever reach the assembly printing stage!)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17749 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 21:03:30 +00:00
Misha Brukman
fc256599b3
Fix build on Linux/PowerPC64 using SuSE GCC (#undef PPC)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17744 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-14 20:34:01 +00:00
Nate Begeman
a591457857
Allow hbd to be bugpointable on darwin by fixing common and linkonce codegen
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17637 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-09 04:01:18 +00:00
Nate Begeman
676dee6ae9
Put int the getReg cast optimization from x86 so that we generate fewer
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move instructions for the register allocator to coalesce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17608 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-08 02:25:40 +00:00
Nate Begeman
075cdc655e
Disable bogus cast elimination when the cast is used by a setcc instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17583 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-07 20:23:42 +00:00
Nate Begeman
28dd2fc240
Thanks to sabre for pointing out that we were incorrectly codegen'ing
...
int test(int x) { return 32768 - x; }
Fixed by teaching the function that checks a constant's validity to be used
as an immediate argument about subtract-from instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17476 91177308-0d34-0410-b5e6-96231b3b80d8
2004-11-04 19:43:18 +00:00
Reid Spencer
6cb21d443e
Change Library Names Not To Conflict With Others When Installed
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17286 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-27 23:18:45 +00:00
Nate Begeman
17304c393e
Remove file that is no longer used, and move include of MRegisterInfo.h
...
from PowerPCFrameInfo.h to PowerPCAsmPrinter.cpp where it is actually
needed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17244 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 06:02:38 +00:00
Nate Begeman
dfd0e7bc34
Eliminate usage of MRegisterInfo::getRegClass(physreg)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17240 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 05:40:45 +00:00
Nate Begeman
4a0de07e78
Update to-do list
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17235 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 04:10:53 +00:00
Nate Begeman
9b508c3619
Fix treecc. Also fix a latent bug in emitBinaryConstOperation that would
...
allow and const, 0 to be incorrectly codegen'd into a rlwinm instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17234 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-26 03:48:25 +00:00
Chris Lattner
097714b319
Disable the JIT until it can sorta kinda work.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17230 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-25 20:53:41 +00:00
Nate Begeman
905a29152f
Implement more complete and correct codegen for bitfield inserts, as tested
...
by the recently committed rlwimi.ll test file. Also commit initial code
for bitfield extract, although it is turned off until fully debugged.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17207 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-24 10:33:30 +00:00
Misha Brukman
d4b4a99587
* Correctly handle the MovePCtoLR pseudo-instr with a bl to next instr
...
* Stop the confusion of using rv and Addr for global addresses: just use rv
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17195 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 23:47:34 +00:00
Misha Brukman
40a55e1e29
Add BA, BL, and BLA opcodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17193 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 20:29:24 +00:00
Misha Brukman
a4df350ba1
* Do not emit IMPLICIT_DEF pseudo-instructions
...
* Convert register numbers from their opcode value to the real value, e.g.
PPC::R1 => 1 and PPC::F1 => 1
* Add correct handling of loading of global values which are PC-relative --
implement ha16() and lo16()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17190 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 18:28:01 +00:00
Misha Brukman
bd7780bc60
DForm_1, particularly used by store instructions, needs the immediate operand to
...
be listed second as that is how the instructions are usually created (and is the
correct asm syntax) so that it's assembled correctly from its constituents
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17183 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 06:08:38 +00:00
Misha Brukman
da8d96d1a1
Fix the SPR field for MTLR, MFLR, MTCTR, and MFCTR instructions.
...
The decimal value given in the manual (8 or 9) really needs to be multiplied by
a factor of 32 because of the group of 5 zero bits after the register code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17182 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 06:05:49 +00:00
Misha Brukman
15f74b3f4f
The value of the XO field for MFLR and MFCTR is 339, not 399
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17181 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 05:38:55 +00:00
Misha Brukman
bb48249414
Remove extraneous blank line
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17180 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 04:59:22 +00:00
Misha Brukman
3a060e5279
Align function arguments in function headers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17178 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 04:58:32 +00:00
Nate Begeman
31dfc52b81
Kill casts from integer types to unsigned byte, when the cast was only used
...
as the shift amount operand to a shift instruction. This was causing us to
emit unnecessary clear operations for code such as:
int foo(int x) { return 1 << x; }
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17175 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-23 00:50:23 +00:00
Reid Spencer
8c2c3152d6
Adjust to changes in Makefile.rules
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17167 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 21:02:08 +00:00
Reid Spencer
cac731ecbe
We won't use automake
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17155 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-22 03:35:04 +00:00
Misha Brukman
9691a898c7
Remove debug code emitter from the JIT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17151 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 03:07:38 +00:00
Alkis Evlogimenos
4f9a6c30a2
Make this compile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17150 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 02:44:16 +00:00
Misha Brukman
3070e2ff79
* Added basic support for JITing functions, basic blocks, instruction encoding,
...
including registers, constants, and partial support for global addresses
* The JIT is disabled by default to allow building llvm-gcc, which wants to test
running programs during configure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17149 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-21 01:42:02 +00:00
Nate Begeman
0797d4905a
Don't clear or sign extend bool->int. This fires a few dozen times on the test suite
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17147 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-20 21:55:41 +00:00
Reid Spencer
86d341b204
Initial automake generated Makefile template
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17136 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-18 23:55:41 +00:00
Nate Begeman
fcf4a42cdf
Generate correct stubs for weak-linked symbols
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17101 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 23:01:34 +00:00
Reid Spencer
761920301d
PPC32GenCodeEmitter instead of PowerPCGenCodeEmitter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17087 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 14:59:38 +00:00
Nate Begeman
1b75022cd3
Implement bitfield insert by recognizing the following pattern:
...
1. optional shift left
2. and x, immX
3. and y, immY
4. or z, x, y
==> rlwimi z, x, y, shift, mask begin, mask end
where immX == ~immY and immX is a run of set bits. This transformation
fires 32 times on voronoi, once on espresso, and probably several
dozen times on external benchmarks such as gcc.
To put this in terms of actual code generated for
struct B { unsigned a : 3; unsigned b : 2; };
void storeA (struct B *b, int v) { b->a = v;}
void storeB (struct B *b, int v) { b->b = v;}
Old:
_storeA:
rlwinm r2, r4, 0, 29, 31
lwz r4, 0(r3)
rlwinm r4, r4, 0, 0, 28
or r2, r4, r2
stw r2, 0(r3)
blr
_storeB:
rlwinm r2, r4, 3, 0, 28
rlwinm r2, r2, 0, 27, 28
lwz r4, 0(r3)
rlwinm r4, r4, 0, 29, 26
or r2, r2, r4
stw r2, 0(r3)
blr
New:
_storeA:
lwz r2, 0(r3)
rlwimi r2, r4, 0, 29, 31
stw r2, 0(r3)
blr
_storeB:
lwz r2, 0(r3)
rlwimi r2, r4, 3, 27, 28
stw r2, 0(r3)
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17078 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-17 05:19:20 +00:00
Nate Begeman
2d4c98d79b
Finally fix one of the oldest FIXMEs in the PowerPC backend: correctly
...
flag rotate left word immediate then mask insert (rlwimi) as a two-address
instruction, and update the ISel usage of the instruction accordingly.
This will allow us to properly schedule rlwimi, and use it to efficiently
codegen bitfield operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17068 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16 20:43:38 +00:00
Chris Lattner
289a49ab7d
ADd support for undef and unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17050 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-16 18:13:47 +00:00
Nate Begeman
e0c83a86b0
Better codegen of binary integer ops with 32 bit immediate operands.
...
This transformation fires a few dozen times across the testsuite.
For example, int test2(int X) { return X ^ 0x0FF00FF0; }
Old:
_test2:
lis r2, 4080
ori r2, r2, 4080
xor r3, r3, r2
blr
New:
_test2:
xoris r3, r3, 4080
xori r3, r3, 4080
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17004 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-15 00:50:19 +00:00
Misha Brukman
c982cfad87
* Claim to support machine code emission - return false from
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addPassesToEmitMachineCode()
* Add support for registers and constants in getMachineOpValue()
This enables running "int main() { ret 0 }" via the PowerPC JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16983 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 06:39:56 +00:00
Misha Brukman
d37faba5b4
* Include the real (generated) version of getBinaryCodeForInstr()
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* Add implementation of getMachineOpValue() for generated code emitter
* Convert assert()s in unimplemented functions to abort()s so that non-debug
builds fail predictably
* Add file header comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16981 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 06:07:25 +00:00
Misha Brukman
bab2adf496
* Make a PPC32-specific code emitter because we have separate classes for 32-
...
and 64-bit code emitters that cannot share code unless we use virtual
functions
* Identify components being built by tablegen with more detail by assigning them
to PowerPC, PPC32, or PPC64 more specifically; also avoids seeing 'building
PowerPC XYZ' messages twice, where one is for PPC32 and one for PPC64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16980 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 06:04:56 +00:00
Misha Brukman
a671f3b1d4
There is only one field in an instruction, and that is `Inst', the final view of
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the instruction binary format, all others are simply operands and should not
have the `field' label
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16978 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:55:37 +00:00
Misha Brukman
315d3341fd
PowerPC instruction definitions use LittleEndian-style encoding [0..31]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16977 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-14 05:54:38 +00:00
Reid Spencer
d96cb6eaa0
Update to reflect changes in Makefile rules.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16950 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-13 11:46:52 +00:00
Reid Spencer
81f76b324e
Initial version of automake Makefile.am file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 22:20:40 +00:00
Chris Lattner
cbb9812d0d
bling bling!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16873 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-10 16:26:13 +00:00
Nate Begeman
bdf69847a9
Implement logical and with an immediate that consists of a contiguous block
...
of one or more 1 bits (may wrap from least significant bit to most
significant bit) as the rlwinm rather than andi., andis., or some longer
instructons sequence.
int andn4(int z) { return z & -4; }
int clearhi(int z) { return z & 0x0000FFFF; }
int clearlo(int z) { return z & 0xFFFF0000; }
int clearmid(int z) { return z & 0x00FFFF00; }
int clearwrap(int z) { return z & 0xFF0000FF; }
_andn4:
rlwinm r3, r3, 0, 0, 29
blr
_clearhi:
rlwinm r3, r3, 0, 16, 31
blr
_clearlo:
rlwinm r3, r3, 0, 0, 15
blr
_clearmid:
rlwinm r3, r3, 0, 8, 23
blr
_clearwrap:
rlwinm r3, r3, 0, 24, 7
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16832 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-08 02:49:24 +00:00
Nate Begeman
b816f0298d
Several fixes and enhancements to the PPC32 backend.
...
1. Fix an illegal argument to getClassB when deciding whether or not to
sign extend a byte load.
2. Initial addition of isLoad and isStore flags to the instruction .td file
for eventual use in a scheduler.
3. Rewrite of how constants are handled in emitSimpleBinaryOperation so
that we can emit the PowerPC shifted immediate instructions far more
often. This allows us to emit the following code:
int foo(int x) { return x | 0x00F0000; }
_foo:
.LBB_foo_0: ; entry
; IMPLICIT_DEF
oris r3, r3, 15
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16826 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07 22:30:03 +00:00
Nate Begeman
cb90de37a7
Add ori reg, reg, 0 as a move instruction. This can be generated from
...
loading a 32bit constant into a register whose low halfword is all zeroes.
We now omit the ori after the lis for the following C code:
int bar(int y) { return y * 0x00F0000; }
_bar:
.LBB_bar_0: ; entry
; IMPLICIT_DEF
lis r2, 15
mullw r3, r3, r2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16825 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07 22:26:12 +00:00
Nate Begeman
5a181c848b
Remove unnecessary header include
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16824 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-07 22:24:32 +00:00
Chris Lattner
7c348e1c9f
Correct some typeos
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16770 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 16:28:24 +00:00
Nate Begeman
35b020df39
Turning on fsel code gen now that we can do so would be good.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16765 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 11:03:30 +00:00
Nate Begeman
087d5d92f1
Implement floating point select for lt, gt, le, ge using the powerpc fsel
...
instruction.
Now, rather than emitting the following loop out of bisect:
.LBB_main_19: ; no_exit.0.i
rlwinm r3, r2, 3, 0, 28
lfdx f1, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f2, f2, f1
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
fcmpu cr0, f1, f4
bge .LBB_main_64 ; no_exit.0.i
.LBB_main_63: ; no_exit.0.i
b .LBB_main_65 ; no_exit.0.i
.LBB_main_64: ; no_exit.0.i
fmr f2, f1
.LBB_main_65: ; no_exit.0.i
addi r3, r2, 1
rlwinm r3, r3, 3, 0, 28
lfdx f1, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f4, f4, f1
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f5, lo16(.CPI_main_1-"L00000$pb")(r3)
fcmpu cr0, f1, f5
bge .LBB_main_67 ; no_exit.0.i
.LBB_main_66: ; no_exit.0.i
b .LBB_main_68 ; no_exit.0.i
.LBB_main_67: ; no_exit.0.i
fmr f4, f1
.LBB_main_68: ; no_exit.0.i
fadd f1, f2, f4
addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
fmul f1, f1, f2
rlwinm r3, r2, 3, 0, 28
lfdx f2, r3, r28
fadd f4, f2, f1
fcmpu cr0, f4, f0
bgt .LBB_main_70 ; no_exit.0.i
.LBB_main_69: ; no_exit.0.i
b .LBB_main_71 ; no_exit.0.i
.LBB_main_70: ; no_exit.0.i
fmr f0, f4
.LBB_main_71: ; no_exit.0.i
fsub f1, f2, f1
addi r2, r2, -1
fcmpu cr0, f1, f3
blt .LBB_main_73 ; no_exit.0.i
.LBB_main_72: ; no_exit.0.i
b .LBB_main_74 ; no_exit.0.i
.LBB_main_73: ; no_exit.0.i
fmr f3, f1
.LBB_main_74: ; no_exit.0.i
cmpwi cr0, r2, -1
fmr f16, f0
fmr f17, f3
bgt .LBB_main_19 ; no_exit.0.i
We emit this instead:
.LBB_main_19: ; no_exit.0.i
rlwinm r3, r2, 3, 0, 28
lfdx f1, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f2, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f2, f2, f1
fsel f1, f1, f1, f2
addi r3, r2, 1
rlwinm r3, r3, 3, 0, 28
lfdx f2, r3, r27
addis r3, r30, ha16(.CPI_main_1-"L00000$pb")
lfd f4, lo16(.CPI_main_1-"L00000$pb")(r3)
fsub f4, f4, f2
fsel f2, f2, f2, f4
fadd f1, f1, f2
addis r3, r30, ha16(.CPI_main_2-"L00000$pb")
lfd f2, lo16(.CPI_main_2-"L00000$pb")(r3)
fmul f1, f1, f2
rlwinm r3, r2, 3, 0, 28
lfdx f2, r3, r28
fadd f4, f2, f1
fsub f5, f0, f4
fsel f0, f5, f0, f4
fsub f1, f2, f1
addi r2, r2, -1
fsub f2, f1, f3
fsel f3, f2, f3, f1
cmpwi cr0, r2, -1
fmr f16, f0
fmr f17, f3
bgt .LBB_main_19 ; no_exit.0.i
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16764 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-06 09:53:04 +00:00
Nate Begeman
1f49e868aa
Generate better code by being far less clever when it comes to the select instruction. Don't create overlapping register lifetimes
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16580 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29 05:00:31 +00:00
Nate Begeman
1b99fd3e8a
improve Type::BoolTy codegen by eliminating unnecessary clears and sign extends
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16578 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29 03:45:33 +00:00
Nate Begeman
a41fc77ae4
To go along with sabre's improved InstCombining, improve recognition of
...
integers that we can use as immediate values in instructions.
Example from yacr2:
- lis r10, -1
- ori r10, r10, 65535
- add r28, r28, r10
+ addi r28, r28, -1
addi r7, r7, 1
addi r9, r9, 1
b .LBB_main_9 ; loopentry.1.i214
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16566 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-29 02:35:05 +00:00
Nate Begeman
da721e74f8
Correct some BuildMI arguments for the upcoming simple scheduler
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-27 05:08:17 +00:00
Nate Begeman
645495d2e6
Fix the last of the major PPC GEP folding deficiencies. This will allow
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the ISel to use indexed and non-zero immediate offsets for GEPs that have
more than one use. This is common for instruction sequences such as a load
followed by a modify and store to the same address.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16493 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-23 05:31:33 +00:00
Nate Begeman
a2de102a5b
add optimized code sequences for setcc x, 0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16478 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-22 04:40:25 +00:00
Misha Brukman
540c82a700
s/ISel/PPC64ISel/ to have unique class names for debugging via gdb because the
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C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16471 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 18:22:33 +00:00
Misha Brukman
a1dca55a3a
s/ISel/PPC32ISel/ to have unique class names for debugging via gdb because the
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C++ front-end in gcc does not mangle classes in anonymous namespaces correctly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16470 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-21 18:22:19 +00:00
Chris Lattner
b228657acc
Revamp the Register class, and allow the use of the RegisterGroup class to
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specify aliases directly in register definitions.
Patch contributed by Jason Eckhardt!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16330 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-14 04:17:02 +00:00
Nate Begeman
20136a21ba
Add 64 bit divide instructions, and use them
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16198 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-06 18:46:59 +00:00
Misha Brukman
3e0b51ab3b
* Change PPC32AsmPrinter => PowerPCAsmPrinter since it is now shared between
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Darwin and AIX and is not 32- or 64-bit specific
* Bring back PowerPC.td as a result, to make it use the `PowerPC' class name
* Adjust Makefile accordingly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16174 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-05 02:42:44 +00:00
Misha Brukman
b986b7de50
Renamed PPC32AsmPrinter.cpp => PowerPCAsmPrinter.cpp as the Darwin and AIX asm
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printers are now unified into one file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16173 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-05 02:27:37 +00:00
Nate Begeman
a11c2e8fb9
Include MathExtras.h to fix build breakage, thanks to Vladimir
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16164 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-04 14:51:26 +00:00
Nate Begeman
ed42853be1
All PPC instructions are now auto-printed
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32 and 64 bit AsmWriters unified
Darwin and AIX specific features of AsmWriter split out
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16163 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-04 05:00:00 +00:00
Nate Begeman
b7a8f2cdaa
Convert remaining X-Form and Pseudo instructions over to asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16142 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-02 08:13:00 +00:00
Reid Spencer
551ccae044
Changes For Bug 352
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Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16137 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-01 22:55:40 +00:00
Nate Begeman
cc8bd9ca7c
convert M and MD form instructions to generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16121 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-31 02:28:08 +00:00
Nate Begeman
07aada8b0f
Move yet more instructions over to being printed by the generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16112 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-30 02:28:06 +00:00
Nate Begeman
6b3dc55ef8
Convert A-Form instructions to auto-generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16107 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 22:45:13 +00:00
Nate Begeman
d332fd54f5
Improvements to int->float cast code for PPC-64
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16105 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 22:02:43 +00:00
Nate Begeman
f2f0781a10
Implement the following missing functionality in the PPC backend:
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cast fp->bool
cast ulong->fp
algebraic right shift long by non-constant value
These changes tested across most of the test suite. Fixes Regression/casts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16081 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-29 08:19:32 +00:00
Nate Begeman
5709998993
Register sizes are in bits, not bytes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16070 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-27 04:28:10 +00:00
Nate Begeman
0e5e5f56bd
Kill a majority of unnecessary sign extensions for byte loads
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15991 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-22 08:10:15 +00:00
Nate Begeman
1f4a132599
Don't hard code the offset of the saved R31 in functions with frame pointers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15990 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-22 08:09:17 +00:00
Nate Begeman
a96c4af7f1
Back out branchless SetCC code. While it helped a lot in some cases, it
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hurt a lot in others. Instead, improve branching version of SetCC and
Select instructions. The old code will be in CVS should we ever need to
dig it up again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15979 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:42:14 +00:00
Chris Lattner
608034ec1a
Switch from bytes to bits for alignment.
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Also, change GPRC for PPC32 to align on 32-bit boundary instead of 64-bit
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15975 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 20:14:40 +00:00
Chris Lattner
8edcd84653
Reduce uses of getRegClass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15968 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:51:17 +00:00
Chris Lattner
12585baf1a
Fix warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15964 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 19:11:03 +00:00
Nate Begeman
c3306120cc
Move XForm instructions over to the auto-generated asm writer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15962 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-21 05:56:39 +00:00
Nate Begeman
b65eadb7f5
remove some things from the todo list.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15956 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 18:46:54 +00:00
Chris Lattner
f908888553
Do not register ppc64 yet, as it breaks the SparcV9 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15955 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 18:09:18 +00:00
Nate Begeman
b47321ba2b
Implement code to convert SetCC into straight line code where appropriate. Add necessary instructions for this transformation to the .td file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15952 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-20 09:56:22 +00:00
Misha Brukman
43f20a56b2
Fix opcodes being printed in caps (the more general fix may be `AsmWriter')
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15932 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:56:12 +00:00
Misha Brukman
1601d9c1f0
Stack space for argument passing is 32 regardless of 32- vs. 64-bit arch.
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Thanks to Nate Begeman for pointing this out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15930 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:51:19 +00:00
Misha Brukman
983e92dc0d
LR needs to be saved at 16-byte offset on a 64-bit arch
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15929 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:36:14 +00:00
Misha Brukman
4debafbea4
On 64-bit PowerPC, pointers are 8 bytes, so parameter area offset is 48, not 24
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15928 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:34:05 +00:00
Misha Brukman
d2cbb871d0
This PHI has 4 additional operands, not 2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15926 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 21:00:12 +00:00
Misha Brukman
95ab78af3c
Use the appropriate 64-bit register description file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15922 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 19:36:57 +00:00
Misha Brukman
5e9867e71c
Fix more remaining 32-bit vestiges of PowerPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15919 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 18:49:58 +00:00
Misha Brukman
cc55ad5fe9
Fix another vestige of the 32-bit PowerPC backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15918 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:50:30 +00:00
Misha Brukman
ab566eaa68
Correct character prepended to global symbols ('.'), use Mangler consistently
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15917 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:33:56 +00:00
Misha Brukman
1c514ec89d
* Eliminate global base register, r2 is used for that on AIX/PowerPC
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* Fix bug from 32-bit PowerPC days of 2-register long split
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15916 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:29:25 +00:00
Misha Brukman
85aa4d0cc5
Wrap long lines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15915 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 16:28:30 +00:00
Nate Begeman
1e67d4d7ba
Convert casts that will have no effect into move instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15914 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 08:07:50 +00:00
Nate Begeman
81d265d692
Clean up floating point instruction selection.
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Change int->float cast code to put conversion constants in constant pool.
Shorten code sequence for constant pool fp loads.
Remove LOADLoDirect/LOADLoIndirect psuedo instructions and tweak asmwriter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15913 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-19 05:20:54 +00:00
Chris Lattner
f746a7d09b
Rename var
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15897 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-18 02:22:55 +00:00
Misha Brukman
5069438763
This file is no longer used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15893 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 20:23:33 +00:00
Chris Lattner
69d485e646
Start using alignment output routines from AsmPrinter.
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Changes to make this more similar to the X86 asmprinter
Fix overalignment of globals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15891 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 19:26:03 +00:00
Chris Lattner
5676310c5d
Print comments with ;
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15881 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 16:27:26 +00:00
Nate Begeman
07a73755d3
Re-fix hiding the Frame Pointer from the register allocator in functions
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that have a frame pointer. This change fixes Burg. In addition, make
the necessary changes to floating point code gen and constant loading after
Chris Lattner's fixes to the asm writer. These changes fix MallocBench/gs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15873 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 07:17:44 +00:00
Chris Lattner
79835d9f9f
Use the emitGlobalConstant defined in AsmPrinter
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15869 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 06:37:12 +00:00
Chris Lattner
b462e47d2d
New, more general, interface.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15866 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 06:07:43 +00:00
Misha Brukman
9e36843964
Rewrite targets/rules to generate files for just PowerPC or PPC{32,64}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15862 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:11:54 +00:00
Misha Brukman
8283ec7c1c
Register classes are target-dependent
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15861 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:10:31 +00:00
Misha Brukman
6316181ee0
#include <map> is not necessary here
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15860 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:09:39 +00:00
Misha Brukman
1dcddfefbd
`PowerPC' is no longer a real target
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15859 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:09:10 +00:00
Misha Brukman
f2f8cfb945
Move variables and methods which need PPC{32,64}* distinction to subclasses
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15858 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:08:44 +00:00
Misha Brukman
66aa3e0e8b
No need for an `is64bit' flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15857 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:06:47 +00:00
Misha Brukman
a2a27b3c85
PowerPCInstrInfo and PowerPCRegisterInfo have gone away; they are replaced
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by 32- and 64-bit customized files, named appropriately.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15856 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:05:00 +00:00
Misha Brukman
08dde0ba85
Consistently name passed with 32 or 64 in their name
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15855 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:02:58 +00:00
Misha Brukman
3d58b8f531
PowerPCRegisterInfo no longer takes a bool to differentiate 32 vs 64 bits
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15854 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:02:18 +00:00
Misha Brukman
db50bd3e7a
The PowerPCInstrInfo class has gone away.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15853 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 05:00:46 +00:00
Misha Brukman
363dd07320
PowerPCInstrInfo has gone away, PPC32 and PPC64 share opcodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15852 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:58:50 +00:00
Misha Brukman
adde6994ac
PowerPC 32-/64-bit split: Part II, 64-bit customizations on PowerPC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15851 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:57:37 +00:00
Misha Brukman
f2ccb77ee9
PowerPC 32-/64-bit split: Part I, PPC32* bit files, adapted from former PowerPC*
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15850 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 04:55:41 +00:00
Chris Lattner
469ab79584
Print float constants as 4 byte values.
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Also, fix endianness problems when cross compiling from little-endian host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15847 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 02:48:44 +00:00