..
2002-12-23-LocalRAProblem.ll
2002-12-23-SubProblem.ll
2003-08-03-CallArgLiveRanges.ll
2003-08-23-DeadBlockTest.ll
2003-11-03-GlobalBool.ll
2004-02-12-Memcpy.ll
2004-02-13-FrameReturnAddress.ll
Targets sometimes assign fixed stack object to spill certain callee-saved
2009-07-09 06:53:48 +00:00
2004-02-14-InefficientStackPointer.ll
2004-02-22-Casts.ll
2004-03-30-Select-Max.ll
2004-04-09-SameValueCoalescing.ll
2004-04-13-FPCMOV-Crash.ll
2004-06-10-StackifierCrash.ll
2004-10-08-SelectSetCCFold.ll
2005-01-17-CycleInDAG.ll
2005-02-14-IllegalAssembler.ll
2005-05-08-FPStackifierPHI.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-01-19-ISelFoldingBug.ll
2006-03-01-InstrSchedBug.ll
2006-03-02-InstrSchedBug.ll
2006-04-04-CrossBlockCrash.ll
2006-04-27-ISelFoldingBug.ll
2006-05-01-SchedCausingSpills.ll
2006-05-02-InstrSched1.ll
2006-05-02-InstrSched2.ll
2006-05-08-CoalesceSubRegClass.ll
2006-05-08-InstrSched.ll
2006-05-11-InstrSched.ll
2006-05-17-VectorArg.ll
2006-05-22-FPSetEQ.ll
2006-05-25-CycleInDAG.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-07-10-InlineAsmAConstraint.ll
2006-07-12-InlineAsmQConstraint.ll
2006-07-19-ATTAsm.ll
2006-07-20-InlineAsm.ll
2006-07-28-AsmPrint-Long-As-Pointer.ll
2006-07-31-SingleRegClass.ll
2006-08-07-CycleInDAG.ll
2006-08-16-CycleInDAG.ll
2006-08-21-ExtraMovInst.ll
2006-09-01-CycleInDAG.ll
2006-10-02-BoolRetCrash.ll
2006-10-07-ScalarSSEMiscompile.ll
2006-10-09-CycleInDAG.ll
2006-10-10-FindModifiedNodeSlotBug.ll
2006-10-12-CycleInDAG.ll
2006-10-13-CycleInDAG.ll
2006-10-19-SwitchUnnecessaryBranching.ll
2006-11-12-CSRetCC.ll
2006-11-17-IllegalMove.ll
add nounwind
2009-07-12 00:46:16 +00:00
2006-11-27-SelectLegalize.ll
2006-11-28-Memcpy.ll
2006-12-19-IntelSyntax.ll
2007-01-08-InstrSched.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-01-13-StackPtrIndex.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-01-29-InlineAsm-ir.ll
2007-02-04-OrAddrMode.ll
2007-02-19-LiveIntervalAssert.ll
2007-02-25-FastCCStack.ll
2007-03-01-SpillerCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-03-15-GEP-Idx-Sink.ll
2007-03-16-InlineAsm.ll
2007-03-18-LiveIntervalAssert.ll
2007-03-24-InlineAsmMultiRegConstraint.ll
2007-03-24-InlineAsmPModifier.ll
2007-03-24-InlineAsmVectorOp.ll
2007-03-24-InlineAsmXConstraint.ll
2007-03-26-CoalescerBug.ll
2007-04-08-InlineAsmCrash.ll
2007-04-11-InlineAsmVectorResult.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-04-17-LiveIntervalAssert.ll
2007-04-24-Huge-Stack.ll
2007-04-24-VectorCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-04-25-MMX-PADDQ.ll
2007-04-27-InlineAsm-IntMemInput.ll
2007-05-05-VecCastExpand.ll
2007-05-07-InvokeSRet.ll
2007-05-14-LiveIntervalAssert.ll
2007-05-15-maskmovq.ll
2007-05-17-ShuffleISelBug.ll
2007-06-04-tailmerge4.ll
2007-06-04-X86-64-CtorAsmBugs.ll
2007-06-05-LSR-Dominator.ll
2007-06-14-branchfold.ll
2007-06-15-IntToMMX.ll
2007-06-28-X86-64-isel.ll
2007-06-29-DAGCombinerBug.ll
2007-06-29-VecFPConstantCSEBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-07-03-GR64ToVR64.ll
2007-07-10-StackerAssert.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-07-18-Vector-Extract.ll
2007-08-01-LiveVariablesBug.ll
New test. Bogus implicit-def prevented a copy from being coalesced.
2007-08-01 20:26:40 +00:00
2007-08-09-IllegalX86-64Asm.ll
2007-08-10-SignExtSubreg.ll
2007-08-13-AppendingLinkage.ll
2007-08-13-SpillerReuse.ll
2007-09-03-X86-64-EhSelector.ll
2007-09-05-InvalidAsm.ll
2007-09-06-ExtWeakAliasee.ll
2007-09-17-ObjcFrameEH.ll
2007-09-18-ShuffleXformBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-09-27-LDIntrinsics.ll
2007-10-04-AvoidEFLAGSCopy.ll
2007-10-05-3AddrConvert.ll
2007-10-12-CoalesceExtSubReg.ll
2007-10-12-SpillerUnfold1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-10-12-SpillerUnfold2.ll
2007-10-14-CoalescerCrash.ll
2007-10-15-CoalescerCrash.ll
2007-10-16-CoalescerCrash.ll
2007-10-16-fp80_select.ll
2007-10-16-IllegalAsm.ll
2007-10-17-IllegalAsm.ll
2007-10-19-SpillerUnfold.ll
2007-10-28-inlineasm-q-modifier.ll
2007-10-29-ExtendSetCC.ll
2007-10-30-LSRCrash.ll
2007-10-31-extractelement-i64.ll
2007-11-01-ISelCrash.ll
2007-11-02-BadAsm.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-11-03-x86-64-q-constraint.ll
2007-11-04-LiveIntervalCrash.ll
2007-11-04-LiveVariablesBug.ll
2007-11-04-rip-immediate-constant.ll
2007-11-06-InstrSched.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-11-07-MulBy4.ll
2007-11-14-Coalescer-Bug.ll
Enable cross register class coalescing.
2009-07-18 02:10:10 +00:00
2007-11-30-LoadFolding-Bug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-11-30-TestLoadFolding.ll
2007-12-11-FoldImpDefSpill.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-12-16-BURRSchedCrash.ll
2007-12-18-LoadCSEBug.ll
2008-01-08-IllegalCMP.ll
2008-01-08-SchedulerCrash.ll
2008-01-09-LongDoubleSin.ll
2008-01-16-FPStackifierAssert.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-01-16-InvalidDAGCombineXform.ll
2008-01-16-Trampoline.ll
2008-01-25-EmptyFunction.ll
2008-02-05-ISelCrash.ll
2008-02-06-LoadFoldingBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-02-08-LoadFoldingBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-02-14-BitMiscompile.ll
2008-02-18-TailMergingBug.ll
2008-02-20-InlineAsmClobber.ll
2008-02-22-LocalRegAllocBug.ll
2008-02-22-ReMatBug.ll
2008-02-25-InlineAsmBug.ll
2008-02-25-X86-64-CoalescerBug.ll
2008-02-26-AsmDirectMemOp.ll
2008-02-27-DeadSlotElimBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-02-27-PEICrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-03-06-frem-fpstack.ll
2008-03-07-APIntBug.ll
2008-03-10-RegAllocInfLoop.ll
2008-03-12-ThreadLocalAlias.ll
2008-03-13-TwoAddrPassCrash.ll
2008-03-14-SpillerCrash.ll
2008-03-18-CoalescerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-03-19-DAGCombinerBug.ll
2008-03-23-DarwinAsmComments.ll
2008-03-25-TwoAddrPassBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-03-31-SpillerFoldingBug.ll
2008-04-02-unnamedEH.ll
Check for the correct unnamed name.
2009-07-14 00:53:58 +00:00
2008-04-08-CoalescerCrash.ll
2008-04-09-BranchFolding.ll
2008-04-15-LiveVariableBug.ll
2008-04-16-CoalescerBug.ll
2008-04-16-ReMatBug.ll
2008-04-17-CoalescerBug.ll
2008-04-24-MemCpyBug.ll
2008-04-24-pblendw-fold-crash.ll
2008-04-26-Asm-Optimize-Imm.ll
2008-04-28-CoalescerBug.ll
2008-04-28-CyclicSchedUnit.ll
2008-05-01-InvalidOrdCompare.ll
2008-05-09-PHIElimBug.ll
2008-05-09-ShuffleLoweringBug.ll
2008-05-12-tailmerge-5.ll
2008-05-21-CoalescerBug.ll
2008-05-22-FoldUnalignedLoad.ll
2008-05-28-CoalescerBug.ll
2008-05-28-LocalRegAllocBug.ll
2008-06-04-MemCpyLoweringBug.ll
2008-06-13-NotVolatileLoadStore.ll
2008-06-13-VolatileLoadStore.ll
2008-06-16-SubregsBug.ll
2008-06-18-BadShuffle.ll
2008-06-25-VecISelBug.ll
2008-07-07-DanglingDeadInsts.ll
2008-07-09-ELFSectionAttributes.ll
2008-07-11-SHLBy1.ll
2008-07-11-SpillerBug.ll
Fix test after Chris' select changes.
2009-03-12 16:10:08 +00:00
2008-07-16-CoalescerCrash.ll
2008-07-19-movups-spills.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-07-22-CombinerCrash.ll
2008-07-23-VSetCC.ll
eliminate the v[if]cmp versions of these tests, now that [if]cmp+sext works.
2009-07-08 00:49:35 +00:00
2008-08-05-SpillerBug.ll
2008-08-06-RewriterBug.ll
2008-08-17-UComiCodeGenBug.ll
2008-08-19-SubAndFetch.ll
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
2009-07-30 08:33:02 +00:00
2008-08-23-64Bit-maskmovq.ll
2008-08-23-X86-64AsmBug.ll
Changed my mind. We now allow remat of instructions whose defs have subreg indices.
2009-07-16 20:15:00 +00:00
2008-08-25-AsmRegTypeMismatch.ll
2008-08-31-EH_RETURN32.ll
Targets sometimes assign fixed stack object to spill certain callee-saved
2009-07-09 06:53:48 +00:00
2008-08-31-EH_RETURN64.ll
Targets sometimes assign fixed stack object to spill certain callee-saved
2009-07-09 06:53:48 +00:00
2008-09-05-sinttofp-2xi32.ll
2008-09-09-LinearScanBug.ll
2008-09-11-CoalescerBug2.ll
2008-09-11-CoalescerBug.ll
2008-09-17-inline-asm-1.ll
2008-09-18-inline-asm-2.ll
2008-09-19-RegAllocBug.ll
2008-09-25-sseregparm-1.ll
Accept 'inreg' attribute on x86 functions as
2008-09-25 20:47:45 +00:00
2008-09-26-FrameAddrBug.ll
2008-09-29-ReMatBug.ll
2008-09-29-VolatileBug.ll
2008-10-02-Atomics32-2.ll
2008-10-06-MMXISelBug.ll
2008-10-06-x87ld-nan-1.ll
2008-10-06-x87ld-nan-2.ll
2008-10-07-SSEISelBug.ll
2008-10-11-CallCrash.ll
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
2008-10-11 22:08:30 +00:00
2008-10-13-CoalescerBug.ll
2008-10-16-SpillerBug.ll
2008-10-16-VecUnaryOp.ll
2008-10-17-Asm64bitRConstraint.ll
2008-10-20-AsmDoubleInI32.ll
2008-10-24-FlippedCompare.ll
2008-10-27-CoalescerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-27-StackRealignment.ll
2008-10-29-ExpandVAARG.ll
2008-11-03-F80VAARG.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-11-06-testb.ll
2008-11-13-inlineasm-3.ll
2008-11-29-DivideConstant16bit.ll
2008-11-29-DivideConstant16bitSigned.ll
2008-11-29-ULT-Sign.ll
2008-12-01-loop-iv-used-outside-loop.ll
2008-12-01-SpillerAssert.ll
2008-12-02-dagcombine-1.ll
2008-12-02-dagcombine-2.ll
2008-12-02-dagcombine-3.ll
2008-12-02-IllegalResultType.ll
2008-12-05-SpillerCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-12-12-PrivateEHSymbol.ll
fix some pastos in triple lines.
2009-08-12 06:49:12 +00:00
2008-12-16-BadShift.ll
2008-12-16-dagcombine-4.ll
2008-12-19-EarlyClobberBug.ll
2008-12-22-dagcombine-5.ll
2008-12-23-crazy-address.ll
2008-12-23-dagcombine-6.ll
2009-01-12-CoalescerBug.ll
2009-01-13-DoubleUpdate.ll
2009-01-16-SchedulerBug.ll
2009-01-16-UIntToFP.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-01-18-ConstantExprCrash.ll
Fix rdar://6505632, an llc crash on 483.xalancbmk
2009-01-18 20:35:00 +00:00
2009-01-25-NoSSE.ll
2009-01-26-WrongCheck.ll
2009-01-27-NullStrings.ll
Make the big switch: Change MCSectionMachO to represent a section *semantically*
2009-08-10 01:39:42 +00:00
2009-01-29-LocalRegAllocBug.ll
2009-01-31-BigShift2.ll
2009-01-31-BigShift3.ll
2009-01-31-BigShift.ll
2009-02-01-LargeMask.ll
2009-02-03-AnalyzedTwice.ll
2009-02-04-sext-i64-gep.ll
2009-02-05-CoalescerBug.ll
2009-02-07-CoalescerBug.ll
2009-02-08-CoalescerBug.ll
Fix PR3486. Fix a bug in code that manually patch physical register live interval after its sub-register is coalesced with a virtual register.
2009-02-08 11:04:35 +00:00
2009-02-11-codegenprepare-reuse.ll
2009-02-12-DebugInfoVLA.ll
2009-02-12-InlineAsm-nieZ-constraints.ll
2009-02-12-SpillerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-02-20-PreAllocSplit-Crash.ll
2009-02-21-ExtWeakInitializer.ll
2009-02-25-CommuteBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-02-26-MachineLICMBug.ll
2009-03-03-BitcastLongDouble.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-03-03-BTHang.ll
2009-03-05-burr-list-crash.ll
2009-03-07-FPConstSelect.ll
2009-03-09-APIntCrash.ll
2009-03-09-SpillerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-03-10-CoalescerBug.ll
2009-03-11-CoalescerBug.ll
2009-03-12-CPAlignBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2009-03-13-PHIElimBug.ll
2009-03-16-PHIElimInLPad.ll
2009-03-16-SpillerBug.ll
2009-03-23-i80-fp80.ll
2009-03-23-LinearScanBug.ll
2009-03-23-MultiUseSched.ll
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
2009-06-03 21:13:54 +00:00
2009-03-25-TestBug.ll
2009-03-26-NoImplicitFPBug.ll
Change these tests to use function attributes rather than special llc
2009-08-05 16:37:27 +00:00
2009-04-09-InlineAsmCrash.ll
2009-04-12-FastIselOverflowCrash.ll
2009-04-12-picrel.ll
2009-04-13-2AddrAssert-2.ll
2009-04-13-2AddrAssert.ll
2009-04-14-IllegalRegs.ll
2009-04-16-SpillerUnfold.ll
2009-04-20-LinearScanOpt.ll
2009-04-21-NoReloadImpDef.ll
2009-04-24.ll
2009-04-25-CoalescerBug.ll
2009-04-27-CoalescerAssert.ll
2009-04-27-LiveIntervalsAssert2.ll
2009-04-27-LiveIntervalsAssert.ll
2009-04-27-LiveIntervalsBug.ll
2009-04-29-IndirectDestOperands.ll
2009-04-29-LinearScanBug.ll
2009-04-29-RegAllocAssert.ll
2009-04-scale.ll
2009-05-08-InlineAsmIOffset.ll
2009-05-11-tailmerge-crash.ll
2009-05-19-SingleElementExtractElement.ll
Add a testcase which got fixed by recent legalization work.
2009-05-28 05:10:20 +00:00
2009-05-23-available_externally.ll
available_externall linkage is not local, this was confusing the codegenerator,
2009-05-23 14:06:57 +00:00
2009-05-23-dagcombine-shifts.ll
Fix PR4254.
2009-05-23 17:29:48 +00:00
2009-05-28-DAGCombineCrash.ll
Do not try to create a MVT type of width 0.
2009-05-28 23:52:18 +00:00
2009-05-30-ISelBug.ll
(i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits.
2009-05-30 08:43:27 +00:00
2009-06-02-RewriterBug.ll
Fix for PR4225: When rewriter reuse a value in a physical register , it clear the register kill operand marker and its kill ops information. However, the cleared operand may be a def of a super-register. Clear the kill ops info for the super-register's sub-registers as well.
2009-06-03 09:00:27 +00:00
2009-06-03-Win64DisableRedZone.ll
Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
2009-08-03 08:12:53 +00:00
2009-06-03-Win64SpillXMM.ll
Unbreak Win64 CC. Step one: honour register save area, fix some alignment and provide a different set of call-clobberred registers.
2009-08-03 08:12:53 +00:00
2009-06-04-VirtualLiveIn.ll
RALinScan::attemptTrivialCoalescing() was returning a virtual register instead of the physical register it is allocated to. This resulted in virtual register(s) being added the live-in sets.
2009-06-04 20:53:36 +00:00
2009-06-05-ScalarToVectorByteMMX.ll
Get rid of a bogus pattern that interferes with optimization.
2009-06-06 04:17:04 +00:00
2009-06-05-sitofpCrash.ll
PR2598: make sure to expand illegal forms of integer/floating-point
2009-06-06 03:57:58 +00:00
2009-06-05-VariableIndexInsert.ll
Avoid crashing on a variable-index insertelement with element type i16.
2009-06-06 06:32:50 +00:00
2009-06-05-VZextByteShort.ll
Get rid of some bogus patterns for X86vzmovl. Don't create VZEXT_MOVL
2009-06-06 06:05:10 +00:00
2009-06-06-ConcatVectors.ll
Fix the expansion for CONCAT_VECTORS so that it doesn't create illegal
2009-06-06 07:08:26 +00:00
2009-06-07-ExpandMMXBitcast.ll
Fix the run-line for this test to work correctly outside of x86.
2009-06-07 09:44:19 +00:00
2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
Fix Bug 4278: X86-64 with -tailcallopt calling convention
2009-06-12 16:26:57 +00:00
2009-06-15-not-a-tail-call.ll
CheckTailCallReturnConstraints is missing a check on the
2009-06-15 14:43:36 +00:00
2009-06-18-movlp-shuffle-register.ll
Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to
2009-06-19 07:00:55 +00:00
2009-07-06-TwoAddrAssert.ll
Avoid adding a duplicate def. This fixes PR4478.
2009-07-06 21:34:05 +00:00
2009-07-07-SplitICmp.ll
Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
2009-07-09 22:01:03 +00:00
2009-07-09-ExtractBoolFromVector.ll
Make EXTRACT_VECTOR_ELT a bit more flexible in terms of the returned
2009-07-09 22:01:03 +00:00
2009-07-15-CoalescerBug.ll
ShortenDeadCopySrcLiveRange needs to be more conservative in multi-kill situations.
2009-07-15 21:39:50 +00:00
2009-07-16-CoalescerBug.ll
Let callers decide the sub-register index on the def operand of rematerialized instructions.
2009-07-16 09:20:10 +00:00
2009-07-16-LoadFoldingBug.ll
With recent MC changes, RIP base register is explicitly modeled. Make sure we add it when x86 V_SET0 / V_SETALLONES (by transforming it into a constpool load) into the use instruction.
2009-07-16 18:44:05 +00:00
2009-07-17-StackColoringBug.ll
Fix pr4552. Stack slot coloring with register must take care not to generate illegal ams.
2009-07-17 22:42:51 +00:00
2009-07-19-AsmExtraOperands.ll
Fix http://llvm.org/bugs/show_bug.cgi?id=4583
2009-07-19 19:09:59 +00:00
2009-07-20-CoalescerBug.ll
Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.
2009-07-20 19:47:55 +00:00
2009-07-20-DAGCombineBug.ll
Fix a dagga combiner bug: avoid creating illegal constant.
2009-07-21 05:40:15 +00:00
2009-08-02-mmx-scalar-to-vector.ll
Use movq to move 64 bits in and out of mmx registers.
2009-08-03 02:45:34 +00:00
2009-08-06-branchfolder-crash.ll
Make tail merging handle blocks with repeated predecessors correctly, and
2009-08-18 15:18:18 +00:00
2009-08-06-inlineasm.ll
Add the testcase from PR 4668. This works at the
2009-08-07 00:04:42 +00:00
2009-08-08-CastError.ll
fix an incorrect target triple.
2009-08-12 06:28:51 +00:00
2009-08-12-badswitch.ll
Test for 78821, sort of. While that bug is nondeterministic,
2009-08-12 17:43:47 +00:00
2009-08-14-Win64MemoryIndirectArg.ll
Properly handle indirect win64 args when they're passed in memory
2009-08-14 18:19:10 +00:00
2009-08-19-LoadNarrowingMiscompile.ll
Make this test platform neutral.
2009-08-19 18:51:45 +00:00
2009-08-23-SubRegReuseUndo.ll
Fix PR4753.
2009-08-23 13:01:45 +00:00
20090313-signext.ll
abi-isel.ll
Fix an x86 code size regression: prefer RIP-relative addressing
2009-08-20 18:23:44 +00:00
add-trick32.ll
add-trick64.ll
add-with-overflow.ll
aliases.ll
aligned-comm.ll
all-ones-vector.ll
alloca-align-rounding.ll
and-or-fold.ll
and-su.ll
anyext-uses.ll
arg-cast.ll
asm-block-labels.ll
asm-global-imm.ll
asm-indirect-mem.ll
asm-modifier-P.ll
We get the P modifier wrong in a lot of cases, just add some more rigorous testing.
2009-07-11 08:30:22 +00:00
asm-modifier.ll
rename test, make more specific.
2009-08-22 00:44:24 +00:00
atomic_add.ll
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
2009-07-30 08:33:02 +00:00
atomic_op.ll
Atomics-32.ll
Atomics-64.ll
attribute-sections.ll
Change MCSectionELF to represent a section semantically instead of
2009-08-13 05:07:35 +00:00
avoid-lea-scale2.ll
x86 isel tweak: use lea (%reg,%reg) instead of lea (,%reg,2).
2009-07-22 23:26:55 +00:00
avoid-loop-align-2.ll
avoid-loop-align.ll
bitcast2.ll
bitcast-int-to-vector.ll
bitcast.ll
break-anti-dependencies.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
bswap-inline-asm.ll
bswap.ll
bt.ll
byval2.ll
byval3.ll
byval4.ll
byval5.ll
byval6.ll
byval7.ll
byval.ll
call-imm.ll
Fix test on non-darwin hosts.
2009-05-20 05:45:36 +00:00
call-push.ll
change-compare-stride-0.ll
change-compare-stride-1.ll
clz.ll
cmp0.ll
cmp1.ll
cmp2.ll
cmp-test.ll
coalesce-esp.ll
Enable the new no-SP register classes by default. This is to address
2009-08-05 17:40:24 +00:00
coalescer-commute1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
coalescer-commute2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
coalescer-commute3.ll
coalescer-commute4.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
coalescer-commute5.ll
coalescer-cross.ll
Enable cross register class coalescing.
2009-07-18 02:10:10 +00:00
coalescer-remat.ll
code_placement.ll
codegen-prepare-cast.ll
Fix CodeGenPrepare's address-mode sinking to handle unusual
2009-06-02 21:29:13 +00:00
codemodel.ll
Fix an x86 code size regression: prefer RIP-relative addressing
2009-08-20 18:23:44 +00:00
combine-lds.ll
combiner-aa-0.ll
Fix a bug in x86's PreprocessForRMW logic that was exposed
2009-08-06 09:22:57 +00:00
commute-cmov.ll
commute-intrinsic.ll
commute-two-addr.ll
compare_folding.ll
compare-add.ll
compiler_used.ll
implement a new magic global "llvm.compiler.used" which is like llvm.used, but
2009-07-20 06:14:25 +00:00
complex-fca.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
const-select.ll
constant-pool-remat-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
constpool.ll
testcase for PR4466
2009-06-27 01:33:35 +00:00
convert-2-addr-3-addr-inc64.ll
copysign-zero.ll
critical-edge-split.ll
Explicitly pass -tailcallopt=false to these tests so that they
2009-04-23 19:39:41 +00:00
cstring.ll
dag-rauw-cse.ll
dagcombine-buildvector.ll
Adapt the x86 build_vector dagcombine to the current state of the legalizer.
2009-06-05 21:37:30 +00:00
dagcombine-cse.ll
darwin-bzero.ll
darwin-no-dead-strip.ll
darwin-stub.ll
dg.exp
sabre brings to my attention that the 'tr' suffix is also obsolete
2008-05-20 21:00:03 +00:00
div_const.ll
divrem.ll
dll-linkage.ll
another bogus triple
2009-08-12 06:36:52 +00:00
dollar-name.ll
dyn-stackalloc.ll
empty-struct-return-type.ll
reduce testcase.
2009-08-06 16:14:33 +00:00
epilogue.ll
extend.ll
extern_weak.ll
extmul64.ll
extmul128.ll
extract-combine.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
extract-extract.ll
Fix a bug in the DAGCombiner's handling of multiple linked
2009-08-10 23:43:19 +00:00
extractelement-from-arg.ll
extractelement-load.ll
extractelement-shuffle.ll
extractps.ll
fabs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fast-cc-callee-pops.ll
fast-cc-merge-stack-adj.ll
fast-cc-pass-in-regs.ll
fast-isel-bail.ll
fast-isel-bc.ll
Teach X86FastISel how to handle CCValAssign::BCvt, which is used for
2009-08-05 05:33:42 +00:00
fast-isel-call.ll
fast-isel-constpool.ll
Fix yet-another bug I introduced into fastisel, this time handling
2009-07-02 03:14:25 +00:00
fast-isel-gep-sext.ll
fast-isel-gv.ll
@GOTPCREL is also rip-relative. Fix fast-isel to do the right thing.
2009-07-02 04:22:01 +00:00
fast-isel-i1.ll
fast-isel-mem.ll
fast-isel-phys.ll
fast-isel-shift-imm.ll
fast-isel-tailcall.ll
fast-isel-tls.ll
fast-isel-trunc.ll
fast-isel.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fastcall-correct-mangling.ll
Pass target triple string in to TargetMachine constructor.
2009-08-03 04:03:51 +00:00
fastcc-2.ll
fastcc-byval.ll
fastcc-sret.ll
fastcc.ll
field-extract-use-trunc.ll
fildll.ll
fmul-zero.ll
Update this test to use fmul instead of mul.
2009-06-15 22:49:34 +00:00
fold-add.ll
fold-and-shift.ll
fold-call-2.ll
fold-call-3.ll
fold-call.ll
fold-imm.ll
fold-load.ll
fold-mul-lohi.ll
fold-pcmpeqd-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fold-pcmpeqd-1.ll
fold-pcmpeqd-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fold-sext-trunc.ll
When transforming sext(trunc(load(x))) into sext(smaller load(x)),
2009-04-27 02:00:55 +00:00
fp2sint.ll
fp_constant_op.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp_load_cast_fold.ll
fp_load_fold.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp-immediate-shorten.ll
fp-in-intregs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp-stack-2results.ll
fp-stack-compare.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fp-stack-direct-ret.ll
fp-stack-ret-conv.ll
fp-stack-ret-store.ll
fp-stack-ret.ll
fp-stack-retcopy.ll
fp-stack-set-st1.ll
fsxor-alignment.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
full-lsr.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ga-offset.ll
For Darwin / x86_64, override -relocation-model=static to pic if the output is assembly since Darwin assembler does not really support -static codeine.
2009-06-03 21:13:54 +00:00
global-sections-tls.ll
Fix PR4639, a ELF-TLS regression from some of my refactoring.
2009-07-28 17:57:51 +00:00
global-sections.ll
Various AsmWriter output cleanups. Use WriteAsOperand instead of
2009-08-13 01:36:44 +00:00
h-register-addressing-32.ll
h-register-addressing-64.ll
h-register-store.ll
h-registers-0.ll
h-registers-1.ll
h-registers-2.ll
h-registers-3.ll
More h-registers tricks: folding zext nodes.
2009-05-29 01:44:43 +00:00
hidden-vis-2.ll
hidden-vis-3.ll
hidden-vis-4.ll
hidden-vis.ll
i2k.ll
i64-mem-copy.ll
i128-and-beyond.ll
i128-immediate.ll
i128-mul.ll
i128-ret.ll
i256-add.ll
iabs.ll
illegal-asm.ll
illegal-insert.ll
illegal-vector-args-return.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
imp-def-copies.ll
imul-lea-2.ll
imul-lea.ll
inline-asm-2addr.ll
inline-asm-flag-clobber.ll
inline-asm-fpstack2.ll
Fix PR4185.
2009-06-21 12:02:51 +00:00
inline-asm-fpstack3.ll
FIX PR 4459.
2009-06-29 20:29:59 +00:00
inline-asm-fpstack4.ll
Fix PR4485.
2009-06-30 16:40:03 +00:00
inline-asm-fpstack5.ll
Fix PR4485.
2009-06-30 16:40:03 +00:00
inline-asm-fpstack.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
inline-asm-modifier-n.ll
Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work.
2009-06-26 22:00:19 +00:00
inline-asm-mrv.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
inline-asm-out-regs.ll
inline-asm-pic.ll
inline-asm-q-regs.ll
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
2009-07-17 22:13:25 +00:00
inline-asm-tied.ll
Assume an inline asm might be a call, so we get
2009-07-16 22:34:45 +00:00
inline-asm-x-scalar.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
inline-asm.ll
ins_subreg_coalesce-1.ll
ins_subreg_coalesce-2.ll
ins_subreg_coalesce-3.ll
Enable the new no-SP register classes by default. This is to address
2009-08-05 17:40:24 +00:00
insertelement-copytoregs.ll
insertelement-legalize.ll
invalid-shift-immediate.ll
isel-sink2.ll
isel-sink3.ll
isel-sink.ll
Change the x86 assembly output to use tab characters to separate the
2007-07-31 20:11:57 +00:00
isint.ll
isnan2.ll
isnan.ll
ispositive.ll
iv-users-in-other-loops.ll
Revert the addition of hasNoPointerOverflow to GEPOperator.
2009-07-20 17:43:30 +00:00
jump_sign.ll
ldzero.ll
lea-2.ll
lea-3.ll
lea-4.ll
lea-neg.ll
lea-recursion.ll
lea.ll
legalizedag_vec.ll
Make the grep line in this test more specific, to avoid
2009-07-22 22:02:42 +00:00
lfence.ll
limited-prec.ll
live-out-reg-info.ll
Add an x86 peep that narrows TEST instructions to forms that use
2009-08-19 18:16:17 +00:00
local-liveness.ll
long-setcc.ll
longlong-deadload.ll
loop-hoist.ll
Use WriteAsOperand to print BasicBlock names.
2009-08-12 20:56:56 +00:00
loop-strength-reduce2.ll
loop-strength-reduce3.ll
loop-strength-reduce4.ll
loop-strength-reduce5.ll
loop-strength-reduce6.ll
loop-strength-reduce7.ll
loop-strength-reduce8.ll
loop-strength-reduce-2.ll
loop-strength-reduce-3.ll
loop-strength-reduce.ll
lsr-loop-exit-cond.ll
lsr-negative-stride.ll
lsr-sort.ll
masked-iv-safe.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
masked-iv-unsafe.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
maskmovdqu.ll
memcpy-2.ll
memcpy.ll
memmove-0.ll
memmove-1.ll
memmove-2.ll
memmove-3.ll
memmove-4.ll
memset64-on-x86-32.ll
memset-2.ll
Pass target triple string in to TargetMachine constructor.
2009-08-03 04:03:51 +00:00
memset.ll
mfence.ll
mingw-alloca.ll
one last (?) bad x86 triple test.
2009-08-12 06:49:44 +00:00
mmx-arg-passing2.ll
mmx-arg-passing.ll
Update tests.
2008-04-25 20:13:47 +00:00
mmx-arith.ll
mmx-bitcast-to-i64.ll
Use movd instead of movq
2009-08-03 05:21:05 +00:00
mmx-copy-gprs.ll
mmx-emms.ll
mmx-insert-element.ll
mmx-pinsrw.ll
mmx-punpckhdq.ll
mmx-s2v.ll
mmx-shift.ll
mmx-shuffle.ll
mmx-vzmovl-2.ll
mmx-vzmovl.ll
movfs.ll
movgs.ll
mul64.ll
mul128.ll
mul-legalize.ll
mul-remat.ll
mul-shift-reassoc.ll
multiple-return-values-cross-block.ll
multiple-return-values.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
nancvt.ll
narrow_op-1.ll
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
2009-05-28 00:35:15 +00:00
narrow_op-2.ll
Added optimization that narrow load / op / store and the 'op' is a bit twiddling instruction and its second operand is an immediate. If bits that are touched by 'op' can be done with a narrower instruction, reduce the width of the load and store as well. This happens a lot with bitfield manipulation code.
2009-05-28 00:35:15 +00:00
neg_fp.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
negate-add-zero.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
negative_zero.ll
negative-sin.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
negative-subscript.ll
nobt.ll
nofence.ll
nosse-error1.ll
nosse-error2.ll
nosse-varargs.ll
omit-label.ll
Make this test less sensitive to assembler differences.
2009-08-18 17:19:46 +00:00
opt-ext-uses.ll
optimize-max-0.ll
Re-apply r73718, now that the fix in r73787 is in, and add a
2009-06-19 23:23:27 +00:00
optimize-max-1.ll
Re-apply r73718, now that the fix in r73787 is in, and add a
2009-06-19 23:23:27 +00:00
optimize-max-2.ll
Re-apply r73718, now that the fix in r73787 is in, and add a
2009-06-19 23:23:27 +00:00
or-branch.ll
overlap-shift.ll
packed_struct.ll
peep-test-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
peep-test-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
peep-test-2.ll
peep-vector-extract-concat.ll
peep-vector-extract-insert.ll
Change all floating constants that are not exactly
2007-09-05 17:50:36 +00:00
phys_subreg_coalesce-2.ll
phys_subreg_coalesce.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pic_jumptable.ll
down with unwind info :)
2009-06-25 21:48:17 +00:00
pic-1.ll
unwind info not needed.
2009-06-24 19:48:04 +00:00
pic-2.ll
pic-3.ll
remove eh, convert to FileCheck style
2009-07-09 01:07:22 +00:00
pic-4.ll
pic-5.ll
pic-6.ll
pic-cpool.ll
pic-jtbl.ll
remove unwind info, add test for asmprinting of jump table labels with (%rip)
2009-06-26 22:16:49 +00:00
pic-load-remat.ll
pmul.ll
postalloc-coalescing.ll
pr1462.ll
pr1489.ll
pr1505.ll
pr1505b.ll
pr2177.ll
pr2182.ll
pr2326.ll
pr2623.ll
pr2656.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr2659.ll
pr2849.ll
When doing the very-late shift-and address-mode optimization,
2008-10-13 20:52:04 +00:00
pr2924.ll
pr2982.ll
pr3154.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr3216.ll
pr3241.ll
pr3243.ll
pr3244.ll
pr3250.ll
pr3317.ll
pr3366.ll
pr3457.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr3495-2.ll
pr3495.ll
Extend ScalarEvolution's multiple-exit support to compute exact
2009-06-24 01:18:18 +00:00
pr3522.ll
pre-split1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split2.ll
pre-split3.ll
pre-split4.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split5.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split6.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split7.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split8.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split9.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pre-split10.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
prefetch.ll
private-2.ll
Reapply my previous asmprinter changes now with more testing and two
2009-07-14 18:17:16 +00:00
private.ll
Add the private linkage.
2009-01-15 20:18:42 +00:00
ptrtoint-constexpr.ll
fix a problem Eli noticed where we would compile the attached ptrtoint
2009-08-01 22:25:12 +00:00
rdtsc.ll
red-zone2.ll
Add new function attribute - noredzone.
2009-06-04 22:05:33 +00:00
red-zone.ll
Change these tests to use function attributes rather than special llc
2009-08-05 16:37:27 +00:00
regpressure.ll
rem-2.ll
rem.ll
remat-constant.ll
factor some logic out into a helper function, allow remat of loads from constant
2009-06-27 04:38:55 +00:00
remat-mov-1.ll
ret-addr.ll
ret-i64-0.ll
ret-mmx.ll
rip-rel-address.ll
Fix an x86 code size regression: prefer RIP-relative addressing
2009-08-20 18:23:44 +00:00
rodata-relocs.ll
rot16.ll
rot32.ll
rot64.ll
rotate2.ll
rotate.ll
scalar_sse_minmax.ll
scalar-extract.ll
scalar-min-max-fill-operand.ll
scalarize-bitcast.ll
scev-interchange.ll
Tidy up this testcase.
2009-08-06 17:11:55 +00:00
select-no-cmov.ll
select-zero-one.ll
select.ll
setoeq.ll
setuge.ll
sext-load.ll
sext-ret-val.ll
sext-select.ll
sext-trunc.ll
sfence.ll
shift-and.ll
shift-coalesce.ll
shift-codegen.ll
shift-combine.ll
shift-double.ll
shift-folding.ll
shift-i128.ll
shift-i256.ll
shift-one.ll
shift-parts.ll
Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, and
2009-08-18 23:36:17 +00:00
shl_elim.ll
shrink-fp-const1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
shrink-fp-const2.ll
sincos.ll
small-byval-memcpy.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
smul-with-overflow-2.ll
smul-with-overflow-3.ll
smul-with-overflow.ll
soft-fp.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
split-eh-lpad-edges.ll
split-select.ll
split-vector-rem.ll
sret.ll
sse2.ll
Fix test on Linux.
2009-08-15 21:28:17 +00:00
sse3.ll
specify a target triple so global variable manglings are consistent etc.
2009-08-15 17:35:05 +00:00
sse41.ll
Add a couple more tests for the ptest intrinsics to make sure we're
2009-07-29 00:51:15 +00:00
sse42.ll
Add crc32 instruction and intrinsics. Add a new class of prefix
2009-08-08 21:55:08 +00:00
sse_reload_fold.ll
sse-align-0.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse-align-1.ll
sse-align-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse-align-3.ll
sse-align-4.ll
sse-align-5.ll
sse-align-6.ll
sse-align-7.ll
sse-align-8.ll
sse-align-9.ll
sse-align-10.ll
sse-align-11.ll
sse-align-12.ll
sse-fcopysign.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sse-load-ret.ll
Remove llvm-upgrade and update tests.
2008-02-21 07:42:26 +00:00
sse-varargs.ll
stack-align.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
stack-color-with-reg-2.ll
stack-color-with-reg.ll
Enable the new no-SP register classes by default. This is to address
2009-08-05 17:40:24 +00:00
stdarg.ll
On x86-64, for a varargs function, don't store the xmm registers to
2009-08-15 01:38:56 +00:00
store_op_load_fold2.ll
store_op_load_fold.ll
store-fp-constant.ll
store-global-address.ll
storetrunc-fp.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
stride-nine-with-base-reg.ll
stride-reuse.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
sub-with-overflow.ll
subclass-coalesce.ll
Cross RC coalescing is now on by default.
2009-07-21 00:22:59 +00:00
subreg-to-reg-0.ll
subreg-to-reg-1.ll
subreg-to-reg-2.ll
subreg-to-reg-3.ll
subreg-to-reg-4.ll
subreg-to-reg-5.ll
subreg-to-reg-6.ll
Implement support for using modeling implicit-zero-extension on x86-64
2009-04-08 00:15:30 +00:00
switch-zextload.ll
swizzle.ll
tailcall1.ll
tailcall-i1.ll
tailcall-stackalign.ll
tailcall-structret.ll
tailcall-void.ll
tailcallbyval64.ll
tailcallbyval.ll
Fix byval arguments in the fastcc calling convention. The fastcc convention
2008-12-03 01:28:04 +00:00
tailcallfp2.ll
tailcallfp.ll
tailcallpic1.ll
tailcallpic2.ll
tailcallstack64.ll
Major calling convention code refactoring.
2009-08-05 01:29:28 +00:00
test-nofold.ll
test-shrink.ll
Add an x86 peep that narrows TEST instructions to forms that use
2009-08-19 18:16:17 +00:00
testl-commute.ll
tls1.ll
no need for unwind info here.
2009-06-20 19:43:09 +00:00
tls2.ll
tls3.ll
Reimplement rip-relative addressing in the X86-64 backend. The new
2009-06-27 04:16:01 +00:00
tls4.ll
tls5.ll
tls6.ll
tls7.ll
tls8.ll
tls9.ll
tls10.ll
tls11.ll
tls12.ll
tls13.ll
tls14.ll
tls15.ll
tls-pic.ll
rename test
2009-08-07 23:57:30 +00:00
trap.ll
trunc-to-bool.ll
twoaddr-coalesce-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
twoaddr-coalesce.ll
twoaddr-delete.ll
twoaddr-pass-sink.ll
twoaddr-remat.ll
uint_to_fp-2.ll
uint_to_fp.ll
umul-with-carry.ll
umul-with-overflow.ll
Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
2009-06-16 06:58:29 +00:00
urem-i8-constant.ll
v4f32-immediate.ll
variable-sized-darwin-bzero.ll
variadic-node-pic.ll
vec_add.ll
vec_align.ll
vec_call.ll
vec_clear.ll
vec_compare.ll
add some more check for vector compares.
2009-07-08 18:51:25 +00:00
vec_ctbits.ll
vec_extract-sse4.ll
vec_extract.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_i64.ll
vec_ins_extract-1.ll
vec_ins_extract.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_insert_4.ll
vec_insert-2.ll
vec_insert-3.ll
vec_insert-5.ll
vec_insert-6.ll
Add target triples so these tests behave as expected on non-darwin hosts.
2008-07-24 18:08:01 +00:00
vec_insert-7.ll
vec_insert-8.ll
vec_insert.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_loadsingles.ll
Slightly generalize the code that handles shuffles of consecutive loads
2009-06-07 06:52:44 +00:00
vec_logical.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_return.ll
vec_select.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_set-2.ll
vec_set-3.ll
vec_set-4.ll
Add nounwind.
2008-05-07 22:59:08 +00:00
vec_set-5.ll
Slightly generalize the code that handles shuffles of consecutive loads
2009-06-07 06:52:44 +00:00
vec_set-6.ll
Slightly generalize the code that handles shuffles of consecutive loads
2009-06-07 06:52:44 +00:00
vec_set-7.ll
vec_set-8.ll
vec_set-9.ll
vec_set-A.ll
vec_set-B.ll
vec_set-C.ll
vec_set-D.ll
vec_set-E.ll
vec_set-F.ll
vec_set-G.ll
vec_set-H.ll
vec_set-I.ll
vec_set-J.ll
vec_set.ll
vec_shift2.ll
vec_shift3.ll
vec_shift.ll
vec_shuffle-3.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_shuffle-4.ll
vec_shuffle-5.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_shuffle-6.ll
vec_shuffle-7.ll
vec_shuffle-8.ll
vec_shuffle-9.ll
vec_shuffle-10.ll
vec_shuffle-11.ll
vec_shuffle-14.ll
vec_shuffle-15.ll
vec_shuffle-16.ll
vec_shuffle-17.ll
vec_shuffle-18.ll
The Linux ABI emits an extra "movl %esp, %ebp" in function prologue and
2008-05-26 20:18:56 +00:00
vec_shuffle-19.ll
vec_shuffle-20.ll
vec_shuffle-22.ll
vec_shuffle-23.ll
vec_shuffle-24.ll
vec_shuffle-25.ll
vec_shuffle-26.ll
vec_shuffle-27.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_shuffle-28.ll
merge a bunch more sse3 tests into sse3.ll
2009-08-15 17:21:44 +00:00
vec_shuffle-30.ll
vec_shuffle-31.ll
merge a bunch more sse3 tests into sse3.ll
2009-08-15 17:21:44 +00:00
vec_shuffle-34.ll
merge a bunch more sse3 tests into sse3.ll
2009-08-15 17:21:44 +00:00
vec_shuffle-35.ll
vec_shuffle-36.ll
vec_shuffle.ll
vec_splat-2.ll
vec_splat-3.ll
vec_splat-4.ll
vec_splat.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_ss_load_fold.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_zero_cse.ll
vec_zero-2.ll
vec_zero.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vector-intrinsics.ll
vector-rem.ll
vector-variable-idx.ll
vector.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vfcmp.ll
eliminate the v[if]cmp versions of these tests, now that [if]cmp+sext works.
2009-07-08 00:49:35 +00:00
volatile.ll
vortex-bug.ll
vshift_scalar.ll
vshift_split2.ll
vshift_split.ll
Make x86 test actually test x86 code generation. Fix the
2009-08-22 03:13:10 +00:00
vshift-1.ll
vshift-2.ll
vshift-3.ll
vshift-4.ll
weak.ll
wide-integer-fold.ll
Fix a few places in DAGCombiner that were creating all-ones-bits
2009-08-06 09:18:59 +00:00
widen_arith-1.ll
widen_arith-2.ll
widen_arith-3.ll
widen_arith-4.ll
Added some basic test cases for r61209
2008-12-18 20:05:58 +00:00
widen_arith-5.ll
widen_arith-6.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
widen_cast-1.ll
widen_cast-2.ll
widen_cast-3.ll
widen_cast-4.ll
Fix test to account for legalization changes; I think this ends up
2009-05-23 13:15:11 +00:00
widen_cast-5.ll
widen_cast-6.ll
widen_conv-1.ll
widen_conv-2.ll
widen_conv-3.ll
widen_conv-4.ll
widen_select-1.ll
widen_shuffle-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
widen_shuffle-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
x86-64-and-mask.ll
x86-64-arg.ll
x86-64-asm.ll
Remove llvm-upgrade and update tests.
2008-02-21 07:42:26 +00:00
x86-64-dead-stack-adjust.ll
x86-64-disp.ll
x86-64-frameaddr.ll
x86-64-gv-offset.ll
x86-64-malloc.ll
x86-64-mem.ll
x86-64-pic-1.ll
x86-64-pic-2.ll
x86-64-pic-3.ll
x86-64-pic-4.ll
x86-64-pic-5.ll
x86-64-pic-6.ll
remove some unneeded eh info.
2009-06-27 04:07:31 +00:00
x86-64-pic-7.ll
remove some unneeded eh info.
2009-06-27 04:07:31 +00:00
x86-64-pic-8.ll
x86-64-pic-9.ll
remove some unneeded eh info.
2009-06-27 04:07:31 +00:00
x86-64-pic-10.ll
x86-64-pic-11.ll
Add nounwind to this test.
2009-08-01 19:11:04 +00:00
x86-64-ret0.ll
x86-64-shortint.ll
x86-64-sret-return.ll
Enable cross register class coalescing.
2009-07-18 02:10:10 +00:00
x86-64-varargs.ll
x86-frameaddr2.ll
x86-frameaddr.ll
x86-store-gv-addr.ll
Revert r72734. The Darwin assembler doesn't support the static
2009-06-03 00:37:20 +00:00
xmm-r64.ll
xor_not.ll
xor-undef.ll
xorl.ll
zero-remat.ll
convert a test to "FileCheck" style.
2009-07-08 18:48:24 +00:00
zext-inreg-0.ll
zext-inreg-1.ll
