Akira Hatanaka 3c9c1ab7b7 [mips] Set flag isAsCheapAsAMove flag on instruction LUi. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167345 91177308-0d34-0410-b5e6-96231b3b80d8		2012-11-03 00:26:02 +00:00
..
2008-06-05-Carry.ll
2008-07-03-SRet.ll
2008-07-06-fadd64.ll
2008-07-07-Float2Int.ll
2008-07-07-FPExtend.ll
2008-07-07-IntDoubleConvertions.ll
2008-07-15-InternalConstant.ll
2008-07-15-SmallSection.ll
2008-07-16-SignExtInReg.ll
2008-07-22-Cstpool.ll
2008-07-23-fpcmp.ll	Fix the remaining TCL-style quotes found in the testsuite. This is	2012-07-02 19:09:46 +00:00
2008-07-29-icmp.ll	Fix the remaining TCL-style quotes found in the testsuite. This is	2012-07-02 19:09:46 +00:00
2008-07-31-fcopysign.ll
2008-08-01-AsmInline.ll
2008-08-03-fabs64.ll
2008-08-03-ReturnDouble.ll
2008-08-04-Bitconvert.ll
2008-08-06-Alloca.ll
2008-08-07-CC.ll
2008-08-07-FPRound.ll
2008-08-08-bswap.ll
2008-08-08-ctlz.ll
2008-10-13-LegalizerBug.ll
2008-11-10-xint_to_fp.ll
2009-11-16-CstPoolLoad.ll
2010-04-07-DbgValueOtherTargets.ll
2010-07-20-Switch.ll
2010-11-09-CountLeading.ll
2010-11-09-Mul.ll
2011-05-26-BranchKillsVreg.ll
addc.ll
alloca16.ll	Implement ADJCALLSTACKUP and ADJCALLSTACKDOWN	2012-10-31 05:21:10 +00:00
alloca.ll	Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.	2012-07-31 20:54:48 +00:00
analyzebranch.ll
and1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
asm-large-immediate.ll
atomic.ll	[mips] Fix bug in test case. Disable machine LICM to prevent instruction from	2012-11-02 21:46:42 +00:00
atomicops.ll	Expand all atomic ops for mips16.	2012-10-29 16:16:54 +00:00
blockaddr.ll
br-jmp.ll
brconeq.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconeqk.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconeqz.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconge.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brcongt.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconle.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconlt.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconne.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconnek.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brconnez.ll	Add conditional branch instructions and their patterns.	2012-10-17 22:29:54 +00:00
brdelayslot.ll	Disable Mips' delay slot filler when optimization level is O0.	2012-08-24 20:40:15 +00:00
brind.ll	Implement brind operator for mips16.	2012-10-28 23:08:07 +00:00
bswap.ll
buildpairextractelementf64.ll
check-noat.ll	[mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directive	2012-11-02 20:56:25 +00:00
cmov.ll
constantfp0.ll
cprestore.ll
div_rem.ll	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
div.ll	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
divrem.ll
divu_remu.ll	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
divu.ll	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
double2int.ll
dsp-r1.ll	MIPS DSP: add operands to make sure instruction strings are being matched.	2012-09-28 21:23:16 +00:00
dsp-r2.ll	MIPS DSP: add operands to make sure instruction strings are being matched.	2012-09-28 21:23:16 +00:00
eh.ll
extins.ll
fabs.ll	Add test triples to fix win32 failures. Revert workaround from r161292.	2012-08-08 20:31:37 +00:00
fastcc.ll
fcopysign-f32-f64.ll
fcopysign.ll
fmadd1.ll
fneg.ll
fp-indexed-ls.ll	Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as	2012-07-31 18:16:49 +00:00
fp-spill-reload.ll
fpbr.ll
frame-address.ll
frem.ll
global-address.ll
global-pointer-reg.ll
gprestore.ll
helloworld.ll	Change mips16 delay slot jumps to non delay slot forms by default.	2012-10-30 00:54:49 +00:00
i32k.ll	implement large (>16 bit) constant loading.	2012-10-26 03:09:34 +00:00
i64arg.ll	Eliminate the stack slot used to save the global base register.	2012-07-25 03:16:47 +00:00
imm.ll
indirectcall.ll
init-array.ll	Fix UseInitArray option for MIPS target.	2012-09-05 06:17:17 +00:00
inlineasm64.ll
inlineasm_constraint.ll
inlineasm-cnstrnt-bad-I-1.ll
inlineasm-cnstrnt-bad-J.ll
inlineasm-cnstrnt-bad-K.ll
inlineasm-cnstrnt-bad-L.ll
inlineasm-cnstrnt-bad-N.ll
inlineasm-cnstrnt-bad-O.ll
inlineasm-cnstrnt-bad-P.ll
inlineasm-cnstrnt-reg64.ll
inlineasm-cnstrnt-reg.ll
inlineasm-operand-code.ll	Mips specific inline asm operand modifier 'M':	2012-07-18 06:41:36 +00:00
inlineasmmemop.ll
internalfunc.ll
largeimm1.ll	[mips] Use register number instead of name to print register $AT.	2012-11-02 21:26:03 +00:00
largeimmprinting.ll	[mips] Stop reserving register AT and use register scavenger when a scratch	2012-11-03 00:05:43 +00:00
lb1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
lbu1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
lh1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
lhu1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
lit.local.cfg
llcarry.ll	Implement carry for subtract/add for mips16	2012-10-26 04:46:26 +00:00
load-store-left-right.ll
longbranch.ll	[mips] Use register number instead of name to print register $AT.	2012-11-02 21:26:03 +00:00
machineverifier.ll
madd-msub.ll
memcpy.ll
mips64-fp-indexed-ls.ll	Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as	2012-07-31 18:16:49 +00:00
mips64-sret.ll	[mips] Make sure sret argument is returned in register V0.	2012-10-24 02:10:54 +00:00
mips64countleading.ll
mips64directive.ll
mips64ext.ll
mips64extins.ll
mips64fpimm0.ll
mips64fpldst.ll
mips64imm.ll
mips64instrs.ll
mips64intldst.ll
mips64lea.ll
mips64load-store-left-right.ll
mips64muldiv.ll
mips64shift.ll
mipslopat.ll
misha.ll	Implement patterns for extloadi8 and extloadi16	2012-10-29 19:39:04 +00:00
mul.ll	Patch for integer multiply, signed/unsigned, long/long long.	2012-10-05 18:27:54 +00:00
mulll.ll	Patch for integer multiply, signed/unsigned, long/long long.	2012-10-05 18:27:54 +00:00
mulull.ll	Patch for integer multiply, signed/unsigned, long/long long.	2012-10-05 18:27:54 +00:00
neg1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
not1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
null.ll	Change mips16 delay slot jumps to non delay slot forms by default.	2012-10-30 00:54:49 +00:00
o32_cc_byval.ll	[mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in the	2012-10-27 00:44:39 +00:00
o32_cc_vararg.ll	Set transient stack alignment in constructor of MipsFrameLowering and re-enable	2012-08-02 18:15:13 +00:00
o32_cc.ll
or1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
private.ll
ra-allocatable.ll	Make register Mips::RA allocatable if not in mips16 mode.	2012-07-10 00:19:06 +00:00
rdhwr-directives.ll	test case for r159770.	2012-07-05 19:29:31 +00:00
rem.ll	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
remat-immed-load.ll	[mips] Set flag isAsCheapAsAMove flag on instruction LUi.	2012-11-03 00:26:02 +00:00
remu.ll	Div, Rem int/unsigned int	2012-10-12 02:01:09 +00:00
return_address.ll	Lower RETURNADDR node in Mips backend.	2012-07-11 00:53:32 +00:00
return-vector-float4.ll	Test case for r162008.	2012-08-16 03:48:41 +00:00
return-vector.ll	Implement MipsTargetLowering::CanLowerReturn.	2012-10-10 01:27:09 +00:00
rotate.ll
sb1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
select.ll
selectcc.ll	Fix function select_cc_f32 in test/CodeGen/Mips/selectcc.ll.	2012-07-16 23:56:51 +00:00
selpat.ll	implement mips16 patterns for select nodes	2012-10-25 21:33:30 +00:00
seteq.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
seteqz.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setge.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setgek.ll	fix test setgek.ll so that it will not give false "make check"	2012-10-26 01:29:42 +00:00
setle.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setlt.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setltk.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setne.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setuge.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setugt.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setule.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setult.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
setultk.ll	implement setXX patterns	2012-10-23 01:35:48 +00:00
sh1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
shift-parts.ll
sitofp-selectcc-opt.ll	Test case for r160036.	2012-07-11 19:50:46 +00:00
sll1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
sll2.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
small-section-reserve-gp.ll	In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its	2012-08-24 20:21:49 +00:00
sra1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
sra2.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
srl1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
srl2.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
stacksize.ll
stchar.ll	This patch is for the implementation of mips16 complex pattern addr16.	2012-10-28 06:02:37 +00:00
stldst.ll	checking test case for r164811. was an omission to not check this in. this was already approved	2012-10-01 21:35:06 +00:00
sub1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
sub2.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
swzero.ll	Don't modify MO while use_iterator is still pointing to it.	2012-08-09 22:08:24 +00:00
tailcall.ll	Test case for r167039. Check that tail-call optimization is disabled for	2012-10-31 17:25:23 +00:00
tls16_2.ll	Implement MipsHi for mips16	2012-10-27 00:57:14 +00:00
tls16.ll	implement mips16 tls global addr	2012-10-26 22:57:32 +00:00
tls-alias.ll	Add option disable-mips-delay-filler. Turn on mips' delay slot filler by	2012-08-22 02:51:28 +00:00
tls-models.ll
tls.ll	Add option disable-mips-delay-filler. Turn on mips' delay slot filler by	2012-08-22 02:51:28 +00:00
uitofp.ll	Fix bug 13532.	2012-08-28 02:12:42 +00:00
ul1.ll	Handled unaligned load/stores properly in Mips16	2012-09-15 01:02:03 +00:00
unalignedload.ll
vector-load-store.ll	MIPS DSP: add vector load/store patterns.	2012-09-27 01:50:59 +00:00
weak.ll
xor1.ll	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
zeroreg.ll