Chandler Carruth 4177e6fff5 Convert all tests using TCL-style quoting to use shell-style quoting. ... This was done through the aid of a terrible Perl creation. I will not paste any of the horrors here. Suffice to say, it require multiple staged rounds of replacements, state carried between, and a few nested-construct-parsing hacks that I'm not proud of. It happens, by luck, to be able to deal with all the TCL-quoting patterns in evidence in the LLVM test suite. If anyone is maintaining large out-of-tree test trees, feel free to poke me and I'll send you the steps I used to convert things, as well as answer any painful questions etc. IRC works best for this type of thing I find. Once converted, switch the LLVM lit config to use ShTests the same as Clang. In addition to being able to delete large amounts of Python code from 'lit', this will also simplify the entire test suite and some of lit's architecture. Finally, the test suite runs 33% faster on Linux now. ;] For my 16-hardware-thread (2x 4-core xeon e5520): 36s -> 24s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159525 91177308-0d34-0410-b5e6-96231b3b80d8		2012-07-02 12:47:22 +00:00
..
arm-tests.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
basic-arm-instructions.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
fp-encoding.txt	Fixed disassembler for vstm/vldm ARM VFP instructions.	2012-05-03 16:38:40 +00:00
invalid-Bcc-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-BFI-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-CPS2p-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-CPS3p-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-DMB-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-DSB-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-IT-CBNZ-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-IT-CC15.txt	Change ARMInstPrinter::printPredicateOperand() so it will not abort if it	2012-03-01 22:13:02 +00:00
invalid-IT-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-LDC-form-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-LDM-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-LDR_POST-arm.txt	Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.	2011-08-09 20:55:18 +00:00
invalid-LDR_PRE-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-LDRB_POST-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-LDRD_PRE-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-LDRrs-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-MCR-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-MOVr-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-MOVs-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-MOVs-LSL-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-MOVTi16-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-MRRC2-arm.txt	Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.	2012-04-18 13:12:50 +00:00
invalid-MSRi-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-RFEorLDMIA-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-SBFX-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-SMLAD-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-SRS-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-STMIA_UPD-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-SXTB-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2Bcc-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2LDRBT-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2LDREXD-thumb.txt	Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.	2011-09-07 19:42:28 +00:00
invalid-t2LDRSHi8-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2LDRSHi12-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2PUSH-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2STR_POST-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-t2STRD_PRE-thumb.txt	Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.	2011-09-07 19:42:28 +00:00
invalid-t2STREXB-thumb.txt	Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.	2011-09-07 19:42:28 +00:00
invalid-t2STREXD-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-UMAAL-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-VLD1DUPq8_UPD-arm.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
invalid-VLD3DUPd32_UPD-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-VLDMSDB_UPD-arm.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-VQADD-arm.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
invalid-VST1d8Twb_register-thumb.txt	Convert all tests using TCL-style quoting to use shell-style quoting.	2012-07-02 12:47:22 +00:00
invalid-VST2b32_UPD-arm.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
ldrd-armv4.txt	Added fix in TableGen instruction decoder generation. The decoder now breaks for every leaf node.	2012-04-02 15:20:39 +00:00
lit.local.cfg	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
memory-arm-instructions.txt	Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact.	2011-08-15 20:51:32 +00:00
neon-tests.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
neon.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
neont2.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
thumb1.txt	Correct decoder for T1 conditional B encoding	2012-06-06 09:12:53 +00:00
thumb2.txt	Specify cpu to unbreak tests.	2012-04-26 01:38:10 +00:00
thumb-MSR-MClass.txt	Check in a patch that has already been code reviewed by Owen that I'd forgotten to commit.	2011-09-28 14:21:38 +00:00
thumb-printf.txt	Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.	2011-09-07 19:42:28 +00:00
thumb-tests.txt	Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bits	2012-05-03 22:41:56 +00:00
unpredictable-ADC-arm.txt	Added support for unpredictable ADC/SBC instructions on ARM, and also fixed some corner cases involving the PC register as an operand for these instructions.	2012-04-05 16:19:29 +00:00
unpredictable-ADDREXT3-arm.txt	Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.	2012-03-22 14:14:49 +00:00
unpredictable-AExtI-arm.txt	Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.	2012-05-11 09:28:27 +00:00
unpredictable-AI1cmp-arm.txt	Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM instructions in the disassembler.	2012-04-18 12:48:43 +00:00
unpredictable-LDR-arm.txt	Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDRSHT instruction on ARM	2012-03-22 13:24:43 +00:00
unpredictable-LDRD-arm.txt	Added soft fail checks for the disassembler when decoding some corner cases of the STRD, STRH, LDRD, LDRH, LDRSH and LDRSB instructions on ARM.	2012-03-22 14:14:49 +00:00
unpredictable-LSL-regform.txt	The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.	2012-03-20 15:54:56 +00:00
unpredictable-MRRC2-arm.txt	Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the disassembler. Since the upredicability conditions are complex, C++ code was added to handle them.	2012-04-18 13:12:50 +00:00
unpredictable-MRS-arm.txt	Fix the bahavior of the disassembler when decoding unpredictable mrs instructions on ARM. Now the diasassembler emmits warnings instead of errors.	2012-04-18 14:09:07 +00:00
unpredictable-MUL-arm.txt	Added soft fail cases for the disassembler when decoding MUL instructions on ARM.	2012-03-22 13:14:39 +00:00
unpredictable-RSC-arm.txt	The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.	2012-03-20 15:54:56 +00:00
unpredictable-SEL-arm.txt	Added the missing bit definition for the 4th bit of the STR (post reg) instruction. It is now set to 0. The patch also sets the unpredictable mask for SEL and SXTB-type instructions.	2012-05-11 09:28:27 +00:00
unpredictable-SHADD16-arm.txt	Added support for handling unpredictable arithmetic instructions on ARM.	2012-04-05 16:13:15 +00:00
unpredictable-SSAT-arm.txt	The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.	2012-03-20 15:54:56 +00:00
unpredictable-STRBrs-arm.txt	The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.	2012-03-20 15:54:56 +00:00
unpredictable-swp-arm.txt	Added support for disassembling unpredictable swp/swpb ARM instructions.	2012-04-18 14:18:57 +00:00
unpredictable-UQADD8-arm.txt	The ARM instructions that have an unpredictable behavior when the pc register operand is given now fail with soft fail. Modified the regression tests to reflect this.	2012-03-20 15:54:56 +00:00
unpredictables-thumb.txt	Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.	2012-02-09 10:56:31 +00:00
vfp4.txt	Fix a number of problems with ARM fused multiply add/subtract instructions.	2012-04-11 00:13:00 +00:00