llvm-6502

128bit_load_store.ll

[AArch64 NEON] Support poly128_t and implement relevant intrinsic.

2013-12-10 06:48:35 +00:00

adc.ll

…

addsub_ext.ll

…

addsub-shifted.ll

…

addsub.ll

…

alloca.ll

…

analyze-branch.ll

…

assertion-rc-mismatch.ll

Fix an over-constrained assertion in MachineFunction::addLiveIn.

2013-12-12 00:15:47 +00:00

atomic-ops-not-barriers.ll

…

atomic-ops.ll

…

basic-pic.ll

…

bitfield-insert-0.ll

…

bitfield-insert.ll

…

bitfield.ll

…

blockaddress.ll

…

bool-loads.ll

…

breg.ll

…

callee-save.ll

…

code-model-large-abs.ll

…

compare-branch.ll

…

complex-copy-noneon.ll

…

concatvector-v8i8-bug.ll

[AArch64] Removed unused i8 type from FPR8 register class.

2014-01-24 22:36:53 +00:00

cond-sel.ll

…

cpus.ll

llvm/test/CodeGen/AArch64/cpus.ll: Tweak to use -mtriple=aarch64-unknown-unknown, or this would crash for targeting pecoff like *-mingw32.

2014-02-13 11:06:23 +00:00

directcond.ll

…

dp1.ll

…

dp2.ll

…

dp-3source.ll

…

extern-weak.ll

…

extract.ll

…

fastcc-reserved.ll

…

fastcc.ll

…

fcmp.ll

…

fcvt-fixed.ll

…

fcvt-int.ll

Fix broken CHECK lines

2014-02-16 07:31:05 +00:00

flags-multiuse.ll

…

floatdp_1source.ll

…

floatdp_2source.ll

…

fp128-folding.ll

…

fp128.ll

…

fp-cond-sel.ll

…

fp-dp3.ll

[AArch64] Check fmul node single use in fused multiply patterns

2013-12-24 00:47:29 +00:00

fpimm.ll

…

frameaddr.ll

…

func-argpassing.ll

…

func-calls.ll

…

global-alignment.ll

…

got-abuse.ll

…

i128-align.ll

…

illegal-float-ops.ll

…

init-array.ll

Make sure -use-init-array has intended effect on all AArch64 ELF targets, not just linux.

2014-01-10 13:41:49 +00:00

inline-asm-constraints-badI.ll

…

inline-asm-constraints-badK2.ll

…

inline-asm-constraints-badK.ll

…

inline-asm-constraints-badL.ll

…

inline-asm-constraints.ll

Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call

2014-02-13 14:44:26 +00:00

inline-asm-modifiers.ll

Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call

2014-02-13 14:44:26 +00:00

jump-table.ll

…

large-consts.ll

…

large-frame.ll

…

ldst-regoffset.ll

…

ldst-unscaledimm.ll

…

ldst-unsignedimm.ll

…

lit.local.cfg

…

literal_pools.ll

…

local_vars.ll

…

logical_shifted_reg.ll

…

logical-imm.ll

…

mature-mc-support.ll

Specify a triple. MachO AArch64 support is missing.

2014-02-13 15:30:06 +00:00

movw-consts.ll

…

movw-shift-encoding.ll

…

mul-lohi.ll

AArch64: don't try to handle [SU]MUL_LOHI nodes

2014-01-14 22:53:22 +00:00

neon-2velem-high.ll

Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends.

2013-12-03 01:29:32 +00:00

neon-2velem.ll

[AArch64]Fix a problem that the register order of fmls/fmla by element is incorrect.

2013-12-25 07:12:34 +00:00

neon-3vdiff.ll

[AArch64 NEON] Support poly128_t and implement relevant intrinsic.

2013-12-10 06:48:35 +00:00

neon-aba-abd.ll

Fix pattern match for movi with 0D result

2013-12-09 19:29:14 +00:00

neon-across.ll

[AArch64] Refactor NEON floating-point Max/Min/Maxnm/Minnm across vector AArch64

2013-12-11 23:21:25 +00:00

neon-add-pairwise.ll

[AArch64]Add missing pair intrinsics such as:

2013-12-09 03:51:42 +00:00

neon-add-sub.ll

[AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types.

2014-02-13 05:42:33 +00:00

neon-bitcast.ll

[AArch64] Removed unnecessary copy patterns with v1fx types.

2013-12-12 15:46:29 +00:00

neon-bitwise-instructions.ll

Teach the DAGCombiner how to fold 'vselect' dag nodes according

2014-01-08 18:33:04 +00:00

neon-bsl.ll

[AArch64] Added vselect patterns with float and double types

2014-01-23 19:18:57 +00:00

neon-compare-instructions.ll

Implement aarch64 neon instruction class SIMD misc.

2013-11-14 02:44:13 +00:00

neon-copy.ll

[AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR32 registers in copyPhysReg.

2014-02-10 03:16:22 +00:00

neon-copyPhysReg-tuple.ll

[AArch64]Add support to copy D tuples such as DPair/DTriple/DQuad and Q tuples such as QPair/QTriple/QQuad. There is no test case for D tuple as the original test cases are too large. As the copy of the D tuple is similar to the Q tuple, the correctness can be guaranteed.

2014-01-07 10:00:03 +00:00

neon-crypto.ll

AArch64 & ARM: refactor crypto intrinsics to take scalars

2014-02-03 17:27:49 +00:00

neon-diagnostics.ll

AArch64: The pattern match should check the range of the immediate value.

2013-11-29 02:11:22 +00:00

neon-extract.ll

[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.

2014-01-21 01:48:52 +00:00

neon-facge-facgt.ll

ARM & AArch64: merge NEON absolute compare intrinsics

2014-02-04 14:55:42 +00:00

neon-fma.ll

[AArch64] Check fmul node single use in fused multiply patterns

2013-12-24 00:47:29 +00:00

neon-fpround_f128.ll

[AArch64 NEON] Add test case for vector FP_ROUND.

2014-01-26 02:23:33 +00:00

neon-frsqrt-frecp.ll

…

neon-halving-add-sub.ll

…

neon-load-store-v1i32.ll

[AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.

2014-01-17 06:23:30 +00:00

neon-max-min-pairwise.ll

[AArch64]Add missing pair intrinsics such as:

2013-12-09 03:51:42 +00:00

neon-max-min.ll

…

neon-misc-scalar.ll

Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends.

2013-12-03 01:33:52 +00:00

neon-misc.ll

[AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.

2014-01-17 05:52:35 +00:00

neon-mla-mls.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-mov.ll

[AArch64 NEON]Implment loading vector constant form constant pool.

2013-12-18 06:26:04 +00:00

neon-mul-div.ll

[AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types.

2014-02-13 05:42:33 +00:00

neon-or-combine.ll

[AArch64] Fix assertion failure caused by an invalid comparison between APInt values.

2014-01-13 16:51:00 +00:00

neon-perm.ll

[AArch64 NEON] Add more scenarios to use perm instructions when lowering shuffle_vector

2014-01-13 01:56:29 +00:00

neon-rounding-halving-add.ll

…

neon-rounding-shift.ll

…

neon-saturating-add-sub.ll

…

neon-saturating-rounding-shift.ll

…

neon-saturating-shift.ll

…

neon-scalar-abs.ll

…

neon-scalar-add-sub.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-by-elem-fma.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-by-elem-mul.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-compare.ll

ARM & AArch64: merge NEON absolute compare intrinsics

2014-02-04 14:55:42 +00:00

neon-scalar-copy.ll

For AArch64 Neon, simplify scalar dup by lane0 for fp.

2013-12-30 02:44:35 +00:00

neon-scalar-cvt.ll

[AArch64] Refactor the NEON signed/unsigned floating-point convert to fixed-point

2013-12-10 21:33:56 +00:00

neon-scalar-ext.ll

Improve pattern match from v1i8 to v1i32 for AArch64 Neon.

2014-01-26 04:55:53 +00:00

neon-scalar-extract-narrow.ll

…

neon-scalar-fabd.ll

[AArch64] Refactor the NEON floating-point absolute difference LLVM AArch64

2013-12-10 21:33:59 +00:00

neon-scalar-fcvt.ll

[AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so

2013-12-10 16:11:39 +00:00

neon-scalar-fp-compare.ll

[AArch64]The compare to zero intrinsics should be implemented by 'icmp/fcmp' and 'sext' not 'zext'. Modify the test cases.

2013-12-23 02:42:10 +00:00

neon-scalar-mul.ll

Implemented Neon scalar by element intrinsics.

2013-11-21 07:37:04 +00:00

neon-scalar-neg.ll

…

neon-scalar-recip.ll

[AArch64] Refactor the NEON scalar floating-point reciprocal step and

2013-12-11 21:03:43 +00:00

neon-scalar-reduce-pairwise.ll

[AArch64] Refactor the NEON scalar reduce pairwise intrinsics, so that they use

2013-12-09 22:47:38 +00:00

neon-scalar-rounding-shift.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-saturating-add-sub.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-saturating-rounding-shift.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-saturating-shift.ll

Fix Incorrect CHECK message [0-31]+ in test case.

2013-12-12 02:19:13 +00:00

neon-scalar-shift-imm.ll

AArch64: The pattern match should check the range of the immediate value.

2013-11-29 02:11:22 +00:00

neon-scalar-shift.ll

Add missing pattern matches to support ACLE intrinsics of AArch64 NEON.

2013-12-25 01:22:51 +00:00

neon-select_cc.ll

[AArch64 NEON] Fix a bug to avoid using floating type as condition type in lowering SELECT_CC.

2014-02-14 09:41:15 +00:00

neon-shift-left-long.ll

Fix a bug in DAGcombiner about zero-extend after setcc.

2013-12-30 02:05:13 +00:00

neon-shift.ll

…

neon-shl-ashr-lshr.ll

[AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 types.

2014-02-13 05:42:33 +00:00

neon-simd-ldst-multi-elem.ll

Fix the bugs about AArch64 Load/Store vector types and bitcast between i64 and vector types.

2013-11-22 08:47:22 +00:00

neon-simd-ldst-one.ll

Add missing pattern matches to support ACLE intrinsics of AArch64 NEON.

2013-12-25 01:22:51 +00:00

neon-simd-ldst.ll

For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64.

2013-12-05 02:12:01 +00:00

neon-simd-post-ldst-multi-elem.ll

Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.

2013-11-18 06:31:53 +00:00

neon-simd-post-ldst-one.ll

Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.

2013-11-19 02:17:05 +00:00

neon-simd-shift.ll

[AArch64]Add missing floating point convert, round and misc intrinsics.

2013-12-03 06:06:55 +00:00

neon-simd-tbl.ll

Implement AArch64 NEON instruction set AdvSIMD (table).

2013-11-14 01:57:32 +00:00

neon-simd-vget.ll

For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG.

2013-11-22 02:45:13 +00:00

neon-spill-fpr8-fpr16.ll

[AArch64]Add support for spilling FPR8/FPR16.

2014-02-13 02:36:58 +00:00

neon-truncStore-extLoad.ll

[AArch64]Pattern match failures for truncate store and extend load

2013-12-09 03:34:08 +00:00

neon-v1i1-setcc.ll

[AArch64]Fix the assertion failure caused by "v1i1 SETCC" DAG node.

2014-02-14 02:21:56 +00:00

neon-vector-list-spill.ll

[AArch64]Add support to spill/fill D tuples such as DPair/DTriple/DQuad. There is no test cases for D tuple as the original test cases are too large. As the spill/fill of the D tuple is similar to the Q tuple, the correctness can be guaranteed.

2014-01-07 10:50:43 +00:00

pic-eh-stubs.ll

…

regress-bitcast-formals.ll

…

regress-f128csel-flags.ll

…

regress-fp128-livein.ll

…

regress-tail-livereg.ll

…

regress-tblgen-chains.ll

…

regress-w29-reserved-with-fp.ll

…

regress-wzr-allocatable.ll

…

returnaddr.ll

…

setcc-takes-i32.ll

…

sext_inreg.ll

For AArch64, lowering sext_inreg and generate optimized code by using SXTL.

2014-01-15 05:08:01 +00:00

sibling-call.ll

…

sincos-expansion.ll

…

sincospow-vector-expansion.ll

[AArch64] Expanded sin, cos, pow with FP vector types inputs

2014-02-18 20:31:05 +00:00

tail-call.ll

…

tls-dynamic-together.ll

…

tls-dynamics.ll

…

tls-execs.ll

…

tst-br.ll

…

variadic.ll

Fix a typo about lowering AArch64 va_copy.

2014-02-18 02:37:42 +00:00

zero-reg.ll

…