6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-09-01 19:29:22 +00:00
Code Issues Projects Releases Wiki Activity
df74b86e1e
llvm-6502/test/CodeGen/R600
History
Tom Stellard df74b86e1e R600: Fix calculation of stack offset in AMDGPUFrameLowering 
We weren't computing structure size correctly and we were relying on
the original alloca instruction to compute the offset, which isn't
always reliable.

Reviewed-by: Vincent Lejeune <vljn@ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183568 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-07 20:52:05 +00:00
..
128bit-kernel-args.ll R600: Add support for 128-bit parameters 2013-02-13 22:05:20 +00:00
add.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
alu-split.ll R600: use native for alu 2013-04-30 00:14:38 +00:00
and.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
bfe_uint.ll R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns 2013-05-10 02:09:45 +00:00
bfi_int.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
call_fs.ll R600: Add a test for r183108 2013-06-04 15:03:35 +00:00
cf_end.ll R600: Stop emitting the instruction type byte before each instruction 2013-05-06 17:50:44 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
disconnected-predset-break-bug.ll R600: use native for alu 2013-04-30 00:14:38 +00:00
dot4-folding.ll R600: Const/Neg/Abs can be folded to dot4 2013-06-04 23:17:15 +00:00
elf.ll R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTE 2013-04-26 18:32:24 +00:00
elf.r600.ll R600: Emit config values in register / value pairs 2013-05-06 17:50:51 +00:00
fabs.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fadd.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fcmp-cnd.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
fcmp-cnde-int-args.ll R600: Improve custom lowering of select_cc 2013-03-08 15:37:09 +00:00
fcmp.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
fdiv.ll R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
fetch-limits.r600.ll R600: Fix the fetch limits for R600 generation GPUs 2013-06-07 20:28:55 +00:00
fetch-limits.r700+.ll R600: Fix the fetch limits for R600 generation GPUs 2013-06-07 20:28:55 +00:00
floor.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fmad.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fmax.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fmin.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fmul.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
fmul.v4f32.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
fp_to_sint.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
fp_to_uint.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
fsub.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
i8-to-double-to-float.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
icmp-select-sete-reverse-args.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
imm.ll R600/SI: Add support for buffer stores v2 2013-04-05 23:31:51 +00:00
indirect-addressing.ll R600: Fix calculation of stack offset in AMDGPUFrameLowering 2013-06-07 20:52:05 +00:00
jump-address.ll R600: Reorganize lit tests and document how they should be organized 2013-04-19 02:10:53 +00:00
kcache-fold.ll R600: Emit CF_ALU and use true kcache register. 2013-04-01 21:47:42 +00:00
legalizedag-bug-expand-setcc.ll LegalizeDAG: Respect the result of TLI.getBooleanContents() when expanding SETCC 2013-03-08 15:37:02 +00:00
lit.local.cfg Add R600 backend 2012-12-11 21:25:42 +00:00
literals.ll R600: Signed literals are 64bits wide 2013-05-02 21:53:03 +00:00
llvm.AMDGPU.imax.ll R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
llvm.AMDGPU.imin.ll R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
llvm.AMDGPU.mul.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
llvm.AMDGPU.tex.ll R600: Swizzle texture/export instructions 2013-06-04 15:04:53 +00:00
llvm.AMDGPU.trunc.ll R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
llvm.AMDGPU.umax.ll R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
llvm.AMDGPU.umin.ll R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
llvm.cos.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
llvm.pow.ll R600: Schedule copy from phys register at beginning of block 2013-06-05 20:27:35 +00:00
llvm.SI.fs.interp.constant.ll R600/SI: Add processor types for each SI variant 2013-04-05 23:31:35 +00:00
llvm.SI.imageload.ll R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsics 2013-05-08 13:07:29 +00:00
llvm.SI.resinfo.ll R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsics 2013-05-08 13:07:29 +00:00
llvm.SI.sample.ll R600/SI: dynamical figure out the reg class of MIMG 2013-04-10 08:39:16 +00:00
llvm.sin.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
load-input-fold.ll R600: Lower int_load_input to copyFromReg instead of Register node 2013-05-17 16:51:06 +00:00
load.ll R600/SI: Add support for global loads 2013-06-03 17:39:43 +00:00
loop-address.ll TBAA: remove !tbaa from testing cases if not used. 2013-04-30 17:52:57 +00:00
lshl.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
lshr.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
mul.ll R600: Expand MUL for v4i32/v2i32 2013-05-10 02:09:34 +00:00
mulhu.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
or.ll R600: Expand vector or, shl, srl, and xor nodes 2013-05-03 17:21:31 +00:00
predicates.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
pv.ll R600: use capital letter for PV channel 2013-06-03 15:44:35 +00:00
r600-encoding.ll R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
README R600: Reorganize lit tests and document how they should be organized 2013-04-19 02:10:53 +00:00
reciprocal.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
rotr.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
schedule-fs-loop-nested-if.ll llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 2013-03-11 23:16:30 +00:00
schedule-fs-loop-nested.ll llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 2013-03-11 23:16:30 +00:00
schedule-fs-loop.ll llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 2013-03-11 23:16:30 +00:00
schedule-if-2.ll llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 2013-03-11 23:16:30 +00:00
schedule-if.ll llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 2013-03-11 23:16:30 +00:00
schedule-vs-if-nested-loop.ll llvm/test/CodeGen/R600/schedule-*.ll: Let them require +Asserts. 2013-03-11 23:16:30 +00:00
sdiv.ll R600: Add CF_END 2013-04-23 17:34:00 +00:00
selectcc-cnd.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
selectcc-cnde-int.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
selectcc-icmp-select-float.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
selectcc-opt.ll R600: Use bottom up scheduling algorithm 2013-05-17 16:50:56 +00:00
set-dx10.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
setcc.ll R600: Reorganize lit tests and document how they should be organized 2013-04-19 02:10:53 +00:00
seto.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
setuo.ll R600/SI: Add a calling convention for compute shaders 2013-06-03 17:40:11 +00:00
shl.ll R600/SI: Add patterns for 64-bit shift operations 2013-05-20 15:02:12 +00:00
short-args.ll R600: Emit function name in the AsmPrinter 2013-02-05 17:09:11 +00:00
sign_extend.ll R600/SI: Custom lower i64 sign_extend 2013-06-03 17:40:03 +00:00
sint_to_fp.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
sra.ll R600: Expand SRA for v4i32/v2i32 2013-05-10 02:09:29 +00:00
srl.ll R600: Expand vector or, shl, srl, and xor nodes 2013-05-03 17:21:31 +00:00
store.ll R600: Reorganize lit tests and document how they should be organized 2013-04-19 02:10:53 +00:00
store.r600.ll R600: Reorganize lit tests and document how they should be organized 2013-04-19 02:10:53 +00:00
sub.ll R600: Expand SUB for v2i32/v4i32 2013-05-10 02:09:39 +00:00
texture-input-merge.ll R600: Add a pass that merge Vector Register 2013-06-05 21:38:04 +00:00
udiv.ll R600: Add CF_END 2013-04-23 17:34:00 +00:00
uint_to_fp.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
uitofp.ll R600/SI: Add lit test coverage for the remaining patterns added recently 2013-05-14 09:53:30 +00:00
unsupported-cc.ll R600: Prettier asmPrint of Alu 2013-05-02 21:52:30 +00:00
urecip.ll R600/SI: Add pattern for AMDGPUurecip 2013-04-10 17:17:56 +00:00
urem.ll R600: Add CF_END 2013-04-23 17:34:00 +00:00
vselect.ll R600: use capital letter for PV channel 2013-06-03 15:44:35 +00:00
vtx-schedule.ll R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst reg 2013-05-23 18:26:42 +00:00
work-item-intrinsics.ll R600/SI: Add support for work item and work group intrinsics 2013-06-03 17:40:18 +00:00
xor.ll R600: Expand vector or, shl, srl, and xor nodes 2013-05-03 17:21:31 +00:00

README 

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.