6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-04 23:32:00 +00:00
Code Issues Projects Releases Wiki Activity
llvm-6502/test/CodeGen/X86
History
Evan Cheng a87008d90b Revert BuildVectorSDNode related patches: 65426, 65427, and 65296. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@65482 91177308-0d34-0410-b5e6-96231b3b80d8
2009-02-25 22:49:59 +00:00
..
2002-12-23-LocalRAProblem.ll
…
2002-12-23-SubProblem.ll
…
2003-08-03-CallArgLiveRanges.ll
…
2003-08-23-DeadBlockTest.ll
…
2003-11-03-GlobalBool.ll
…
2004-02-12-Memcpy.ll
…
2004-02-13-FrameReturnAddress.ll
…
2004-02-14-InefficientStackPointer.ll
…
2004-02-22-Casts.ll
…
2004-03-30-Select-Max.ll
…
2004-04-09-SameValueCoalescing.ll
…
2004-04-13-FPCMOV-Crash.ll
…
2004-06-10-StackifierCrash.ll
…
2004-10-08-SelectSetCCFold.ll
…
2005-01-17-CycleInDAG.ll
…
2005-02-14-IllegalAssembler.ll
…
2005-05-08-FPStackifierPHI.ll
…
2006-01-19-ISelFoldingBug.ll
…
2006-03-01-InstrSchedBug.ll
…
2006-03-02-InstrSchedBug.ll
…
2006-04-04-CrossBlockCrash.ll
…
2006-04-27-ISelFoldingBug.ll
…
2006-05-01-SchedCausingSpills.ll
…
2006-05-02-InstrSched1.ll
…
2006-05-02-InstrSched2.ll
…
2006-05-08-CoalesceSubRegClass.ll
…
2006-05-08-InstrSched.ll
…
2006-05-11-InstrSched.ll
Change these tests to use regular loads instead of llvm.x86.sse2.loadu.dq.
2009-02-16 00:44:23 +00:00
2006-05-17-VectorArg.ll
…
2006-05-22-FPSetEQ.ll
…
2006-05-25-CycleInDAG.ll
…
2006-07-10-InlineAsmAConstraint.ll
…
2006-07-12-InlineAsmQConstraint.ll
…
2006-07-19-ATTAsm.ll
Do not use buggy llvm-gcc to generate testcases.
2009-01-22 18:28:11 +00:00
2006-07-20-InlineAsm.ll
…
2006-07-28-AsmPrint-Long-As-Pointer.ll
…
2006-07-31-SingleRegClass.ll
…
2006-08-07-CycleInDAG.ll
…
2006-08-16-CycleInDAG.ll
…
2006-08-21-ExtraMovInst.ll
…
2006-09-01-CycleInDAG.ll
…
2006-10-02-BoolRetCrash.ll
…
2006-10-07-ScalarSSEMiscompile.ll
…
2006-10-09-CycleInDAG.ll
…
2006-10-10-FindModifiedNodeSlotBug.ll
…
2006-10-12-CycleInDAG.ll
…
2006-10-13-CycleInDAG.ll
…
2006-10-19-SwitchUnnecessaryBranching.ll
…
2006-11-12-CSRetCC.ll
…
2006-11-17-IllegalMove.ll
…
2006-11-27-SelectLegalize.ll
…
2006-11-28-Memcpy.ll
…
2006-12-19-IntelSyntax.ll
…
2007-01-08-InstrSched.ll
…
2007-01-13-StackPtrIndex.ll
…
2007-01-29-InlineAsm-ir.ll
…
2007-02-04-OrAddrMode.ll
…
2007-02-19-LiveIntervalAssert.ll
…
2007-02-25-FastCCStack.ll
…
2007-03-01-SpillerCrash.ll
…
2007-03-15-GEP-Idx-Sink.ll
…
2007-03-16-InlineAsm.ll
…
2007-03-18-LiveIntervalAssert.ll
…
2007-03-24-InlineAsmMultiRegConstraint.ll
…
2007-03-24-InlineAsmPModifier.ll
…
2007-03-24-InlineAsmVectorOp.ll
…
2007-03-24-InlineAsmXConstraint.ll
…
2007-03-26-CoalescerBug.ll
…
2007-04-08-InlineAsmCrash.ll
…
2007-04-11-InlineAsmVectorResult.ll
…
2007-04-17-LiveIntervalAssert.ll
…
2007-04-24-Huge-Stack.ll
…
2007-04-24-VectorCrash.ll
…
2007-04-25-MMX-PADDQ.ll
…
2007-04-27-InlineAsm-IntMemInput.ll
…
2007-05-05-VecCastExpand.ll
…
2007-05-07-InvokeSRet.ll
…
2007-05-14-LiveIntervalAssert.ll
…
2007-05-15-maskmovq.ll
…
2007-05-17-ShuffleISelBug.ll
…
2007-06-04-tailmerge4.ll
…
2007-06-04-X86-64-CtorAsmBugs.ll
…
2007-06-05-LSR-Dominator.ll
…
2007-06-14-branchfold.ll
…
2007-06-15-IntToMMX.ll
…
2007-06-28-X86-64-isel.ll
…
2007-06-29-DAGCombinerBug.ll
…
2007-06-29-VecFPConstantCSEBug.ll
…
2007-07-03-GR64ToVR64.ll
…
2007-07-10-StackerAssert.ll
…
2007-07-18-Vector-Extract.ll
…
2007-08-01-LiveVariablesBug.ll
…
2007-08-09-IllegalX86-64Asm.ll
…
2007-08-10-SignExtSubreg.ll
…
2007-08-13-AppendingLinkage.ll
…
2007-08-13-SpillerReuse.ll
…
2007-09-03-X86-64-EhSelector.ll
…
2007-09-05-InvalidAsm.ll
…
2007-09-06-ExtWeakAliasee.ll
…
2007-09-17-ObjcFrameEH.ll
…
2007-09-18-ShuffleXformBug.ll
…
2007-09-27-LDIntrinsics.ll
…
2007-10-04-AvoidEFLAGSCopy.ll
…
2007-10-05-3AddrConvert.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
2007-10-12-CoalesceExtSubReg.ll
…
2007-10-12-SpillerUnfold1.ll
…
2007-10-12-SpillerUnfold2.ll
…
2007-10-14-CoalescerCrash.ll
…
2007-10-15-CoalescerCrash.ll
…
2007-10-16-CoalescerCrash.ll
…
2007-10-16-fp80_select.ll
…
2007-10-16-IllegalAsm.ll
…
2007-10-17-IllegalAsm.ll
…
2007-10-19-SpillerUnfold.ll
…
2007-10-28-inlineasm-q-modifier.ll
…
2007-10-29-ExtendSetCC.ll
…
2007-10-30-LSRCrash.ll
…
2007-10-31-extractelement-i64.ll
…
2007-11-01-ISelCrash.ll
…
2007-11-02-BadAsm.ll
…
2007-11-03-x86-64-q-constraint.ll
…
2007-11-04-LiveIntervalCrash.ll
…
2007-11-04-LiveVariablesBug.ll
…
2007-11-04-rip-immediate-constant.ll
…
2007-11-06-InstrSched.ll
…
2007-11-07-MulBy4.ll
…
2007-11-14-Coalescer-Bug.ll
…
2007-11-30-LoadFolding-Bug.ll
…
2007-11-30-TestLoadFolding.ll
…
2007-12-11-FoldImpDefSpill.ll
…
2007-12-16-BURRSchedCrash.ll
…
2007-12-18-LoadCSEBug.ll
…
2008-01-08-IllegalCMP.ll
…
2008-01-08-SchedulerCrash.ll
…
2008-01-09-LongDoubleSin.ll
…
2008-01-16-FPStackifierAssert.ll
…
2008-01-16-InvalidDAGCombineXform.ll
…
2008-01-16-Trampoline.ll
…
2008-01-25-EmptyFunction.ll
…
2008-02-05-ISelCrash.ll
…
2008-02-06-LoadFoldingBug.ll
…
2008-02-08-LoadFoldingBug.ll
…
2008-02-14-BitMiscompile.ll
…
2008-02-18-TailMergingBug.ll
…
2008-02-20-InlineAsmClobber.ll
…
2008-02-22-LocalRegAllocBug.ll
…
2008-02-22-ReMatBug.ll
Don't use special heuristics for nodes with no data predecessors
2009-02-11 21:29:39 +00:00
2008-02-25-InlineAsmBug.ll
…
2008-02-25-X86-64-CoalescerBug.ll
…
2008-02-26-AsmDirectMemOp.ll
…
2008-02-27-DeadSlotElimBug.ll
…
2008-02-27-PEICrash.ll
…
2008-03-06-frem-fpstack.ll
…
2008-03-07-APIntBug.ll
…
2008-03-10-RegAllocInfLoop.ll
…
2008-03-12-ThreadLocalAlias.ll
…
2008-03-13-TwoAddrPassCrash.ll
…
2008-03-14-SpillerCrash.ll
…
2008-03-18-CoalescerBug.ll
…
2008-03-19-DAGCombinerBug.ll
…
2008-03-23-DarwinAsmComments.ll
…
2008-03-25-TwoAddrPassBug.ll
…
2008-03-31-SpillerFoldingBug.ll
…
2008-04-02-unnamedEH.ll
…
2008-04-08-CoalescerCrash.ll
…
2008-04-09-BranchFolding.ll
…
2008-04-15-LiveVariableBug.ll
…
2008-04-16-CoalescerBug.ll
…
2008-04-16-ReMatBug.ll
…
2008-04-17-CoalescerBug.ll
…
2008-04-24-MemCpyBug.ll
…
2008-04-24-pblendw-fold-crash.ll
…
2008-04-26-Asm-Optimize-Imm.ll
…
2008-04-28-CoalescerBug.ll
…
2008-04-28-CyclicSchedUnit.ll
…
2008-05-01-InvalidOrdCompare.ll
…
2008-05-06-SpillerBug.ll
…
2008-05-09-PHIElimBug.ll
…
2008-05-09-ShuffleLoweringBug.ll
…
2008-05-12-tailmerge-5.ll
…
2008-05-21-CoalescerBug.ll
…
2008-05-22-FoldUnalignedLoad.ll
…
2008-05-28-CoalescerBug.ll
…
2008-05-28-LocalRegAllocBug.ll
…
2008-06-04-MemCpyLoweringBug.ll
…
2008-06-13-NotVolatileLoadStore.ll
…
2008-06-13-VolatileLoadStore.ll
…
2008-06-16-SubregsBug.ll
…
2008-06-18-BadShuffle.ll
…
2008-06-25-VecISelBug.ll
…
2008-07-07-DanglingDeadInsts.ll
…
2008-07-09-ELFSectionAttributes.ll
…
2008-07-11-SHLBy1.ll
…
2008-07-11-SpillerBug.ll
…
2008-07-16-CoalescerCrash.ll
…
2008-07-19-movups-spills.ll
Teach 2addr pass to be do more commuting. If both uses of a two-address instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
2009-01-25 03:53:59 +00:00
2008-07-22-CombinerCrash.ll
…
2008-07-23-VSetCC.ll
…
2008-08-05-SpillerBug.ll
Replace one of burr scheduling heuristic with something more sensible. Now calcMaxScratches simply compute the number of true data dependencies. This actually improve a couple of tests in dejagnu suite as many tests in llvm nightly test suite.
2009-02-12 08:59:45 +00:00
2008-08-06-RewriterBug.ll
…
2008-08-17-UComiCodeGenBug.ll
…
2008-08-19-SubAndFetch.ll
…
2008-08-23-64Bit-maskmovq.ll
…
2008-08-23-X86-64AsmBug.ll
…
2008-08-25-AsmRegTypeMismatch.ll
Fix another test to not use -mcpu=yonah with 64-bit code.
2009-02-02 23:43:59 +00:00
2008-08-31-EH_RETURN32.ll
…
2008-08-31-EH_RETURN64.ll
…
2008-09-05-sinttofp-2xi32.ll
…
2008-09-09-LinearScanBug.ll
…
2008-09-10-SpillerBug2.ll
…
2008-09-11-CoalescerBug2.ll
…
2008-09-11-CoalescerBug.ll
…
2008-09-17-inline-asm-1.ll
…
2008-09-18-inline-asm-2.ll
…
2008-09-19-RegAllocBug.ll
…
2008-09-25-sseregparm-1.ll
…
2008-09-26-FrameAddrBug.ll
…
2008-09-29-ReMatBug.ll
…
2008-09-29-VolatileBug.ll
…
2008-10-02-Atomics32-2.ll
…
2008-10-06-MMXISelBug.ll
…
2008-10-06-x87ld-nan-1.ll
…
2008-10-06-x87ld-nan-2.ll
…
2008-10-07-SSEISelBug.ll
…
2008-10-11-CallCrash.ll
…
2008-10-13-CoalescerBug.ll
…
2008-10-16-SpillerBug.ll
…
2008-10-16-VecUnaryOp.ll
…
2008-10-17-Asm64bitRConstraint.ll
…
2008-10-20-AsmDoubleInI32.ll
…
2008-10-24-FlippedCompare.ll
…
2008-10-27-CoalescerBug.ll
…
2008-10-27-StackRealignment.ll
…
2008-10-29-ExpandVAARG.ll
…
2008-11-03-F80VAARG.ll
…
2008-11-06-testb.ll
…
2008-11-13-inlineasm-3.ll
…
2008-11-29-DivideConstant16bit.ll
…
2008-11-29-DivideConstant16bitSigned.ll
…
2008-11-29-ULT-Sign.ll
…
2008-12-01-loop-iv-used-outside-loop.ll
…
2008-12-01-SpillerAssert.ll
…
2008-12-02-dagcombine-1.ll
…
2008-12-02-dagcombine-2.ll
…
2008-12-02-dagcombine-3.ll
…
2008-12-02-IllegalResultType.ll
…
2008-12-05-SpillerCrash.ll
…
2008-12-16-BadShift.ll
…
2008-12-16-dagcombine-4.ll
…
2008-12-19-EarlyClobberBug.ll
…
2008-12-22-dagcombine-5.ll
One more permutation of subtracting off a base value.
2008-12-23 01:59:54 +00:00
2008-12-23-crazy-address.ll
Fix a compiler-abort on a testcase where the stack-pointer is added to
2008-12-24 00:27:51 +00:00
2008-12-23-dagcombine-6.ll
Add another permutation where we should get rid of a-a.
2008-12-23 23:01:27 +00:00
2009-01-12-CoalescerBug.ll
FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block.
2009-01-13 03:57:45 +00:00
2009-01-13-DoubleUpdate.ll
When replacing uses and the same node is reached
2009-01-13 15:17:14 +00:00
2009-01-16-SchedulerBug.ll
CreateVirtualRegisters does trivial copy coalescing. If a node def is used by a single CopyToReg, it reuses the virtual register assigned to the CopyToReg. This won't work for SDNode that is a clone or is itself cloned. Disable this optimization for those nodes or it can end up with non-SSA machine instructions.
2009-01-16 20:57:18 +00:00
2009-01-16-UIntToFP.ll
Testcase for last commit.
2009-01-17 07:42:44 +00:00
2009-01-18-ConstantExprCrash.ll
Fix rdar://6505632, an llc crash on 483.xalancbmk
2009-01-18 20:35:00 +00:00
2009-01-25-NoSSE.ll
Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
2009-02-01 18:15:56 +00:00
2009-01-26-WrongCheck.ll
Fix PR3393, which amounts to a bug in the expensive
2009-01-26 21:54:18 +00:00
2009-01-27-NullStrings.ll
Make test platform agnostic.
2009-01-28 22:20:56 +00:00
2009-01-29-LocalRegAllocBug.ll
Local register allocator shouldn't assume only the entry and landing pad basic blocks have live-ins.
2009-01-29 18:37:30 +00:00
2009-01-31-BigShift2.ll
Fix PR3401: when using large integers, the type
2009-01-31 15:50:11 +00:00
2009-01-31-BigShift3.ll
Fix PR3401: when using large integers, the type
2009-01-31 15:50:11 +00:00
2009-01-31-BigShift.ll
Fix PR3401: when using large integers, the type
2009-01-31 15:50:11 +00:00
2009-02-01-LargeMask.ll
Fix PR3453 and probably a bunch of other potential
2009-02-01 18:06:53 +00:00
2009-02-03-AnalyzedTwice.ll
Fix PR3411. When replacing values, nodes are analyzed
2009-02-03 10:23:33 +00:00
2009-02-04-sext-i64-gep.ll
if we have a large GEP offset on a 32-bit or other target, make
2009-02-05 06:55:21 +00:00
2009-02-05-CoalescerBug.ll
Fix test. It produces unexpected code if sse4.1 is on.
2009-02-06 01:49:19 +00:00
2009-02-07-CoalescerBug.ll
Re-enable machine sinking pass now that the coalescer bugs and the AnalyzeBrnach bug are fixed.
2009-02-09 08:45:39 +00:00
2009-02-08-CoalescerBug.ll
Fix PR3486. Fix a bug in code that manually patch physical register live interval after its sub-register is coalesced with a virtual register.
2009-02-08 11:04:35 +00:00
2009-02-11-codegenprepare-reuse.ll
fix PR3537: if resetting bbi back to the start of a block, we need to
2009-02-12 06:56:08 +00:00
2009-02-12-DebugInfoVLA.ll
fix the X86 backend to just drop llvm.declare nodes for VLAs instead of
2009-02-12 17:33:11 +00:00
2009-02-12-InlineAsm-nieZ-constraints.ll
Arrange to print constants that match "n" and "i" constraints
2009-02-12 20:58:09 +00:00
2009-02-12-SpillerBug.ll
add PR
2009-02-12 17:04:57 +00:00
2009-02-20-PreAllocSplit-Crash.ll
Fix a crash in the pre-alloc splitter exposed by recent codegen changes.
2009-02-20 10:02:23 +00:00
2009-02-21-ExtWeakInitializer.ll
Drop bunch of half-working stuff in the ext_weak linkage support.
2009-02-21 11:53:32 +00:00
20081212.ll
…
add-trick32.ll
…
add-trick64.ll
…
add-with-overflow.ll
X86_COND_C and X86_COND_NC are alternate mnemonics for
2009-01-07 00:15:08 +00:00
aliases.ll
…
aligned-comm.ll
…
all-ones-vector.ll
…
alloca-align-rounding.ll
…
and-or-fold.ll
…
arg-cast.ll
…
asm-block-labels.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
atomic_op.ll
…
Atomics-32.ll
…
Atomics-64.ll
…
avoid-loop-align.ll
…
bitcast2.ll
…
bitcast-int-to-vector.ll
…
bitcast.ll
…
break-anti-dependencies.ll
…
bswap.ll
…
bt.ll
Add explicit -march=x86 to these tests so that they don't
2009-02-03 00:20:22 +00:00
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval.ll
…
call-push.ll
…
clz.ll
…
cmp0.ll
…
cmp1.ll
…
cmp2.ll
…
cmp-test.ll
…
coalescer-commute1.ll
…
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-remat.ll
…
combine-lds.ll
…
commute-cmov.ll
Make x86's BT instruction matching more thorough, and add some
2009-01-29 01:59:02 +00:00
commute-intrinsic.ll
…
commute-two-addr.ll
…
compare_folding.ll
…
compare-add.ll
…
complex-fca.ll
…
constant-pool-remat-0.ll
…
convert-2-addr-3-addr-inc64.ll
rename test to avoid messing with tab completion of dates.
2009-02-12 06:54:55 +00:00
copysign-zero.ll
…
critical-edge-split.ll
…
cstring.ll
GV with null value initializer shouldn't go to BSS if it's meant for a mergeable strings section. Currently it only checks for Darwin. Someone else please check if it should apply to other targets as well.
2009-02-18 02:19:52 +00:00
dag-rauw-cse.ll
At Nick Lewycky's request, rename this test with a more informative name.
2009-01-26 21:36:31 +00:00
dagcombine-cse.ll
…
darwin-bzero.ll
…
darwin-no-dead-strip.ll
…
darwin-stub.ll
…
dg.exp
…
div_const.ll
…
divrem.ll
…
dollar-name.ll
…
dyn-stackalloc.ll
…
epilogue.ll
…
extend.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extractelement-from-arg.ll
…
extractelement-load.ll
Yonah does not support x86-64. Change the -mcpu value to one that does.
2009-02-02 22:50:08 +00:00
extractelement-shuffle.ll
…
extractps.ll
…
fabs.ll
…
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-call.ll
…
fast-isel-gep-sext.ll
…
fast-isel-mem.ll
…
fast-isel-phys.ll
…
fast-isel-shift-imm.ll
Fix fast-isel to not emit invalid assembly when presented with a
2008-12-20 17:19:40 +00:00
fast-isel-tls.ll
Fast-isel can't do TLS yet, so it should fall back to SDISel
2009-02-23 22:03:08 +00:00
fast-isel-trunc.ll
…
fast-isel.ll
…
fastcall-correct-mangling.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
field-extract-use-trunc.ll
…
fildll.ll
…
fold-and-shift.ll
…
fold-call-2.ll
…
fold-call-3.ll
Enhance logic in X86DAGToDAGISel::PreprocessForRMW which move load inside callseq_start to allow it to be folded into a call. It was not considering the cases where a token factor is between the load and the callseq_start.
2009-01-26 18:43:34 +00:00
fold-call.ll
…
fold-imm.ll
…
fold-load.ll
…
fold-mul-lohi.ll
…
fold-pcmpeqd-0.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
fp2sint.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-stack-2results.ll
…
fp-stack-compare.ll
…
fp-stack-direct-ret.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
Implement FpSET_ST1_*.
2009-02-09 23:32:07 +00:00
fsxor-alignment.ll
…
full-lsr.ll
Implement "superhero" strength reduction, or full strength
2009-02-20 04:17:46 +00:00
ga-offset.ll
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis.ll
…
i2k.ll
…
i128-and-beyond.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i256-add.ll
…
iabs.ll
…
illegal-asm.ll
Exit with nice warnings when register allocator run out of registers.
2009-01-29 02:20:59 +00:00
illegal-insert.ll
…
illegal-vector-args-return.ll
…
imp-def-copies.ll
…
imul-lea.ll
…
inline-asm-fpstack.ll
…
inline-asm-mrv.ll
…
inline-asm-pic.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
…
insertelement-copytoregs.ll
…
insertelement-legalize.ll
…
invalid-shift-immediate.ll
…
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
iv-users-in-other-loops.ll
Implement "superhero" strength reduction, or full strength
2009-02-20 04:17:46 +00:00
jump_sign.ll
…
ldzero.ll
…
lea-2.ll
…
lea-3.ll
Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
2009-01-17 07:09:27 +00:00
lea-4.ll
Fix MatchAddress bug that's preventing negative displacement from being folded in 64-bit mode.
2009-01-17 07:09:27 +00:00
lea-recursion.ll
…
lea.ll
…
legalizedag_vec.ll
Revert BuildVectorSDNode related patches: 65426, 65427, and 65296.
2009-02-25 22:49:59 +00:00
lfence.ll
…
limited-prec.ll
Now with RUN line.
2009-01-21 21:28:03 +00:00
local-liveness.ll
…
long-setcc.ll
…
longlong-deadload.ll
…
loop-hoist.ll
Disable the post-RA scheduler on this test, since it uses a
2009-01-16 21:40:12 +00:00
loop-strength-reduce2.ll
…
loop-strength-reduce3.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
Fix strange logic in CollectIVUsers used to determine whether all uses are
2009-02-20 22:16:49 +00:00
loop-strength-reduce8.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
loop-strength-reduce-2.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
loop-strength-reduce-3.ll
…
loop-strength-reduce.ll
…
lsr-negative-stride.ll
…
lsr-sort.ll
Fix LSR's IV sorting function to explicitly sort by bitwidth
2009-02-13 00:26:43 +00:00
maskmovdqu.ll
Handle llvm.x86.sse2.maskmov.dqu in 64-bit.
2009-02-10 22:06:28 +00:00
memcpy-2.ll
…
memcpy.ll
…
memmove-0.ll
…
memmove-1.ll
…
memmove-2.ll
…
memmove-3.ll
…
memmove-4.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset.ll
…
mfence.ll
…
mingw-alloca.ll
…
mmx-arg-passing2.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-to-i64.ll
…
mmx-copy-gprs.ll
…
mmx-emms.ll
…
mmx-insert-element.ll
…
mmx-pinsrw.ll
…
mmx-punpckhdq.ll
…
mmx-s2v.ll
…
mmx-shift.ll
…
mmx-shuffle.ll
…
mmx-vzmovl-2.ll
…
mmx-vzmovl.ll
…
movgs.ll
Map address space 256 to gs; similar mappings could be supported for the
2009-01-26 01:24:32 +00:00
mul64.ll
…
mul128.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
multiple-return-values-cross-block.ll
…
multiple-return-values.ll
…
nancvt.ll
…
neg_fp.ll
If unsafe FP optimization is not set, don't allow -(A-B) => B-A because
2009-01-31 06:07:45 +00:00
negate-add-zero.ll
Don't create ISD::FNEG nodes after legalize if they aren't legal.
2009-01-22 21:58:43 +00:00
negative_zero.ll
…
negative-sin.ll
…
negative-subscript.ll
Make sure constant subscript is truncated to ptr size if it may not fit.
2009-02-09 20:54:38 +00:00
nobt.ll
Make a transformation added in 63266 a bit less aggressive.
2009-02-11 19:19:41 +00:00
nofence.ll
…
nosse-error1.ll
add 2 more testcases for -mattr=-sse (r63495).
2009-02-01 18:24:20 +00:00
nosse-error2.ll
add 2 more testcases for -mattr=-sse (r63495).
2009-02-01 18:24:20 +00:00
nosse-varargs.ll
Implement -mno-sse: if SSE is disabled on x86-64, don't store XMM on stack for
2009-02-01 18:15:56 +00:00
opt-ext-uses.ll
…
optimize-smax.ll
…
or-branch.ll
…
overlap-shift.ll
…
packed_struct.ll
…
peep-vector-extract-concat.ll
…
peep-vector-extract-insert.ll
…
phys_subreg_coalesce-2.ll
Add test case from PR2659.
2009-01-09 21:01:31 +00:00
phys_subreg_coalesce.ll
The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:
2009-01-07 02:08:57 +00:00
pic_jumptable.ll
…
pic-1.ll
…
pic-2.ll
…
pic-3.ll
…
pic-4.ll
…
pic-5.ll
…
pic-6.ll
…
pic-cpool.ll
…
pic-jtbl.ll
…
pic-load-remat.ll
…
pmul.ll
Don't use special heuristics for nodes with no data predecessors
2009-02-11 21:29:39 +00:00
postalloc-coalescing.ll
…
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2623.ll
…
pr2656.ll
…
pr2659.ll
PR2659 was fixed by r61847. Add the testcase as a regression test.
2009-01-09 08:16:12 +00:00
pr2849.ll
…
pr2924.ll
…
pr2982.ll
…
pr3154.ll
Add test case for PR3154.
2009-01-20 19:29:54 +00:00
pr3216.ll
Fix a dagcombine to not generate loads of non-round integer types,
2009-01-20 01:06:45 +00:00
pr3241.ll
…
pr3243.ll
Fix PR3243: a LiveVariables bug. When HandlePhysRegKill is checking whether the last reference is also the last def (i.e. dead def), it should also check if last reference is the current machine instruction being processed. This can happen when it is processing a physical register use and setting the current machine instruction as sub-register's last ref.
2009-01-20 21:25:12 +00:00
pr3244.ll
Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
2009-01-12 03:19:55 +00:00
pr3250.ll
Fix a DAGCombiner abort on an invalid shift count constant. This fixes PR3250.
2009-01-03 19:22:06 +00:00
pr3317.ll
Simplify ReduceLoadWidth's logic: it doesn't need several different
2009-01-21 15:17:51 +00:00
pr3366.ll
Fix a recent regression. ClrOpcode is not set for i8; for i8, if
2009-01-21 14:50:16 +00:00
pr3457.ll
Fix PR3457: Ignore control successors when looking for closest scheduled successor. A control successor doesn't read result(s) produced by the scheduling unit being evaluated.
2009-02-10 08:30:11 +00:00
pr3495-2.ll
Remove a bogus assertion. It's possible a live-in available value is used by a previous instruction.
2009-02-11 23:41:57 +00:00
pr3495.ll
Implement PR3495: local spiller optimization. The local spiller can now keep availability information over BB boundaries. It visits BB's in depth first order. After visiting a BB if it find a successor which has a single predecessor it visits the successor next without clearing the availability information. This allows the successor to omit reloads or change them into copies.
2009-02-11 08:24:21 +00:00
pr3522.ll
Fix PR3522. It's not safe to sink into landing pad BB's.
2009-02-15 08:36:12 +00:00
pre-split1.ll
XFAIL this test. It only worked before because of a bug in the spill point selection code. Not deleting because
2009-01-29 22:27:56 +00:00
pre-split2.ll
Turn on machine LICM in non-fast mode.
2009-02-05 08:46:33 +00:00
pre-split3.ll
…
pre-split4.ll
…
pre-split5.ll
…
pre-split6.ll
…
pre-split7.ll
…
pre-split8.ll
…
pre-split9.ll
…
pre-split10.ll
…
prefetch.ll
…
private.ll
Add the private linkage.
2009-01-15 20:18:42 +00:00
rdtsc.ll
…
red-zone.ll
Add a regression test for x86-64 red zone usage.
2009-01-27 00:40:27 +00:00
regpressure.ll
…
rem-2.ll
DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
2009-01-19 19:06:11 +00:00
rem.ll
…
remat-constant.ll
…
remat-mov0.ll
Find loop back edges only after empty blocks are eliminated.
2009-01-05 21:17:27 +00:00
ret-addr.ll
Add support for non-zero __builtin_return_address values on X86.
2009-01-16 19:25:27 +00:00
ret-i64-0.ll
…
ret-mmx.ll
Only v1i16 (i.e. _m64) is returned via RAX / RDX.
2009-02-23 09:03:22 +00:00
rot16.ll
…
rot32.ll
…
rot64.ll
…
rotate2.ll
…
rotate.ll
…
scalar_sse_minmax.ll
…
scalar-extract.ll
Simplify extract element of a scalar to vector.
2009-01-17 00:07:25 +00:00
scalar-min-max-fill-operand.ll
…
select-zero-one.ll
…
select.ll
…
setoeq.ll
…
setuge.ll
…
sext-load.ll
…
sext-select.ll
…
sext-trunc.ll
…
sfence.ll
…
shift-and.ll
…
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine.ll
…
shift-double.ll
…
shift-folding.ll
…
shift-one.ll
…
shl_elim.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
sincos.ll
…
small-byval-memcpy.ll
…
smul-with-overflow-2.ll
Implement multiple with overflow by 2 with an add instruction.
2009-01-27 03:30:42 +00:00
smul-with-overflow-3.ll
Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.
2009-02-02 08:07:36 +00:00
smul-with-overflow.ll
…
soft-fp.ll
Teach x86 target -soft-float.
2009-02-13 22:36:38 +00:00
split-select.ll
…
split-vector-rem.ll
…
sret.ll
…
sse41-extractps-bitcast-0.ll
…
sse41-extractps-bitcast-1.ll
…
sse41-pmovx.ll
…
sse_reload_fold.ll
Don't use special heuristics for nodes with no data predecessors
2009-02-11 21:29:39 +00:00
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-fcopysign.ll
…
sse-load-ret.ll
…
sse-varargs.ll
…
stack-align.ll
…
store_op_load_fold2.ll
…
store_op_load_fold.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
storetrunc-fp.ll
…
stride-nine-with-base-reg.ll
Teach LSR sink to sink the immediate portion of the common expression back into uses if they fit in address modes of all the uses.
2009-02-21 02:06:47 +00:00
stride-reuse.ll
…
sub-with-overflow.ll
X86_COND_C and X86_COND_NC are alternate mnemonics for
2009-01-07 00:15:08 +00:00
subclass-coalesce.ll
Update test to reflect command line option name change.
2009-01-23 05:45:31 +00:00
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
swizzle.ll
The memory alignment requirement on some of the mov{h|l}p{d|s} patterns are 16-byte. That is overly strict. These instructions read / write f64 memory locations without alignment requirement.
2009-01-28 08:35:02 +00:00
tailcall1.ll
…
tailcall-stackalign.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallstack64.ll
…
test-nofold.ll
…
testl-commute.ll
add a testcase.
2009-01-07 01:48:08 +00:00
tls1.ll
…
tls2.ll
…
trap.ll
…
trunc-to-bool.ll
…
twoaddr-coalesce.ll
Teach 2addr pass to be do more commuting. If both uses of a two-address instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
2009-01-25 03:53:59 +00:00
twoaddr-delete.ll
If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction.
2009-02-21 03:14:25 +00:00
twoaddr-pass-sink.ll
…
twoaddr-remat.ll
…
uint_to_fp-2.ll
Make linear scan's trivial coalescer slightly more aggressive.
2009-01-20 00:16:18 +00:00
uint_to_fp.ll
Now not UINT_TO_FP is legal (it's marked custom), dag combiner won't
2009-01-19 08:08:22 +00:00
umul-with-carry.ll
…
urem-i8-constant.ll
…
v4f32-immediate.ll
…
variable-sized-darwin-bzero.ll
…
variadic-node-pic.ll
…
vec_add.ll
…
vec_align.ll
…
vec_call.ll
…
vec_clear.ll
…
vec_ctbits.ll
…
vec_extract-sse4.ll
…
vec_extract.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_fneg.ll
…
vec_ins_extract-1.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
vec_ins_extract.ll
rearrange how SRoA handles promotion of allocas to vectors.
2009-02-03 01:30:09 +00:00
vec_insert_4.ll
…
vec_insert-2.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_insert-3.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_insert-5.ll
…
vec_insert-6.ll
…
vec_insert-7.ll
…
vec_insert-8.ll
Expand insert/extract of a <4 x i32> with a variable index.
2009-01-15 21:10:20 +00:00
vec_insert.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
vec_loadhl.ll
…
vec_logical.ll
…
vec_return.ll
…
vec_select.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-5.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-9.ll
…
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-E.ll
…
vec_set-F.ll
…
vec_set-G.ll
…
vec_set-H.ll
…
vec_set-I.ll
…
vec_set-J.ll
…
vec_set.ll
…
vec_shift2.ll
…
vec_shift3.ll
…
vec_shift.ll
…
vec_shuffle-2.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-3.ll
…
vec_shuffle-4.ll
…
vec_shuffle-5.ll
…
vec_shuffle-6.ll
…
vec_shuffle-7.ll
…
vec_shuffle-8.ll
…
vec_shuffle-9.ll
…
vec_shuffle-10.ll
…
vec_shuffle-11.ll
…
vec_shuffle-12.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-13.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-14.ll
…
vec_shuffle-15.ll
…
vec_shuffle-16.ll
…
vec_shuffle-17.ll
…
vec_shuffle-18.ll
…
vec_shuffle-19.ll
…
vec_shuffle-20.ll
…
vec_shuffle-21.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-22.ll
…
vec_shuffle-23.ll
…
vec_shuffle-24.ll
…
vec_shuffle-25.ll
…
vec_shuffle-26.ll
…
vec_shuffle-27.ll
…
vec_shuffle-28.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-29.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-30.ll
Fixes a case where we generate an incorrect mask for pshfhw in the presence
2009-02-04 01:16:59 +00:00
vec_shuffle-31.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-32.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-33.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-34.ll
Generate better code for v8i16 shuffles on SSE2
2009-02-23 08:49:38 +00:00
vec_shuffle-35.ll
Use the -stack-alignment option instead of using a target triple
2009-02-23 16:34:46 +00:00
vec_shuffle.ll
…
vec_splat-2.ll
…
vec_splat-3.ll
Added shuffle and splat test cases for r61365.
2008-12-23 04:05:08 +00:00
vec_splat-4.ll
Added shuffle and splat test cases for r61365.
2008-12-23 04:05:08 +00:00
vec_splat.ll
…
vec_ss_load_fold.ll
…
vec_zero_cse.ll
…
vec_zero-2.ll
…
vec_zero.ll
…
vector-intrinsics.ll
…
vector-rem.ll
…
vector-variable-idx.ll
…
vector.ll
…
vfcmp.ll
…
volatile.ll
…
vortex-bug.ll
…
vshift_scalar.ll
…
vshift_split2.ll
make these tests pass when run on a G5.
2009-02-20 07:10:11 +00:00
vshift_split.ll
…
vshift-1.ll
Added sse test patterns for r62979 and r63193.
2009-01-28 08:13:56 +00:00
vshift-2.ll
Added sse test patterns for r62979 and r63193.
2009-01-28 08:13:56 +00:00
vshift-3.ll
Added sse test patterns for r62979 and r63193.
2009-01-28 08:13:56 +00:00
vshift-4.ll
Added sse test patterns for r62979 and r63193.
2009-01-28 08:13:56 +00:00
weak.ll
…
widen_arith-1.ll
Use movaps / movd to extract vector element 0 even with sse4.1. It's still cheaper than pextrw especially if the value is in memory.
2009-01-02 05:29:08 +00:00
widen_arith-2.ll
…
widen_arith-3.ll
…
widen_arith-4.ll
…
widen_arith-5.ll
…
widen_arith-6.ll
…
widen_cast-1.ll
…
widen_cast-2.ll
…
widen_cast-3.ll
…
widen_cast-4.ll
…
widen_cast-5.ll
…
widen_cast-6.ll
Added missing support to widen an operand from a bit convert.
2009-01-15 22:43:38 +00:00
widen_conv-1.ll
…
widen_conv-2.ll
…
widen_conv-3.ll
…
widen_conv-4.ll
…
widen_select-1.ll
…
widen_shuffle-1.ll
…
widen_shuffle-2.ll
…
x86-64-and-mask.ll
…
x86-64-arg.ll
…
x86-64-asm.ll
…
x86-64-dead-stack-adjust.ll
…
x86-64-disp.ll
…
x86-64-frameaddr.ll
…
x86-64-gv-offset.ll
…
x86-64-mem.ll
…
x86-64-pic-1.ll
…
x86-64-pic-2.ll
…
x86-64-pic-3.ll
…
x86-64-pic-4.ll
…
x86-64-pic-5.ll
…
x86-64-pic-6.ll
…
x86-64-pic-7.ll
…
x86-64-pic-8.ll
…
x86-64-pic-9.ll
…
x86-64-pic-10.ll
…
x86-64-pic-11.ll
…
x86-64-ret0.ll
…
x86-64-shortint.ll
…
x86-64-sret-return.ll
…
x86-64-varargs.ll
…
x86-frameaddr2.ll
…
x86-frameaddr.ll
…
xmm-r64.ll
…
xor_not.ll
Favors generating "not" over "xor -1". For example.
2009-01-21 02:09:05 +00:00
xor-undef.ll
…
xorl.ll
…
zero-remat.ll
…
zext-inreg-0.ll
…
zext-inreg-1.ll
…