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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-25 16:31:42 +00:00
Code Issues Projects Releases Wiki Activity
11,652 Commits 8 Branches 121 Tags 496 MiB
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Commit Graph

194 Commits

Author SHA1 Message Date
Thomas Harte
5e502df48b Forward motor and drive selection. 2024-04-07 22:29:00 -04:00
Thomas Harte
4f58664f97 Catch interrupt enables. 2024-04-07 22:08:12 -04:00
Thomas Harte
ffd298218c Tie off initial values; fix FIQ usage. 2024-04-07 21:58:16 -04:00
Thomas Harte
d2b077c573 Start wiring in a floppy controller. 2024-04-07 21:22:35 -04:00
Thomas Harte
547dc29a60 Remove done TODOs. 2024-04-07 15:53:42 -04:00
Thomas Harte
69aeca5c0e Aggregate mouse deltas where possible. 2024-04-06 21:24:21 -04:00
Thomas Harte
ed7cd4b277 Fix 8bpp output, all-modes cursor. 2024-04-06 20:58:44 -04:00
Thomas Harte
7bf831e1a6 Add missing 'override'. 2024-04-06 13:51:33 -04:00
Thomas Harte
0092cb8c36 Route enough to be able to mess around. 2024-04-06 13:44:05 -04:00
Thomas Harte
543b1c644a Wire mouse events to the relevant class. 2024-04-06 13:32:59 -04:00
Thomas Harte
cfaea7a90c Add cursor within 4bpp pixel area. 2024-04-05 22:43:10 -04:00
Thomas Harte
b821645644 Capture cursor palette, switch horizontal field. 2024-04-05 22:01:01 -04:00
Thomas Harte
2865190499 Resolve video addressing issues. 2024-04-05 21:56:31 -04:00
Thomas Harte
3f40e409c5 Reduce debugging heft. 2024-04-04 22:16:11 -04:00
Thomas Harte
002e235d90 Force RGB mode. 2024-04-04 22:02:47 -04:00
Thomas Harte
7d8a364658 Reimplement LDM and STM. 2024-04-04 21:59:18 -04:00
Thomas Harte
55369464ad Add a by-eye crop. A better answer will come. 2024-04-01 22:10:05 -04:00
Thomas Harte
609c117267 Switch to English RISC OS. 2024-04-01 21:44:42 -04:00
Thomas Harte
3b62a2fe7a Restrict video buffer to first 512kb. 2024-04-01 21:39:10 -04:00
Thomas Harte
0866caf934 Flaws remain, but acknowledge that pixel rate is double. 2024-04-01 10:48:20 -04:00
Thomas Harte
914b88d115 Fix non-debug build. 2024-03-31 19:17:55 -04:00
Thomas Harte
cc122a7a68 Add an SWI count, to aid in logging. 2024-03-31 18:18:26 -04:00
Thomas Harte
31979649c6 As it continues to swell, factor out the junk. 2024-03-31 18:15:48 -04:00
Thomas Harte
335d13d06d Mildly improve logging, define a few more ROMs. 2024-03-30 21:49:21 -04:00
Thomas Harte
ec785f3a8a Add URL as comment. 2024-03-30 20:54:17 -04:00
Thomas Harte
1f83a5425e Complete list of all currently-failing SWIs. 
... a lot of which are probably failing correctly, i.e. they're appropriately signalling.
 2024-03-30 20:48:47 -04:00
Thomas Harte
4882d6d0f2 Start adding SWI detail. 2024-03-30 15:16:48 -04:00
Thomas Harte
722743659b Add missing space. 2024-03-29 21:52:57 -04:00
Thomas Harte
6e64a79b52 Log failed SWIs. 2024-03-29 21:31:33 -04:00
Thomas Harte
8a6bf84cff Keyboard: log more, ignore unrecognised commands. 2024-03-29 20:54:07 -04:00
Thomas Harte
a0fdd8f4eb Resolve magic constant. 2024-03-28 22:15:27 -04:00
Thomas Harte
bda1783624 Make new guess at non-byte IOC reads. 2024-03-28 22:10:49 -04:00
Thomas Harte
2a14557478 Be more disciplined about errant accesses. 2024-03-28 21:31:07 -04:00
Thomas Harte
0ddbc67b1f Switch to default CMOS RAM obtained from RISC OS itself. 2024-03-28 21:23:49 -04:00
Thomas Harte
ffb5149890 Reinstate real CMOS RAM results. 2024-03-28 14:27:07 -04:00
Thomas Harte
4fcb85d132 Cleave off most remaining reasons for failure. 2024-03-28 10:32:27 -04:00
Thomas Harte
f175dcea58 Hack in some more potential debugging help. 2024-03-27 22:37:37 -04:00
Thomas Harte
f38bca37a2 Take another run at MEMC. 
I hadn't spotted that it is valid to map different logical pages to the same physical page with different protection levels.
 2024-03-27 10:44:40 -04:00
Thomas Harte
8b04d0e3ef Enhance and better-document I2C states. 2024-03-26 21:52:29 -04:00
Thomas Harte
a3931674dc Seemingly navigate I2C correctly. 2024-03-26 21:33:46 -04:00
Thomas Harte
3ba12630ab Quieten. 2024-03-26 12:27:37 -04:00
Thomas Harte
342d90c929 Advance CMOS/I2C to a seemingly-valid read. 2024-03-26 12:24:24 -04:00
Thomas Harte
f46af4b702 OS 3.11 seems to be able to get into BASIC. 2024-03-25 22:10:35 -04:00
Thomas Harte
b112987556 Do well enough at other colour depths. 2024-03-25 22:09:55 -04:00
Thomas Harte
fc880ac130 Double down on trans mode. 2024-03-25 21:32:56 -04:00
Thomas Harte
a2d95cb982 Shuffle notes. 2024-03-25 21:31:59 -04:00
Thomas Harte
d2776071e4 Speed up debug mode. 2024-03-25 21:31:33 -04:00
Thomas Harte
72a645ec1e Fix trans; take further crack at MEMC permissions. 2024-03-25 15:50:59 -04:00
Thomas Harte
1154ffd072 Add a 'drive in use' indicator LED. 2024-03-25 15:03:54 -04:00
Thomas Harte
8ba9708942 Hopefully resolve the mystery of the latch writes. 2024-03-25 14:54:30 -04:00
Thomas Harte
521fca6089 Expose full bus to IOC dependents; add notes. 2024-03-25 11:07:44 -04:00
Thomas Harte
ae684edbe1 Formally decode bank/offset/type. 2024-03-25 10:16:36 -04:00
Thomas Harte
fa0a9aa611 Eliminate 'has_moved_rom_'. 2024-03-24 22:36:11 -04:00
Thomas Harte
5da9e0486a Simplify control flow. 2024-03-24 22:30:26 -04:00
Thomas Harte
6980fd760c Add further heavily-manual debugging aids. 2024-03-24 22:18:30 -04:00
Thomas Harte
c1602cc8fe The keyboard and interrupts are currently trusted. 2024-03-23 21:49:52 -04:00
Thomas Harte
189dd176de Reguess state machine, fixing startup display. 2024-03-23 21:38:35 -04:00
Thomas Harte
3cf262d1f7 Improve terminology, add more documentation. 2024-03-23 21:12:01 -04:00
Thomas Harte
ccfc389274 Quieten where now confident. 2024-03-23 21:03:06 -04:00
Thomas Harte
0e07f802ac Use BACK state; accept other ACKs at any time. 2024-03-23 21:02:35 -04:00
Thomas Harte
c720f3910a Avoid implicit sign cast. 2024-03-23 20:13:25 -04:00
Thomas Harte
4215edd11b Reduce noise. 2024-03-23 20:12:56 -04:00
Thomas Harte
09a61cf1a7 Don't expect an ACK after identifying. 2024-03-23 20:12:38 -04:00
Thomas Harte
5967ad0865 Sketch out whole protocol, albeit faulty. 2024-03-23 17:08:03 -04:00
Thomas Harte
eb34c38332 Add very faulty key input. 2024-03-23 15:58:48 -04:00
Thomas Harte
5ccb18225a Provide key states to the keyboard. 2024-03-23 15:43:04 -04:00
Thomas Harte
58bbce1a15 Avoid display errors upon back-pressure. 2024-03-22 22:01:12 -04:00
Thomas Harte
9ea3e547ee Fix IRQ/FIQ return addresses. 2024-03-22 21:42:34 -04:00
Thomas Harte
fb5fdc9f10 Actually apply video divider. 2024-03-22 10:24:24 -04:00
Thomas Harte
de7b7818f4 Add 4bpp output. 2024-03-22 10:18:25 -04:00
Thomas Harte
c4e6b18294 Manage pixel buffers. 2024-03-22 10:10:13 -04:00
Thomas Harte
ae6cf69449 Move responsibility for clock division; reinstate vsync interrupt. 2024-03-22 10:01:34 -04:00
Thomas Harte
4a2dcff028 Endeavour to map colours properly. 2024-03-21 21:53:50 -04:00
Thomas Harte
aa6acec8fa Don't hoard cycles per line value. 2024-03-21 21:47:27 -04:00
Thomas Harte
4ac4da908c Reduce TODOs, do _something_ with border colour. 2024-03-21 21:40:11 -04:00
Thomas Harte
66e62857c4 Give ostensibly clean timing to the CRT. 2024-03-21 21:29:53 -04:00
Thomas Harte
bbc0d8b050 Count time in phase correctly. 2024-03-21 21:15:25 -04:00
Thomas Harte
0f8bc416d1 Make first, faulty step into displaying a field. 2024-03-21 21:10:55 -04:00
Thomas Harte
2ec235170e Finish the thought on magic constants. 2024-03-21 20:45:17 -04:00
Thomas Harte
2de1a2dd0d Install and properly clock a CRT. 2024-03-21 20:41:24 -04:00
Thomas Harte
1f49c3b113 Give sound and video somewhere to read from. 2024-03-21 20:22:20 -04:00
Thomas Harte
5c645fb3c2 Switch to a fixed output clock; retain addresses. 2024-03-21 11:51:29 -04:00
Thomas Harte
40b5227f0b Deliver all addresses to the video outputter. 2024-03-21 11:24:47 -04:00
Thomas Harte
847dba8f07 Divide input pixel rate. 2024-03-21 11:03:28 -04:00
Thomas Harte
417c6c4629 Announce changes. 2024-03-21 10:51:52 -04:00
Thomas Harte
2d6a4d490e Add dummy retrace interrupt. 2024-03-21 10:02:56 -04:00
Thomas Harte
a6ec870872 Capture more audio detail. 2024-03-21 09:47:53 -04:00
Thomas Harte
389541be6d Pipe further sound parameters; obey divider. 2024-03-20 14:43:47 -04:00
Thomas Harte
208f3e24de Audio ticks are now included. 2024-03-20 14:30:21 -04:00
Thomas Harte
1341816791 Break apart, switching to delegates for interrupts. 2024-03-20 14:26:56 -04:00
Thomas Harte
08673ff021 Switch to macro blocks of execution; flail around audio. 2024-03-20 11:42:37 -04:00
Thomas Harte
3a2d9c6082 Give user access to ROM; clean up a touch. 2024-03-19 20:26:17 -04:00
Thomas Harte
43a3959b8f Don't data abort on missing low ROM. 2024-03-19 15:06:01 -04:00
Thomas Harte
85a738acff Get rigorous on exception addresses. 2024-03-19 15:03:31 -04:00
Thomas Harte
2ad6bb099b Begin foray into disassembly. 2024-03-19 11:34:10 -04:00
Thomas Harte
9d858bc61b IRQ and FIQ should also store PC+4. 2024-03-18 14:08:08 -04:00
Thomas Harte
612c9ce49a Transfer logging responsibility. 2024-03-18 11:09:29 -04:00
Thomas Harte
7b1f800387 Extend I2C state machine. 2024-03-17 21:55:19 -04:00
Thomas Harte
47e9279bd4 Add a target for I2C activity. 2024-03-16 15:00:23 -04:00
Thomas Harte
635efd0212 Clear keyboard interrupts. 2024-03-15 23:19:26 -04:00