Thomas Harte
a15d4a156b
Starts trying to ensure appropriate address wrapping.
2020-10-12 22:33:43 -04:00
Thomas Harte
7479dc74ed
Removes printf. It's no longer telling me anything.
2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a
Introduces Jeek816 test case.
2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec
Corrects 16-bit read-modify-write.
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Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f
Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing.
2020-10-11 22:02:46 -04:00
Thomas Harte
82797fd395
Attempts to do the proper thing for interrupts.
2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0
Implements STP and WAI.
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Albeit still without fully-implemented reactions to exceptions in general.
2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3
Attempts proactively to ensure proper RTI behaviour on the 65816.
2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985
Ties to 8- or 16-bit those instructions that aren't M/X-dependent.
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This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767
I don't think RTL is needed; JML looks like it covers it.
2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac
Takes a short at TSB and TRB.
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Three to go.
2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580
Implements TCD, TDC, TCS, TSC.
2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be
Implements XBA and XCE.
2020-10-10 21:34:22 -04:00
Thomas Harte
ae87728770
Ensures M and X are exposed to the public interface.
2020-10-10 21:33:56 -04:00
Thomas Harte
28c8ba70c1
Implements REP and SEP and exposes the MX flags generally.
2020-10-10 21:23:59 -04:00
Thomas Harte
6892ac13e8
Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass.
2020-10-10 17:47:33 -04:00
Thomas Harte
0fe09cd1e4
Knocks SBC into producing likely results; disables Lorenz testing.
2020-10-10 17:13:16 -04:00
Thomas Harte
da4702851f
Fixes ADC.
2020-10-10 16:29:48 -04:00
Thomas Harte
d17c90edf7
Corrects ROL d, x.
2020-10-10 11:25:14 -04:00
Thomas Harte
7966592fae
Corrects ROL d.
2020-10-10 11:22:23 -04:00
Thomas Harte
6efe4e1753
Fixes AND, EOR, ORA. Takes an unsuccessful shot at ROL.
2020-10-10 10:53:17 -04:00
Thomas Harte
536c4d45c1
Adds additional 65816 tests, some failing; seeks to improve carry behaviour in ASL and ROL.
2020-10-10 10:11:57 -04:00
Thomas Harte
290598429a
Applies indirect page zero emulation mode addressing constraint to ix addressing.
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Lorenz's LDA tests now pass in emulation mode.
2020-10-09 23:22:48 -04:00
Thomas Harte
92e72959c3
Makes corrections to ix addressing mode and shift/roll flags.
2020-10-09 23:12:20 -04:00
Thomas Harte
c01bc784b9
Slightly reduces branching.
2020-10-09 22:21:55 -04:00
Thomas Harte
abcd86a294
Fixes accumulator instructions.
2020-10-09 22:18:22 -04:00
Thomas Harte
451f83ba51
Corrects emulation-mode read-modify-writes not to empty the data buffer.
2020-10-09 22:14:42 -04:00
Thomas Harte
b439f40fe2
Corrects INC and DEC.
2020-10-09 22:04:25 -04:00
Thomas Harte
968166b06d
Resolves incorrectly flow after setting up an absolute address.
2020-10-09 21:48:35 -04:00
Thomas Harte
0ed98cbfac
Attempts to fix direct indirect indexed; not yet successful I think.
2020-10-08 22:15:19 -04:00
Thomas Harte
7dde7cc743
Implements altered direct indexed addressing in emulation mode.
2020-10-08 22:02:14 -04:00
Thomas Harte
755627f12d
Corrects direct addressing.
2020-10-08 20:00:01 -04:00
Thomas Harte
f8004d7096
Implements RTI, corrects TAY.
2020-10-08 18:06:11 -04:00
Thomas Harte
0418f51ef2
Takes a shot at emulation-mode 'exceptions'.
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It's just RTI and correct decimal SBC left of the official 6502s now, I think.
2020-10-08 17:52:13 -04:00
Thomas Harte
054e0af071
Corrects RTS behaviour: the return address on the stack is off by one.
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Dormann's tests now proceed to a BRK.
2020-10-08 16:55:45 -04:00
Thomas Harte
907c3374c3
Attempts to clean up my JMP/JSR mess.
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Also takes a step forwards in decimal SBC, but it's not right yet.
2020-10-08 16:48:46 -04:00
Thomas Harte
f83ee97439
PHP pushes with the BRK flag set in emulation mode.
2020-10-07 21:37:50 -04:00
Thomas Harte
19aea85184
Corrects CMP, CPX, CPY carry flags.
2020-10-07 21:23:29 -04:00
Thomas Harte
1ba0a117e7
Corrects PLB, PLD, PLP.
2020-10-07 20:23:53 -04:00
Thomas Harte
b510b9d337
Adds PHD, PHK and 8-bit PHP and PLP.
2020-10-07 20:13:12 -04:00
Thomas Harte
b608e11965
Realises that not all non-incrementing PC fetches should be thrown away.
2020-10-07 20:06:27 -04:00
Thomas Harte
e68b3a2f32
Corrects JMP program.
2020-10-07 19:59:29 -04:00
Thomas Harte
f7b119ffe1
Moves temporary logging, fixes branch instructions.
2020-10-07 19:57:58 -04:00
Thomas Harte
a4cec95db1
Corrects load and transfer flag oversights.
2020-10-07 19:36:23 -04:00
Thomas Harte
84c4fa197b
Corrects DEX mapping, notes new Dormann failure case.
2020-10-07 18:48:03 -04:00
Thomas Harte
eac722cf59
Implements enough of ADC and SBC for the Dormann test definitively to fail.
2020-10-07 18:36:17 -04:00
Thomas Harte
7439a326a6
Implements BIT (in regular and immediate forms).
2020-10-07 18:15:18 -04:00
Thomas Harte
5ca1c0747f
Generalises CMP to implement CPX and CPY.
2020-10-07 18:09:56 -04:00
Thomas Harte
466ca38dfa
Corrects TXY and TYX; kudos to PatrickvL for the spot!
2020-10-07 18:05:42 -04:00
Thomas Harte
93b0839036
Knocks out some transfer operations.
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I'm possibly only seven or eight away from being able to test with complete official-opcode-only 6502 code?
2020-10-06 22:29:34 -04:00
Thomas Harte
e068cbc103
Implements CMP and fixes a zero-flag error on 16-bit operations.
2020-10-06 21:47:26 -04:00
Thomas Harte
5c809e5fbf
Implements rolls and shifts.
2020-10-06 21:34:39 -04:00
Thomas Harte
3933bf49cf
Implements BRL.
2020-10-06 21:28:54 -04:00
Thomas Harte
7065ba4857
Implements the single-byte branches.
2020-10-06 21:24:43 -04:00
Thomas Harte
ebff83018e
Implements the bitwise operators.
2020-10-06 20:17:03 -04:00
Thomas Harte
9ce9167e3c
Formalises work left to do.
2020-10-06 19:12:19 -04:00
Thomas Harte
993eff1d3d
Starts slowly, with flag manipulation.
2020-10-06 16:25:30 -04:00
Thomas Harte
18e8d6ce06
Makes an effort to factor out the 6502's [lazy] flags.
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This is preparatory to deciding which instructions, if any, are worth factoring out.
2020-10-05 22:23:33 -04:00
Thomas Harte
b7ba0d4327
Attempts to complete all addressing modes.
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So, if bugs didn't exist, it'd just be members of the Operation enum to go.
2020-10-05 17:04:57 -04:00
Thomas Harte
825201f4f2
Adds direct indirect.
2020-10-04 22:11:41 -04:00
Thomas Harte
9a05c68ce7
Attempts direct and direct indexed indirect.
2020-10-04 22:06:25 -04:00
Thomas Harte
d8dccf2500
Attempts a full implementation of MVN and MVP.
2020-10-04 19:21:04 -04:00
Thomas Harte
b416aa640f
Slightly tidies up, eliminating some store bugs.
2020-10-04 19:12:04 -04:00
Thomas Harte
4ebf594b3b
This should bring me up to absolute, y.
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i.e. next is datasheet program 7.
2020-10-04 19:02:47 -04:00
Thomas Harte
8a83024962
Starts a dash towards just completing the addressing modes for now.
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This brings me up to the end of absolute long (i.e. 4a on the datasheet).
2020-10-04 18:52:46 -04:00
Thomas Harte
bdc1136b96
Edges towards working short absolute addressing mode.
2020-10-03 21:30:24 -04:00
Thomas Harte
b83d93abc2
Accepts that whether instructions do 8- or 16-bit bus accesses depends on either M or X depending on the operation.
2020-10-02 17:08:30 -04:00
Thomas Harte
36f843bc6e
Ensure std::function is visible to 65816Storage.cpp.
2020-09-29 19:23:38 -04:00
Thomas Harte
15c87e02e9
Ditto for printf.
2020-09-29 18:53:02 -04:00
Thomas Harte
00923eac7c
Ensure assert is visible to 65816Implementation.hpp.
2020-09-29 18:52:25 -04:00
Thomas Harte
78b3ec4b10
The actual work begins: starts implementing 65816 micro-ops.
2020-09-29 18:42:07 -04:00
Thomas Harte
ef1a514785
Introduces 6502Selector, for picking either a 6502 or a 65816 based on a single template parameter.
2020-09-28 21:35:46 -04:00
Thomas Harte
6635876e7e
Performs a bare factoring out of the 6502 bus handler.
2020-09-28 18:43:53 -04:00
Thomas Harte
5645f90abe
Takes a minor first step towards actually performing 65816 instructions.
2020-09-27 22:20:58 -04:00
Thomas Harte
5449e90b34
Edges towards offering the 65816 as another type of 6502 for testing.
2020-09-26 22:31:50 -04:00
Thomas Harte
1cd664ad85
Adds a sanity check.
2020-09-26 21:43:26 -04:00
Thomas Harte
e680022b1f
Completes the opcode set.
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A million bugs yet to find.
2020-09-26 21:35:31 -04:00
Thomas Harte
67c2ce2174
Takes a run at completing the stack section.
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I'm not really sure about BRK though — does it gain a signature on the 65816?
2020-09-26 21:20:01 -04:00
Thomas Harte
596e700b60
Drags myself onto the final page of bus programs.
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233 opcodes now complete; six bus programs to go.
2020-09-26 20:57:24 -04:00
Thomas Harte
4a53b6e538
Adds push and pull, reaching 229/256 opcodes.
2020-09-26 20:38:29 -04:00
Thomas Harte
687f4bb3bb
Adds relative and relative long bus patterns.
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Many of the rest cover only one or two opcodes so this puts me at 216/256 opcodes covered; 35/47 bus programs; just more than 5/7 pages.
2020-09-26 20:24:50 -04:00
Thomas Harte
473799cb62
There's not a lot to STP and WAI from a bus program point of view.
2020-09-26 20:18:30 -04:00
Thomas Harte
3dc22a9fd5
Adds implied and immediate modes.
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... for 204/256 opcodes covered.
2020-09-26 17:42:42 -04:00
Thomas Harte
f54b655606
Adds d, x and d, y.
2020-09-26 17:26:17 -04:00
Thomas Harte
d2e868ea2b
Adds (d), y; [d], y; and [d].
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Now covered: 146/256 opcodes, 4/7 pages, 25/47 bus programs.
2020-09-26 16:55:58 -04:00
Thomas Harte
3fc649359a
Transcribes the titles of all remaining bus programs.
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Thereby frames the distance yet to travel.
2020-09-25 22:29:19 -04:00
Thomas Harte
1512ac11da
Adds (d, x) and (d) modes. Albeit by deferring the hard work.
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That's: 122/256 opcodes; 22/47 bus programs, ~3.5/7 pages transcribed. Maybe I'll be able to get to the runtime stuff sooner rather than later?
2020-09-25 22:22:30 -04:00
Thomas Harte
5039cc7bb2
Adds direct page.
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... to cover 106 opcodes.
2020-09-25 22:01:36 -04:00
Thomas Harte
5360a7b4ce
Adds block moves.
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These are fairly specialised, dealing in two data addresses simultaneously.
2020-09-25 21:49:03 -04:00
Thomas Harte
2957a31f40
Adds absolute, x; absolute,y; and accumulator addressing modes.
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Now covered: 80/256 opcodes, from 2/6 pages of the data sheet; or 16/47 bus programs.
2020-09-25 21:16:36 -04:00
Thomas Harte
8c11df52bf
Adds absolute long, x.
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Factors out the commonality of a closing read/write while I'm here.
2020-09-25 19:27:17 -04:00
Thomas Harte
2b7ffcd48f
Takes a run at JSL al.
2020-09-25 18:35:00 -04:00
Thomas Harte
7980a9033e
Adds two-thirds of absolute long.
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Working total: 31 opcodes covered; 10/47ths of bus patterns.
Next is JSL, which I think will require additional operations.
2020-09-25 18:16:49 -04:00
Thomas Harte
125ddfa513
Pays a little attention to runtime storage; completes the first page of bus patterns.
2020-09-25 18:00:02 -04:00
Thomas Harte
636e929607
Adds a check for 8/16-bit redundancy.
2020-09-25 17:42:42 -04:00
Thomas Harte
22c792dc46
Adds enough logic to start serialising instructions to somewhere.
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Possibly extraneous for now, but it means I can start stepping and testing.
2020-09-25 17:18:25 -04:00
Thomas Harte
95af1815c8
Completes absolute indexed indirect micro-ops.
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For the record: this is just six out of forty-seven codes complete. Or about two-thirds of six pages. Plenty to do even before I start trying to interpret these things.
2020-09-24 22:37:31 -04:00
Thomas Harte
d707c5ac95
Switches to generators with stable pointers; adds 2a.
2020-09-24 22:27:20 -04:00
Thomas Harte
5c9192e5e6
Switches to generators for spitting out micro-ops.
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Hopefully with a lot of parts to factor out naturally.
2020-09-24 17:36:11 -04:00
Thomas Harte
72b5584042
Immediately runs afoul of a read/write difference in the specs between 8/16-bit mode that suggests maybe this isn't a good structure.
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Perhaps generators of some sort?
2020-09-23 22:28:15 -04:00
