96 Commits

Author	SHA1	Message	Date
Thomas Harte	dcb8176d90	Corrects potential failure properly to set stack pointer state.	2019-04-24 17:58:27 -04:00
Thomas Harte	be32b1a198	Fixes JSR (An) return address [again].	2019-04-24 17:50:38 -04:00
Thomas Harte	582e4acc11	Implements ANDI/ORI/EOR to SR/CCR.	2019-04-24 17:38:59 -04:00
Thomas Harte	b9933f512f	Fixed: the word/long-word bit works the other way around.	2019-04-24 16:30:15 -04:00
Thomas Harte	e214584c76	SWAP should clear overflow and carry.	2019-04-24 13:19:56 -04:00
Thomas Harte	033b8e6b36	ADD/SUBQ #, An shouldn't set flags. ... Also, temporarily at least, adds a new means for observing CPU behaviour.	2019-04-24 09:59:54 -04:00
Thomas Harte	a08043ae88	Ensures that MOVE.b #, (xxx).l writes only a byte. ... Also rearranges some of the temporary logging functionality.	2019-04-23 19:01:58 -04:00
Thomas Harte	7c132a3ed5	Ensures 16-bit values of Xn for (d8, An, Xn) are sign extended.	2019-04-22 22:13:02 -04:00
Thomas Harte	20e774be1e	Corrects return address of JSR (An).	2019-04-22 21:11:49 -04:00
Thomas Harte	6d6046757d	Fixes predecrementing MOVEM to leave the proper address in the relevant register.	2019-04-22 15:41:09 -04:00
Thomas Harte	44eb4e51ed	Ensures DBcc properly signals program fetches.	2019-04-21 22:54:20 -04:00
Thomas Harte	3cb042a49d	Corrects the carry and extend flags for various long-word operations.	2019-04-21 22:08:18 -04:00
Thomas Harte	c66728dce2	Corrects decoding of CMPA.	2019-04-20 21:21:33 -04:00
Thomas Harte	0be9a0cb88	Corrects Scc (and other conditionals) for complex addressing modes.	2019-04-20 18:35:19 -04:00
Thomas Harte	a90f12dab7	Corrects return address for TRAP.	2019-04-20 15:49:32 -04:00
Thomas Harte	ef33b004f9	Corrects word access order of MOVEM.l.	2019-04-20 15:13:12 -04:00
Thomas Harte	2cac4b0d74	Corrects EA usage for ADDA and SUBA.	2019-04-19 23:02:41 -04:00
Thomas Harte	a49f516265	Corrects direction of MOVE [to/from] USP.	2019-04-19 22:41:06 -04:00
Thomas Harte	ee7ae11e90	Implements EXG and SWAP.	2019-04-19 11:27:43 -04:00
Thomas Harte	64c4137e5b	Begins a cleanup procedure on MOVE.	2019-04-18 23:25:19 -04:00
Thomas Harte	8c26d0c6e6	Makes an attempt at RTE and RTR.	2019-04-18 20:50:58 -04:00
Thomas Harte	e49b257e94	Takes a run at TRAP.	2019-04-17 22:21:56 -04:00
Thomas Harte	b8a0f4e831	Implements MOVE to/from USP.	2019-04-17 16:58:59 -04:00
Thomas Harte	0c05983617	Shortens impact of MULU on the instruction stream to correct parsing. ... I need to look into this.	2019-04-17 15:15:48 -04:00
Thomas Harte	41d800cb63	Fixes ADD/SUB Dn,x to use the proper destination value.	2019-04-17 10:23:47 -04:00
Thomas Harte	cadc0bd509	Mental delusion lifted: JSR doesn't look enough like BSR.	2019-04-17 10:02:14 -04:00
Thomas Harte	82b08d0e3a	Corrects addressing behaviour of nRd[+-].	2019-04-17 08:53:34 -04:00
Thomas Harte	8f77d1831b	Implements MULU and MULS.	2019-04-16 22:16:43 -04:00
Thomas Harte	d8d974e2d7	Consolidates JSR and BSR preparation.	2019-04-16 21:29:37 -04:00
Thomas Harte	9b7ca6f271	Implements the basics of EORI, ORI, ANDI, SUBI and ADDI. ... Also corrects the BSR return address.	2019-04-16 19:50:10 -04:00
Thomas Harte	8ce018dbab	Adds the necessary runtime support for AND, EOR and OR.	2019-04-16 15:17:40 -04:00
Thomas Harte	37656f14d8	Adds basic addressing modes for [ADD/SUB]Q.	2019-04-16 11:19:45 -04:00
Thomas Harte	dec5535e54	Implements (arguably: fixes) BSR.	2019-04-15 23:20:36 -04:00
Thomas Harte	ebcae25762	Adjusts JSR behaviour and further extends MOVE.	2019-04-15 22:02:52 -04:00
Thomas Harte	5330267d16	Implements BCLR.	2019-04-15 18:11:02 -04:00
Thomas Harte	892476973b	Attempts RO{X}[L/R].	2019-04-15 17:31:58 -04:00
Thomas Harte	1460a88bb3	Takes a run at JSR and RTS.	2019-04-15 15:14:38 -04:00
Thomas Harte	d25ab35d58	Finally gets setw usage correct.	2019-04-15 12:41:56 -04:00
Thomas Harte	a223cd90a1	Adds predecrement TSTs, increases QL running time, reduces logging.	2019-04-15 12:36:08 -04:00
Thomas Harte	aef92ba29c	Corrects immediate shift count.	2019-04-15 12:25:45 -04:00
Thomas Harte	328d297490	Implements the first few addressing modes for TST.	2019-04-15 10:03:52 -04:00
Thomas Harte	8a09e5fc16	Implements Scc.	2019-04-14 22:39:13 -04:00
Thomas Harte	75d8824e6b	Eliminates implicit type conversion.	2019-04-14 21:02:28 -04:00
Thomas Harte	325af677d3	Implements MOVEM to M with an implicit type conversion.	2019-04-14 20:53:27 -04:00
Thomas Harte	1003e70b5e	Implements MOVEM to R.	2019-04-14 20:02:18 -04:00
Thomas Harte	d70229201d	Advances right up to the lack of MOVEM actions being the final piece.	2019-04-14 14:45:29 -04:00
Thomas Harte	53f75034fc	Commits at least to decoding MOVEM.	2019-04-14 14:09:28 -04:00
Thomas Harte	f48db625a0	Corrects write-back and zero flag for ADD/SUB.l.	2019-04-12 16:41:00 -04:00
Thomas Harte	2ba66c4457	Corrects MOVEA, adds extra test safeguards.	2019-04-12 16:10:17 -04:00
Thomas Harte	9ce48953c1	Improves debugging printout.	2019-04-12 13:45:03 -04:00