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4342 Commits

Author SHA1 Message Date
Chris Lattner
7b1fe15de0 These definitions have been moved to common code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 06:01:00 +00:00
Chris Lattner
17f2cf05b3 Pull DAG ISel generation nodes out of the PowerPC backend to where they 
can be used by other targets.  For those targets that want to use it,
have at.  :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-10 06:00:30 +00:00
Andrew Lenharth
fa08fb2c78 This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-09 20:11:35 +00:00
Chris Lattner
65a419a104 Disable formation of rlwinm instructions from SRA bases. This fixes 
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-09 05:36:17 +00:00
Nate Begeman
7d47a61496 Remove another unused file. Preparing for the great "enable i64 on ppc32" 
merge, and using subtarget info for ptr size.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-08 01:32:34 +00:00
Nate Begeman
02f77d1e83 Remove a file that is no longer used 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-08 01:21:27 +00:00
Chris Lattner
cf01a70550 When preselecting, favor things that have low depth to select first. This 
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-07 22:10:27 +00:00
Chris Lattner
eb5d47d99d Fix a CQ regression from my patch to split F32/F64 into seperate register 
classes on PPC.  We were emitting fmr instructions to do fp extensions, which
weren't getting coallesced.  This fixes Regression/CodeGen/PowerPC/fpcopy.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-07 05:00:52 +00:00
Chris Lattner
7a7c979ddd Fix CodeGen/Generic/bool-to-double.ll 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23652 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-07 04:50:48 +00:00
Chris Lattner
6a16f6a14f Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23650 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 19:07:45 +00:00
Chris Lattner
222adac30a Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23649 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 19:03:35 +00:00
Chris Lattner
2b63e4c5e2 Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23648 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 18:56:10 +00:00
Chris Lattner
bd937b98f4 Add a recursive-iterative hybrid stage to attempt to reduce stack space, this 
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23647 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 18:45:51 +00:00
Andrew Lenharth
f3fb71bfd7 This is suppose to work now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23644 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 16:54:29 +00:00
Andrew Lenharth
d5613debf9 remove VAX compatibility instruction, we will never use this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23643 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-06 16:53:32 +00:00
Chris Lattner
f5c6e6b745 silence some warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23637 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-05 17:15:09 +00:00
Chris Lattner
ccc8ed7bb5 Add a forward def 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23621 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-04 05:09:20 +00:00
Chris Lattner
8ca02914e5 Speed up the asm printer a lot by not printing formatted LLVM asm output 
for globals


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23608 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-03 07:08:36 +00:00
Chris Lattner
3cf8760dc5 silence some warnings 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 16:29:36 +00:00
Chris Lattner
123557fcf0 silence a warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23593 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 16:27:59 +00:00
Chris Lattner
dff06f4348 add patterns for float binops and fma ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 07:46:28 +00:00
Chris Lattner
080a4b1637 Sort the cpu and features table, so that the alpha backend doesn't fail EVERY 
compile with an assertion that the tables are not sorted!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23591 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 07:13:52 +00:00
Chris Lattner
43f07a4bbc another solution to the fsel issue. Instead of having 4 variants, just force 
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 07:07:49 +00:00
Chris Lattner
867940d1b7 fsel can take a different FP type for the comparison and for the result. As such 
split the FSEL family into 4 things instead of just two.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 06:58:23 +00:00
Chris Lattner
7c0d664c21 fix an f32/f64 type mismatch 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 06:37:13 +00:00
Chris Lattner
a916dd8888 Adjust to change in ctor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23585 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-02 06:23:51 +00:00
Chris Lattner
ca0a4778a8 Minor tweak to the branch selector. When emitting a two-way branch, and if 
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 23:06:26 +00:00
Chris Lattner
b91956e7f8 like the comment says, enable this 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 23:02:40 +00:00
Chris Lattner
2c1760f636 fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 02:51:36 +00:00
Chris Lattner
919c032fa4 Modify the ppc backend to use two register classes for FP: F8RC and F4RC. 
These are used to represent float and double values, and the two regclasses
contain the same physical registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-10-01 01:35:02 +00:00
Jim Laskey
242f2557cc Should be using flag and not chain. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 23:43:37 +00:00
Nate Begeman
2b5e66fc6e Remove some now-dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 21:28:27 +00:00
Andrew Lenharth
ac35cd207f subtarget support for CIX and FIX extentions (the only 2 I care about right now) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23569 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 20:24:38 +00:00
Chris Lattner
0f21fd5204 Rename MRegisterDesc -> TargetRegisterDesc for consistency 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:49:27 +00:00
Chris Lattner
863914feb5 trim down the target info structs now that we have a preferred spill register class for each callee save register 
Why is V9 maintaining these tables manually? ugh!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23561 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:38:36 +00:00
Chris Lattner
5802be13e0 constant fold these calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:16:59 +00:00
Chris Lattner
56bcae0de9 simplify this code using the new regclass info passed in 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 17:12:38 +00:00
Chris Lattner
e4047188e7 stub out a virtual method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23554 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 06:55:18 +00:00
Chris Lattner
d174fe0ec3 CR registers are not used by this "target" 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23552 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 06:43:58 +00:00
Chris Lattner
0a37960d32 these registers don't belong to any register classes, so don't mark them 
as callee save.  They can never be generated by the compiler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23551 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 06:42:24 +00:00
Chris Lattner
ef242b1ccc Now that self referential classes are supported, get rid of a work-around. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23544 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 04:13:23 +00:00
Chris Lattner
b48d2cf5eb pass extra args 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23539 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:31:52 +00:00
Chris Lattner
0ffb1a56ff these methods get extra args 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23538 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:30:55 +00:00
Chris Lattner
97d5e6461a Pass extra regclasses into spilling code 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 01:29:42 +00:00
Chris Lattner
ff201eebea Use the 32-bit version for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23534 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-30 00:05:05 +00:00
Chris Lattner
67ab118a6d Add a bunch of patterns for F64 FP ops, add some more integer ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23533 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 23:34:24 +00:00
Chris Lattner
237733e933 Remove code for patterns that are autogenerated 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23532 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 23:33:31 +00:00
Andrew Lenharth
120ab480ab begining alpha subtarget support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23531 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 22:54:56 +00:00
Chris Lattner
c7a37a52cd tblgen autogens this pattern now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23530 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 22:37:24 +00:00
Andrew Lenharth
68fd4866de copy and paste error 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23528 91177308-0d34-0410-b5e6-96231b3b80d8
 2005-09-29 21:11:57 +00:00