Owen Anderson
846dd95f87
Fix the decoding of RFE instruction. RFEs have the load bit set, while SRSs have it unset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:31:17 +00:00
Devang Patel
49e2f03849
Add new DIE into the map asap.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:21:50 +00:00
Owen Anderson
1dd56f05e1
Remember to fill in some operands so we can print _something_ coherent even when decoding the CPS instruction soft-fails.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:15:25 +00:00
Owen Anderson
14090bf263
Improve handling of failure and unpredictable cases for CPS, STR, and SMLA instructions.
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Fixes a large class of disassembler crashes found by randomized testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137995 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:11:02 +00:00
Ivan Krasin
74af88a666
FastISel: avoid function calls between the materialization of the constant and its use.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137993 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 22:06:10 +00:00
Jim Grosbach
93b3eff623
Thumb assembly parsing and encoding for LDM instruction.
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Fix base register type and canonicallize to the "ldm" spelling rather than
"ldmia." Add diagnostics for incorrect writeback token and out-of-range
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137986 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 21:50:53 +00:00
Dan Gohman
b48ef3a3ec
Make it clear that this code is iterating in reverse order through the array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137985 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 21:27:42 +00:00
Bill Wendling
66af89f642
Revert r137871. The loop simplify pass should require all exits from a loop that
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aren't from an indirect branch need to be dominated by the loop header.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 21:10:01 +00:00
Bill Wendling
1c44d869cd
Split out the updating of PHI nodes after splitting the BB into a separate
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function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137979 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 20:51:04 +00:00
Bill Wendling
9210e840dd
Use this fantzy ArrayRef thing to pass in the list of predecessors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 20:39:32 +00:00
Akira Hatanaka
dbe9a31683
Make IsShiftedMask a static function rather than defining it in an
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anonymous namespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137975 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 20:07:42 +00:00
Nick Lewycky
58e2cdfabd
The edge from DISubprogram to DICompileUnit has been removed in recent versions
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of debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 19:07:42 +00:00
Jim Grosbach
0d1511c022
Thumb assembly parsing and encoding for CMP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 18:08:29 +00:00
Bill Wendling
d4770144d4
Use static instead of anonymous namespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:57:57 +00:00
Jim Grosbach
11cca7a2ea
Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:51:36 +00:00
Chris Lattner
489fee1b64
Rip out the old StructType APIs as warned about on llvmdev last week.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 17:39:28 +00:00
Jim Grosbach
90b5a08e1f
ARM Thumb blx instruction fixup has same data range as bl.
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These fixups are handled poorly in general, and should have a single
contiguous range of bits per fixup type, but that's not how they're
currently organized, so for now in complex ones like for blx, we just tell the
emitter it's OK for the fixup to munge any bit it wants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:57:50 +00:00
Jim Grosbach
5f687decc8
80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:50:45 +00:00
Bruno Cardoso Lopes
44d12eb998
Clenup and fix encoding for Mips ins and ext instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:30:49 +00:00
Jim Grosbach
3ce23d3d87
Add missing 'break'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137941 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 16:08:39 +00:00
Richard Osborne
c4dcf323cc
Add intrinsics for SETEV, GETED, GETET.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 13:00:48 +00:00
Duncan Sands
10077194ec
Remove unused variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 08:13:18 +00:00
Bill Wendling
a644b33e8b
Split out the analysis updating code into a helper function. No intended
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functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137926 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 05:25:23 +00:00
Bruno Cardoso Lopes
24b90e2287
Cleanup vector logical ops in AVX and add use int versions for simple
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v2i64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137919 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 02:11:34 +00:00
Devang Patel
f56ea610ed
Dramatically speedup codegen prepare by a) avoiding use of dominator tree and b) doing a separate pass over dbg.value instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137908 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-18 00:50:51 +00:00
Jim Grosbach
2f815c0b50
Remove extraneous newline from operand print method. PR10569.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137900 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:23:07 +00:00
Jim Grosbach
421993f428
Clean up patterns for Thumb1 system instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 23:08:57 +00:00
Akira Hatanaka
667645f814
Changed definition of EXT and INS per Bruno's comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137892 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:59:46 +00:00
Jim Grosbach
395b453bed
Thumb assembly parsing and encoding for B.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:57:40 +00:00
Devang Patel
f6d3a4c7c4
Do not use DebugInfoFinder. Extract debug info directly from llvm.dbg.cu named mdnode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137890 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:49:38 +00:00
Jim Grosbach
00f5d98205
Thumb assembly parsing and encoding for ASR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:49:09 +00:00
Eli Friedman
56efe24431
Atomic load/store handling for the passes using memdep (GVN, DSE, memcpyopt).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:22:24 +00:00
Bruno Cardoso Lopes
0dd80b0d69
Fix PR10688. Add support for spliting 256-bit vector shifts when the
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shift amount is variable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 22:12:20 +00:00
Jim Grosbach
c40578250d
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:58:18 +00:00
Bill Wendling
2ac0e6be05
Add the support in code-gen for the landingpad instruction lowering.
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The landingpad instruction is lowered into the EXCEPTIONADDR and EHSELECTION
SDNodes. The information from the landingpad instruction is harvested by the
'AddLandingPadInfo' function. The new EH uses the current EH scheme in the
back-end. This will change once we switch over to the new scheme. (Reviewed by
Jakob!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137880 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:56:44 +00:00
Jim Grosbach
70939ee141
ARM clean up the imm_sr operand class representation.
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Represent the operand value as it will be encoded in the instruction. This
allows removing the specialized encoder and decoder methods entirely. Add
an assembler match class while we're at it to lay groundwork for parsing the
thumb shift instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:51:27 +00:00
Bill Wendling
795cf5efba
Disable PRE for landing pads.
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PRE needs the landing pads to have their critical edges split. Doing this for a
landing pad is non-trivial. Abandon the attempt to perform PRE when we come
across a landing pad. (Reviewed by Owen!)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:32:02 +00:00
Bill Wendling
a65a3bc1a1
Revert patch. Forgot a dependent commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137875 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:28:05 +00:00
Bill Wendling
4eb2062143
Add the body of 'visitLandingPad'.
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This generates the SDNodes for the new exception handling scheme. It takes the
two values coming from the landingpad instruction and assigns them to the
EXCEPTIONADDR and EHSELECTION nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:25:14 +00:00
Bill Wendling
ab82fd9ff6
Increment the insertion iterator to beyond the landingpad instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:21:31 +00:00
Bill Wendling
0906a7c46c
Don't optimize the landing pad exit block.
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One way to exit the loop is through an unwind edge. However, that may involve
splitting the critical edge of the landing pad, which is non-trivial. Prevent
the transformation from rewriting the landing pad exit loop block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:20:43 +00:00
Bill Wendling
490606e613
Assert that we aren't trying to split the critical edge of a landing pad. Doing
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so requires more care than this generic algorithm should handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:04:05 +00:00
Jim Grosbach
ef3bf64bf8
Fix predicate for imm1_32
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137865 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 21:01:11 +00:00
Jim Grosbach
5a1cd045cd
Thumb assembly parsing and encoding for ADR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:37:40 +00:00
Bill Wendling
c9b2a987a2
Revert r137655. There is some question about whether the 'landingpad'
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instruction should be marked as potentially reading and/or writing memory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 20:36:44 +00:00
Jim Grosbach
4372ca6fe4
80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 19:55:51 +00:00
Jim Grosbach
8884148b8e
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 19:53:53 +00:00
Bill Wendling
35adbb3e48
Modify for the new EH scheme.
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Things are much saner now. We no longer need to modify the laning pads, because
of the invariants we impose upon them. The only thing DwarfEHPrepare needs to do
is convert the 'resume' instruction into a call to '_Unwind_Resume'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137855 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 19:48:49 +00:00
Eli Friedman
f23d4adbfa
Revert r137781; I agree with Duncan's comment that the situation in question is clearly impossible given the current structure of the code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 19:31:49 +00:00
Akira Hatanaka
511961a44c
Add support for half-word unaligned loads and stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:49:18 +00:00
Jordy Rose
008a5f515a
Static fields require an out-of-line definition. Fix DynamicLibrary for real.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:38:42 +00:00
Owen Anderson
0aa38ab1fb
Be more careful in the Thumb decoder hooks to avoid walking off the end of the OpInfo array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137838 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:14:48 +00:00
Eli Friedman
447f95202a
Silly mistake from r137777; restore significant isStructTy() checks. While here, be a bit more defensive
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with unknown instructions.
Fixes PR10687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137836 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 18:10:43 +00:00
Akira Hatanaka
77b85b6474
Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137831 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:45:08 +00:00
Owen Anderson
83e3f67fb6
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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Patch by James Molloy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137830 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 17:44:15 +00:00
Bruno Cardoso Lopes
0e6d230abd
Introduce matching patterns for vbroadcast AVX instruction. The idea is to
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match splats in the form (splat (scalar_to_vector (load ...))) whenever
the load can be folded. All the logic and instruction emission is
working but because of PR8156, there are no ways to match loads, cause
they can never be folded for splats. Thus, the tests are XFAILed, but
I've tested and exercised all the logic using a relaxed version for
checking the foldable loads, as if the bug was already fixed. This
should work out of the box once PR8156 gets fixed since MayFoldLoad will
work as expected.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:29:19 +00:00
Bruno Cardoso Lopes
8a5b262e80
Update comments about vector splat handling in x86
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137808 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:29:13 +00:00
Bruno Cardoso Lopes
fc0a702128
Now that we have a canonical way to handle 256-bit splats:
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vinsertf128 $1 + vpermilps $0, remove the old code that used to first
do the splat in a 128-bit vector and then insert it into a larger one.
This is better because the handling code gets simpler and also makes a
better room for the upcoming vbroadcast!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:29:10 +00:00
Akira Hatanaka
bb15e117d3
Add support for ext and ins.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 02:05:42 +00:00
Jordy Rose
f0813ceeaf
Unbork Windows build. Thanks, Francois.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 00:59:50 +00:00
Jordy Rose
0bce85fbfa
Use DynamicLibrary instances as a way to get symbols from a specific library. Preparation for upcoming (preliminary) support for plugins for the static analyzer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137791 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-17 00:29:32 +00:00
Jim Grosbach
89e2aa6afd
Thumb ADD(immediate) parsing support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:57:34 +00:00
Owen Anderson
16280308ac
Separate out Thumb1 instructions that need an S bit operand from those that do not, for the purposes of decoding them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137787 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 23:45:44 +00:00
Eli Friedman
207634263c
Extend the undef ^ undef idiom once more. No testcase: I can't figure out how to actually trigger the codepath in question at the moment, but it might get exposed in the future.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:38:34 +00:00
Jim Grosbach
194bd89829
Thumb parsing diagnostics for low-reg requirements on ADD and MOV.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137779 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:20:01 +00:00
Devang Patel
94c7ddb6f5
Until now all debug info MDNodes referred to a root MDNode, a compile unit. This simplified handling of these needs in dwarf writer. However, one side effect of this is that during link time optimization all these MDNodes are _not_ uniqued. In other words there will be N number of MDNodes describing "int", "char" and all other types, which would suddenly grow when each object file starts using libraries like STL.
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MDNodes graph structure such that compiler unit keeps track of important MDNodes and update dwarf writer to process mdnodes top-down instead of bottom up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137778 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:09:43 +00:00
Eli Friedman
054ddf799b
A bunch of misc fixes to SCCPSolver::ResolvedUndefsIn, including a fix to stop
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making random bad assumptions about instructions which are not explicitly listed.
Includes fix for rdar://9956541, a version of "undef ^ undef should return
0 because it's easier than arguing with users".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137777 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 22:06:31 +00:00
Jim Grosbach
00c9a51888
Add missing exit for 'case'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137774 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:42:31 +00:00
Jim Grosbach
3912b73c74
Thumb assembly parsing and encoding for ADD(register) instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137759 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:34:08 +00:00
Bill Wendling
55fdb4eec0
The resume instruction may throw. Return 'true' in this case.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137757 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:15:50 +00:00
Jim Grosbach
d54b4e612a
Move some logic into a helper function and expand the commentary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:12:37 +00:00
Eli Friedman
1fc291f0d3
Minor bug in SCCP found by inspection. (I don't think it's possible to hit this with a normal pass pipeline, but fixing for completeness.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137755 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 21:12:35 +00:00
Jim Grosbach
47a0d52b69
ARM thumb assembly parsing for arithmetic flag setting instructions.
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Thumb one requires that many arithmetic instruction forms have an 'S'
suffix. For Thumb2, the whether the suffix is required or precluded depends
on whether the instruction is in an IT block. Use target parser predicates
to check for these sorts of context-sensitive constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:45:50 +00:00
Bill Wendling
5b6f42f57e
Use the getFirstInsertionPt() method instead of getFirstNonPHI + an 'isa<>'
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check for a LandingPadInst.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137745 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:45:24 +00:00
Bill Wendling
d2e103daf8
Add getFirstInsertionPt() method.
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getFirstInsertionPt() returns an iterator to the first insertion point in a
basic block. This is after all PHIs and any other instruction which is required
to be at the top of the basic block (like LandingPadInst).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:42:52 +00:00
Bill Wendling
23b49ba6d5
I think there was some confusion about what I meant. :-) Replacing the comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137743 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 20:41:17 +00:00
Jim Grosbach
1b84cce77f
Remove unused Target argument from AsmParser construction methods.
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The argument is unused, and is a layering violation in any case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 18:33:49 +00:00
Bruno Cardoso Lopes
3b86598cfa
Instead of always leaving the work to the generic legalizer when
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there is no support for native 256-bit shuffles, be more smart in some
cases, for example, when you can extract specific 128-bit parts and use
regular 128-bit shuffles for them. Example:
For this shuffle:
shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32>
<i32 1, i32 0, i32 7, i32 6>
This was expanded to:
vextractf128 $1, %ymm1, %xmm2
vpextrq $0, %xmm2, %rax
vmovd %rax, %xmm1
vpextrq $1, %xmm2, %rax
vmovd %rax, %xmm2
vpunpcklqdq %xmm1, %xmm2, %xmm1
vpextrq $0, %xmm0, %rax
vmovd %rax, %xmm2
vpextrq $1, %xmm0, %rax
vmovd %rax, %xmm0
vpunpcklqdq %xmm2, %xmm0, %xmm0
vinsertf128 $1, %xmm1, %ymm0, %ymm0
ret
Now we get:
vshufpd $1, %xmm0, %xmm0, %xmm0
vextractf128 $1, %ymm1, %xmm1
vshufpd $1, %xmm1, %xmm1, %xmm1
vinsertf128 $1, %xmm1, %ymm0, %ymm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137733 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 18:21:54 +00:00
Devang Patel
e26a135248
Remove unnecessary version check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137728 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 17:41:41 +00:00
Jim Grosbach
d0d3f7e01f
ARM .align NOP padding uses different encoding pre-ARMv6.
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Patch by Kristof Beyls and James Malloy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 17:06:20 +00:00
Nadav Rotem
6d1f5d951b
Revert r137562 because it caused PR10674
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137719 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 14:34:29 +00:00
David Chisnall
7a817eae6c
Add a mechanism for optimisation plugins to register passes that all front ends can use without needing to be aware of the plugin (or the plugin be aware of the front end).
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Before 3.0, I'd like to add a mechanism for automatically loading a set of plugins from a config file. API suggestions welcome...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 13:58:41 +00:00
Bill Wendling
05d0023a95
A few places where we want to skip the landingpad instruction for insertion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137712 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 04:52:55 +00:00
Akira Hatanaka
614051a1c5
Fix handling of double precision loads and stores when Mips1 is targeted.
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Mips1 does not support double precision loads or stores, therefore two single
precision loads or stores must be used in place of these instructions. This
patch treats double precision loads and stores as if they are legal
instructions until MCInstLowering, instead of generating the single precision
instructions during instruction selection or Prolog/Epilog code insertion.
Without the changes made in this patch, llc produces code that has the same
problem described in r137484 or bails out when
MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before
register allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 03:51:51 +00:00
Akira Hatanaka
8957481e6a
Define function MipsMCInstLower::LowerOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137707 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 02:21:03 +00:00
Akira Hatanaka
78d1b11aa5
Add parameter Offset to MipsMCInstLower::LowerSymbolOperand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 02:15:03 +00:00
Eli Friedman
2199dfb0e6
Revert a bit of r137667; the logic in question can safely handle atomic load/store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137702 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 01:28:22 +00:00
Eli Friedman
6437f2c2e2
After talking with Bill, it seems like the LandingPad handling here is likely
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to be wrong (or at least somewhat suspect). Leave a FIXME for Bill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137694 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 00:41:37 +00:00
Eli Friedman
33cb445fb6
Minor comment fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137693 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-16 00:20:11 +00:00
Eli Friedman
8176388d65
Update SimplifyCFG for atomic operations.
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This commit includes a mention of the landingpad instruction, but it's not
changing the behavior around it. I think the current behavior is correct,
though. Bill, can you double-check that?
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:59:28 +00:00
Eli Friedman
fd06b3cfa1
Add comments and test for atomic load/store and mem2reg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:55:52 +00:00
Devang Patel
02e603f87a
Refactor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:47:24 +00:00
Owen Anderson
ef2865a8ea
Specify a necessary fixed bit for VLD3DUP, and otherwise rearrange the Thumb2 NEON decoding hooks to bring us closer to correctness.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:38:54 +00:00
Bruno Cardoso Lopes
8400bfe9fa
While I'm here, remove the "_alt" hacks to a series of INSERT_SUBREG and
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also add the AVX versions of the 128-bit patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137685 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:36:51 +00:00
Bruno Cardoso Lopes
1deddbbd56
Reorder declarations of vmovmskp* and also put the necessary AVX
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predicate and TB encoding fields. This fix the encoding for the
attached testcase. This fixes PR10625.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:36:45 +00:00
Devang Patel
3655a21b15
Continue to hoist uses of getCompileUnit() up. The goal is to get rid of uses of getCompileUnit().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:36:40 +00:00
Bill Wendling
5e38c473a4
In places where it's using "getFirstNonPHI", skip the landingpad instruction if necessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137679 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:19:54 +00:00
Jim Grosbach
19cb7f491f
MCTargetAsmParser target match predicate support.
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Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:03:29 +00:00
Devang Patel
6326a4238d
Add a finalize() hook, that'll let DIBuilder construct compile unit lazily.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 23:00:00 +00:00
Bill Wendling
6456a62178
Don't sink the instruction to before a landingpad instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137672 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 22:53:05 +00:00