Devang Patel
d30243402b
This is somewhat déjà-vu, but avoid using getCompileUnit() as much as possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 22:24:32 +00:00
Eli Friedman
3d30b435e2
Update inter-procedural optimizations for atomic load/store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 22:16:46 +00:00
Eli Friedman
cc4a0435b7
Update instcombine for atomic load/store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 22:09:40 +00:00
Devang Patel
d0b5a5ece4
Refactor. Variables are part of compile unit so let CompileUnit create new variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137663 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 22:04:40 +00:00
Eli Friedman
c869b4397a
Add some comments here because the lack of a check for volatile/atomic here is a bit unusual.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:56:39 +00:00
Bruno Cardoso Lopes
50b37c7920
Fix PR10656. It's only profitable to use 128-bit inserts and extracts
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when AVX mode is one. Otherwise is just more work for the type
legalizer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:45:54 +00:00
Devang Patel
7a328270be
There is no need to maintain a set to keep track of variables that use location expressions. In such cases, AT_location attribute's value will be a label.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137659 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:43:21 +00:00
Devang Patel
c890b19226
Fix warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:35:16 +00:00
Devang Patel
ff9dd0ac55
Simplify. Let DbgVariable keep track of variable's DBG_VALUE machine instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:24:36 +00:00
Bill Wendling
9d6070f161
Duncan pointed out that the LandingPadInst might read memory. (It might also
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write to memory.) Marking it as such makes some checks for immobility go away.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137655 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:14:31 +00:00
Eli Friedman
0455bb89cd
Fix llvm::CloneModule to correctly clone globals. Patch per bug report by Simon Moll on llvmdev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:05:06 +00:00
Eli Friedman
e5e771263a
Fix predicates methods on Instruction to handle atomic load/store correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137652 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 21:00:18 +00:00
Eli Friedman
667ccf231b
Misc analysis passes that need to be aware of atomic load/store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:54:19 +00:00
Eli Friedman
97671565ff
Atomic load/store support in LICM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:52:09 +00:00
Owen Anderson
c537f3be0c
Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM mode. Update tests to reflect this fact.
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Patch by James Molloy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:51:32 +00:00
Owen Anderson
92be8ab6a4
Remove dead classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:11:11 +00:00
Bill Wendling
187b1924a4
The "landingpad" instruction will never be "trivially" dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:10:51 +00:00
Owen Anderson
5df7ef6cdb
Fix incorrect encoding of UMAAL and friends. Patch by James Molloy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 20:08:25 +00:00
Devang Patel
5a1a67cd3f
Simplify mapping to variable from its abstract variable info.
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When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137637 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 19:01:20 +00:00
Owen Anderson
305e046e53
Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 19:00:06 +00:00
Owen Anderson
7a2e1770ea
Fix problems decoding the to/from-lane NEON memory instructions, and add a comprehensive NEON decoding testcase.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:44:44 +00:00
Devang Patel
a098c506a2
Refactor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137632 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:40:16 +00:00
Devang Patel
59bc4093d5
Refactor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:35:42 +00:00
Bill Wendling
06f20ebfcf
Don't try to sink the landingpad instruction. It's immobile.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:23:40 +00:00
Bill Wendling
da005e7d20
The landingpad instruction isn't loop-invariant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137628 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:22:49 +00:00
Bill Wendling
bc4fcbbc7b
Mark the SCC as "might unwind" if we run into a 'resume' instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:22:00 +00:00
Bill Wendling
1178fb4701
Skip the insertion iterator past the landingpad instruction if there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 18:21:07 +00:00
Devang Patel
6f9d8ffe5e
Refactor. Global variables are part of compile unit so let CompileUnit create new global variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 17:57:41 +00:00
Devang Patel
dbc64af76d
Refactor. A subprogram is part of compile unit so let CompileUnit construct new subprogram.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 17:24:54 +00:00
Jim Grosbach
8757a4c6ab
Update comment to reflect MC target machine refactor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137615 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-15 16:52:24 +00:00
Bill Wendling
fe7a071a19
Add inlining for the new EH scheme.
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This builds off of the current scheme, but instead of llvm.eh.exception and
llvm.eh.selector, it uses the landingpad instruction. And instead of
llvm.eh.resume, it uses the resume instruction.
Because of the invariants in the landing pad instruction, a lot of code that's
currently needed to find the appropriate intrinsic calls for an invoke
instruction won't be needed once we go to the new EH scheme. The "FIXME"s tell
us what to remove after we switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137576 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-14 08:01:36 +00:00
Nick Lewycky
28b84ff4ce
This transform is not safe. Thanks to Eli for pointing that out!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-14 04:51:49 +00:00
Nick Lewycky
7f0170c197
Don't attempt to add 'nsw' when intermediate instructions had no such guarantee.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137572 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-14 03:41:33 +00:00
Nick Lewycky
daf27ea899
Teach instcombine to preserve the nsw bit by doing an after-the-fact analysis
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when combining add and sub instructions. Patch by Pranav Bhandarkar!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137570 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-14 01:45:19 +00:00
NAKAMURA Takumi
2ed7464c09
EE: Provide the symbol "lseek64" explicitly with <unistd.h> on Linux glibc.
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With libcxx, it seems <unistd.h> would not be provided. Thanks to Ryuta Suzuki.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137567 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-14 00:34:04 +00:00
Nadav Rotem
5cbba01671
Fix PR 10635. When generating integer constants, the constant element type may
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be illegal, even if the requested vector type is legal. Testcase is one of the
disabled ARM tests in the vector-select patch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-13 20:31:45 +00:00
Bob Wilson
7dcd04abe0
Expand VMOVQQQQ pseudo instructions.
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Apparently we never added code to expand these pseudo instructions, and in
over a year, no one has noticed. Our register allocator must be awesome!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-13 05:14:55 +00:00
Nick Lewycky
53b2b73643
Remove the last improper use of getGlobalContext() from LLVM.
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This caused a race condition where a thread calls ~LLVMContextImpl which calls
Module::dropAllReferences which calls begin() on an empty ilist that would
create the sentinel, which racily accesses the global context.
This can not be fixed by locking inside createSentinel because the lock would
need to be shared with all users of the global context, including those that
reside outside LLVM's own code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-13 01:04:44 +00:00
Eli Friedman
f03bb260c9
Move "atomic" and "volatile" designations on instructions after the opcode
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of the instruction.
Note that this change affects the existing non-atomic load and store
instructions; the parser now accepts both forms, and the change is noted
in the release notes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137527 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 22:50:01 +00:00
Jim Grosbach
10342123ad
ARM STR_POST_IMM offset encoding fix in load/store optimizer.
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Tidy up the code a bit and push the definition of the value next to the uses
to try to minimize this sort of issue from arising again while I'm at it.
rdar://9945172
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137525 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 22:20:41 +00:00
Bruno Cardoso Lopes
4002d7e1e6
Fix comment!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:54:42 +00:00
Bruno Cardoso Lopes
53cae1362d
The VPERM2F128 is a AVX instruction which permutes between two 256-bit
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vectors. It operates on 128-bit elements instead of regular scalar
types. Recognize shuffles that are suitable for VPERM2F128 and teach
the x86 legalizer how to handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:48:26 +00:00
Bruno Cardoso Lopes
fa2f4fd9a2
Move code around and add comments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:48:22 +00:00
Akira Hatanaka
5c21c9e78e
Define unaligned load and store.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:30:06 +00:00
Jim Grosbach
4dfe220ad5
ARM expansion of pre-indexed store pseudos should maintain memoperands.
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Partial fix for rdar://9945172.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137513 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 21:02:34 +00:00
Bill Wendling
746c882538
Add checks for the landingpad instruction's clause values to make sure that
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they're the correct type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137511 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 20:52:25 +00:00
Owen Anderson
0d09499cf3
Fix some remaining issues with decoding ARM-mode memory instructions, and add another batch of tests.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137502 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 20:36:11 +00:00
Bill Wendling
e6e8826870
Initial commit of the 'landingpad' instruction.
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This implements the 'landingpad' instruction. It's used to indicate that a basic
block is a landing pad. There are several restrictions on its use (see
LangRef.html for more detail). These restrictions allow the exception handling
code to gather the information it needs in a much more sane way.
This patch has the definition, implementation, C interface, parsing, and bitcode
support in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137501 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 20:24:12 +00:00
Owen Anderson
79628e92e1
Fix decoding of ARM-mode STRH.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137499 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 20:02:50 +00:00
Owen Anderson
6368119c25
Specify fixed bit in the LDRBT encoding, which allows us to distinguish it from certain USAT16 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137494 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 19:41:29 +00:00
Owen Anderson
7cdbf086e4
Fix decoding of pre-indexed stores.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:12:39 +00:00
Devang Patel
cd9f6c53de
Use ArrayRef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:10:19 +00:00
Akira Hatanaka
0285e7d1c1
When constant double 0.0 is lowered, make sure 0 is copied directly from an
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integer register to a floating point register. It is not valid to interpret
the value of a floating pointer register as part of a double precision
floating point value after a single precision floating point computational
or move instruction stores its result to the register.
- In the test case, the following code is generated before this patch is
applied:
mtc1 $zero, $f2 ; unformatted copy to $f2
mov.s $f0, $f2 ; $f0 is in single format
sdc1 $f12, 0($sp)
mov.s $f1, $f2 ; $f1 is in single format
c.eq.d $f12, $f0 ; $f0 cannot be interpreted as double
- The following code is generated after this patch is applied:
mtc1 $zero, $f0 ; unformatted copy to $f0
mtc1 $zero, $f1 ; unformatted copy to $f1
c.eq.d $f12, $f0 ; $f0 can be interpreted as double
Bhanu Chetlapalli and Chris Dearman at MIPS technologies reported this bug and
provided the test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:09:59 +00:00
Chris Lattner
d95f8f6ada
add ifdef's to let people easily remove these dead api for testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137483 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:08:19 +00:00
Chris Lattner
1bcbf8582e
switch to the new struct api.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137482 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:07:26 +00:00
Chris Lattner
c4d0e9fbdd
switch to the new struct apis.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:07:07 +00:00
Chris Lattner
3ebb64946b
switch to use the new api for structtypes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137480 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:06:37 +00:00
Chris Lattner
8dcfc74af4
forward to the correct constructor.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137479 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:03:30 +00:00
Devang Patel
2e85b1bfa7
Provide fast path as Jakob suggested.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 18:01:34 +00:00
Owen Anderson
3f3570a38b
Separate decoding for STREXD and LDREXD to make each work better.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137476 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 17:58:32 +00:00
Chris Lattner
f4bbcaabeb
add two missing function impls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 17:43:05 +00:00
Chris Lattner
2c38d65fd9
add new accessors to reflect new terminology in struct types.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137468 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 17:31:02 +00:00
Nadav Rotem
c796ae1d68
Revert r137310 because it does not optimize any code on ToT
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137466 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 17:15:04 +00:00
Chad Rosier
0871221c25
Whitespace and formatting. No functional change intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137463 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 16:45:18 +00:00
Duncan Sands
1f6a329f79
Silence a bunch (but not all) "variable written but not read" warnings
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when building with assertions disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137460 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 14:54:45 +00:00
Benjamin Kramer
0d46ccfc5c
MachOWriter: Don't crash on fixups with arithmetic, emit a relocation instead. This matches what as does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137414 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 01:51:29 +00:00
Andrew Trick
32a183c84a
findDeadCallerSavedReg fix: Missing NULL terminator in register arrays.
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Fix by Ivan Baev. Sorry I don't have a unit test, but the fix is obvious so I don't want to delay it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137404 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 00:49:19 +00:00
Dan Gohman
126a54f1fa
Don't convert objc_autoreleaseReturnValue to objc_autorelease if the result
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is returned through a bitcast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137402 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 00:36:31 +00:00
Dan Gohman
a7f7db2ebd
Don't let arbitrary calls disrupt nested retain+release pairs if
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the retains and releases all use the same SSA pointer value.
Also, don't let CFG hazards disrupt nested retain+release pair
optimizations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137399 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 00:26:31 +00:00
Dan Gohman
d8e48c4821
Use an actual reverse-CFG reverse-postorder for the bottom-up traversal,
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rather than plain postorder, so that CFG constructs like single-exit loops
are reliably visited in a sensible order.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137398 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 00:24:29 +00:00
Jakob Stoklund Olesen
9b7ff12dd1
Simplify the interference checking code a bit.
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This is possible now that we now longer provide an interface to iterate
the interference overlaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-12 00:22:04 +00:00
Jim Grosbach
857e1a7b3f
ARM vector compare to zero instruction assembly parsing support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137389 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 23:51:13 +00:00
Andrew Trick
b1831c6640
Allow loop unrolling to get known trip counts from ScalarEvolution.
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SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.
This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137384 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 23:36:16 +00:00
Jakob Stoklund Olesen
8facc7def8
Remove the InterferenceResult class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137381 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:46:06 +00:00
Jakob Stoklund Olesen
fe026e1829
Eliminate the last use of InterferenceResult.
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The Query class now holds two iterators instead of an InterferenceResult
instance. The iterators are used as bookmarks for repeated
collectInterferingVRegs calls.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137380 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:46:04 +00:00
Akira Hatanaka
9029cf20e1
Enclose directive .cprestore with .set macro and nomacro to silence assembler
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warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:42:31 +00:00
Jim Grosbach
d30970fb6c
Remove no-longer-true comments. These are for the assembler, also.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:30:30 +00:00
Jim Grosbach
342ebd5f38
ARM STRT assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137372 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:18:00 +00:00
Owen Anderson
41ff834e91
Make the USAT16 operand decoder auto-generate-able.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:10:11 +00:00
Owen Anderson
adf2b094cb
Add another accidentally omitted predicate operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137370 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:08:38 +00:00
Owen Anderson
1fb6673bc2
Add missing predicate operand on SMLA and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137368 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:05:38 +00:00
Jim Grosbach
dd32ba337a
ARM load shifted register pre-index fix shift value asm parser encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 22:05:09 +00:00
Owen Anderson
796d6b7602
Handle new register classes in Thumb2 mode. Should fix the ARM buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137364 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:52:38 +00:00
Owen Anderson
05b0c9f41e
Making SEL decodings auto-generate-able.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:50:56 +00:00
Bruno Cardoso Lopes
ef8d6999f3
Add a dag combine to xform 256-bit shuffles into simple vector
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inserts and extracts. This simple combine makes us generate only 1
instruction instead of 11 in the v8 case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137362 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:50:44 +00:00
Jim Grosbach
89958d50c3
Tidy up comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137359 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:41:59 +00:00
Owen Anderson
cbfc044acd
Fix decoding support for STREXD and LDREXD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:34:58 +00:00
Jakob Stoklund Olesen
9942ba9c0e
Remove more dead code.
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collectInterferingVRegs will be the primary function for interference
checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:18:34 +00:00
Jim Grosbach
7b8f46cf9e
ARM STRH assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137353 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:17:22 +00:00
Dan Gohman
fa7eed1f8e
Fix typos in comments, and delete an unused function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137352 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:06:32 +00:00
Akira Hatanaka
1f8d822023
Add isIndirectBranch flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137351 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:05:37 +00:00
Jakob Stoklund Olesen
98985f959c
Privatize an unused part of the LiveIntervalUnion::Query interface.
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No clients are iterating over interference overlaps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137350 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 21:00:42 +00:00
Owen Anderson
508e1d3db5
Fix decoding for indexed STRB and LDRB. Fixes <rdar://problem/9926161>.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137347 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:47:56 +00:00
Jakob Stoklund Olesen
bb688cec09
Remove some dead code.
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The InterferenceResult iterator turned out to be less important than we
thought it would be. LiveIntervalUnion clients want higher level
information, like the list of interfering virtual registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137346 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:41:41 +00:00
Jim Grosbach
45251b3707
Tidy up. Remove unused template parameter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:41:13 +00:00
Owen Anderson
9fe72bcd37
Improve operand validation for Thumb2 addressing modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:40:40 +00:00
Jim Grosbach
14605d1a67
ARM STRD assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137342 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:28:23 +00:00
Andrew Trick
c12d9b9dfb
Fix for LoopInfo::updateUnloop. Remove subloop blocks from former
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ancestor loops.
I have a unit test that depends on scev-unroll, which unfortunately
isn't checked in. But I will check it in when I can.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:27:32 +00:00
Owen Anderson
26d2f0ac91
Continue to tighten decoding by performing more operand validation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:21:46 +00:00
Jim Grosbach
ade7d00f5a
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:13:35 +00:00
Jim Grosbach
10348e70d5
ARM STRBT assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 20:04:56 +00:00
Jim Grosbach
548340c4bf
ARM STR(immediate) assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137331 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:22:40 +00:00
Owen Anderson
71156a6e00
Tighten decoding of addrmode2 instructions to reject more UNPREDICTABLE cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137325 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 19:00:18 +00:00
Bruno Cardoso Lopes
59353b436a
Fix PR10492 by teaching MOVHLPS and MOVLPS mask matching to be more strict.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:59:13 +00:00
Owen Anderson
2b7b238e84
Tighten operand decoding of addrmode2 instruction. The offset register cannot be PC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137323 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:55:42 +00:00
Owen Anderson
3dac0bec7e
Correct immediate range for shifter operands. Patch by James Molloy, with additional encoding fixes added by me.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:41:59 +00:00
Benjamin Kramer
0fa5e053a9
Plug a memory leak.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:39:28 +00:00
Owen Anderson
ae0bc5deaa
Improve error checking in the new ARM disassembler. Patch by James Molloy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137320 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:24:51 +00:00
Jim Grosbach
f6713916fb
ARM push of a single register encodes as pre-indexed STR.
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Per the ARM ARM, a 'push' of a single register encodes as an STR,
not an STM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137318 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 18:07:11 +00:00
Andrew Trick
5c1ff1f2f2
Cleanup. Another thorough review by Nick!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 17:54:58 +00:00
Jim Grosbach
f8fce711e8
ARM pop of a single register encodes as post-indexed LDR.
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Per the ARM ARM, a 'pop' of a single register encodes as an LDR,
not an LDM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 17:35:48 +00:00
Nadav Rotem
6236f7f2b6
Add a comment, per Bruno's CR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 17:05:47 +00:00
Nadav Rotem
f80a894bf0
[AVX] When joining two XMM registers into a YMM register, make sure that the
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lower XMM register gets in first. This will allow the SUBREG pattern to
elliminate the first vector insertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 16:49:36 +00:00
Nadav Rotem
5e742a3e1b
[AVX] If the data which is going to be saved is already in two XMM registers
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(for example, after integer operation), do not pack the registers into a YMM
before saving. Its better to save as two XMM registers.
Before:
vinsertf128 $1, %xmm3, %ymm0, %ymm3
vinsertf128 $0, %xmm1, %ymm3, %ymm1
vmovaps %ymm1, 416(%rsp)
After:
vmovaps %xmm3, 416+16(%rsp)
vmovaps %xmm1, 416(%rsp)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 16:41:21 +00:00
Chris Lattner
f4ea68fa5a
fix PR10605 / rdar://9930964 by adding a pretty scary missed check.
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It's somewhat surprising anything works without this. Before we would
compile the testcase into:
test: # @test
movl $4, 8(%rdi)
movl 8(%rdi), %eax
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp) # 4-byte Spill
je .LBB0_2
now we produce:
test: # @test
movl 8(%rdi), %eax
movl $4, 8(%rdi)
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp) # 4-byte Spill
je .LBB0_2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137303 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 06:26:54 +00:00
Bruno Cardoso Lopes
b02c0ace20
Cleanup: Remove Int_ CVTSS2SI* forms
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 02:52:36 +00:00
Bruno Cardoso Lopes
5f1d8abf75
Splats for v8i32/v8f32 can be handled by VPERMILPSY. This was causing
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infinite recursive calls in legalize. Fix PR10562
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 02:49:44 +00:00
Bruno Cardoso Lopes
a5134a0ea3
Use the splat index to generate the desired shuffle. Otherwise we
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could only get undefs and the vector shuffle becomes an undef,
generating wrong code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 02:49:41 +00:00
Eli Friedman
586272d67c
Fix X86TargetLowering::LowerExternalSymbol so that it actually works in non-trivial cases. This hasn't been an issue before because the function isn't normally called (but apparently is used to generate a tail-call to sin() on ELF x86-32 with PIC and SSE2).
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Fixes PR9693.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 01:48:05 +00:00
Devang Patel
5bc942cc3c
Stay within 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:58:09 +00:00
Jim Grosbach
59999264e6
ARM LDRT assembly parsing and encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137282 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:43:54 +00:00
Jim Grosbach
e15defc56c
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137277 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:23:47 +00:00
Andrew Trick
fb62b8deb3
Reapplying r136844.
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An algorithm for incrementally updating LoopInfo within a
LoopPassManager. The incremental update should be extremely cheap in
most cases and can be used in places where it's not feasible to
regenerate the entire loop forest.
- "Unloop" is a node in the loop tree whose last backedge has been removed.
- Perform reverse dataflow on the block inside Unloop to propagate the
nearest loop from the block's successors.
- For reducible CFG, each block in unloop is visited exactly
once. This is because unloop no longer has a backedge and blocks
within subloops don't change parents.
- Immediate subloops are summarized by the nearest loop reachable from
their exits or exits within nested subloops.
- At completion the unloop blocks each have a new parent loop, and
each immediate subloop has a new parent.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 23:22:57 +00:00
Jim Grosbach
623a454b0f
ARM LDRH(immediate) assembly parsing and encoding support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137260 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 22:42:16 +00:00
Jim Grosbach
251bf25e7e
ARM LDRD(register) assembly parsing and encoding.
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Add support for literal encoding of #-0 along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137254 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:56:18 +00:00
Devang Patel
b549bcfe6c
Distinguish between two copies of one inlined variable. Take 2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137253 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:50:54 +00:00
Devang Patel
c722c3d5ff
While extending definition range of a debug variable, consult lexical scopes also. There is no point extending debug variable out side its lexical block. This provides 6x compile time speedup in some cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:25:34 +00:00
Devang Patel
9ce256421a
Revert unintentional parts of previous check-in.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137249 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 21:16:49 +00:00
Devang Patel
bf47fdb91c
Start using LexicalScopes utility. No intetional functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:55:27 +00:00
Jim Grosbach
53642c5335
Fix typo. Not quite sure how that slipped in there.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137245 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:49:18 +00:00
Jim Grosbach
2fd2b87ded
ARM LDRD(immediate) assembly parsing and encoding support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 20:29:19 +00:00
Nadav Rotem
614061bfb4
When performing a truncating store, it is sometimes possible to rearrange the
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data in-register prior to saving to memory. When we reorder the data in memory
we prevent the need to save multiple scalars to memory, making a single regular
store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137238 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:30:14 +00:00
Devang Patel
103b8e653c
Provide utility to extract and use lexical scoping information from machine instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137237 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:04:06 +00:00
Owen Anderson
8533ebad6f
Add initial support for decoding NEON instructions in Thumb2 mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137236 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 19:01:10 +00:00
Andrew Trick
7cb3dcb927
Comments. Thanks for the spell check Nick!
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Also, my apologies for spoiling the autocomplete on SimplifyInstructions.cpp. I couldn't think of a better filename.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 18:07:05 +00:00
Bruno Cardoso Lopes
6ad251358e
The following X86 pattern is incorrect:
...
def : Pat<(X86Movss VR128:$src1,
(bc_v4i32 (v2i64 (load addr:$src2)))),
(MOVLPSrm VR128:$src1, addr:$src2)>;
This matches a MOVSS dag with a MOVLPS instruction. However, MOVSS will replace only the low 32 bits of the register, while the MOVLPS instruction will replace the low 64 bits. A testcase is added and illustrates the bug and also modified the one that was already present. Patch by Tanya Lattner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:45:17 +00:00
Eli Friedman
1cc5e38830
Whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137226 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:39:11 +00:00
Owen Anderson
fd9085dca3
Tabs --> spaces.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137225 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:38:05 +00:00
Owen Anderson
10cbaab7b7
Cleanups based on Nick Lewycky's feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137224 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:36:48 +00:00
Owen Anderson
e66ef2d5f5
Rewrite some ARM InstrInfo functions to be most accepting of arbitrary register subclasses. Hopefully this fixes some buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137223 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 17:21:20 +00:00
Rafael Espindola
f5ade5d39a
Add support for the R and Q constraints.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 16:26:42 +00:00
Bob Wilson
21ab6c066d
Clarify a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137204 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 05:02:22 +00:00
Andrew Trick
39f40299a6
Invoke SimplifyIndVar when we partially unroll a loop. Fixes PR10534.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 04:29:49 +00:00
Andrew Trick
bddb7f8210
Cleanup. Make ScalarEvolution an explicit argument of the
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SimplifyIndVar utility since it is required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137202 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 04:22:26 +00:00
Andrew Trick
ea23daa446
SimplifyIndVar: make foldIVUser iterative to fold a chain of operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 04:01:31 +00:00
Benjamin Kramer
4a1a5eb95b
Update CMake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137198 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 03:51:58 +00:00
Andrew Trick
4b4bb71bcd
Added a SimplifyIndVar utility to simplify induction variable users
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based on ScalarEvolution without changing the induction variable phis.
This utility is the main tool of IndVarSimplifyPass, but the pass also
restructures induction variables in strange ways that are sensitive to
pass ordering. This provides a way for other loop passes to simplify
new uses of induction variables created during transformation. The
utility may be used by any pass that preserves ScalarEvolution. Soon
LoopUnroll will use it.
The net effect in this checkin is to cleanup the IndVarSimplify pass
by factoring out the SimplifyIndVar algorithm into a standalone utility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137197 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 03:46:27 +00:00
Andrew Trick
2d31ae3d9d
Cleanup. Added LoopBlocksDFS::perform for simple clients.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137195 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 01:59:05 +00:00
Bruno Cardoso Lopes
155a92a491
Fix a bug in vpermilps mask checking. Fix PR10560
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137194 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 01:54:17 +00:00
Andrew Trick
b1eede1281
Fix the LoopUnroller to handle nontrivial loops and partial unrolling.
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These are not individual bug fixes. I had to rewrite a good chunk of
the unroller to make it sane. I think it was getting lucky on trivial
completely unrolled loops with no early exits. I included some fairly
simple unit tests for partial unrolling. I didn't do much stress
testing, so it may not be perfect, but should be usable now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137190 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:28:10 +00:00
Owen Anderson
33e57515b1
Push GPRnopc through a large number of instruction definitions to tighten operand decoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137189 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-10 00:03:03 +00:00
Jakob Stoklund Olesen
c66d36028b
Trim an unneeded header.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:49:21 +00:00
Jakob Stoklund Olesen
c70c2cafe1
Promote VMOVS to VMOVD when possible.
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On Cortex-A8, we use the NEON v2f32 instructions for f32 arithmetic. For
better latency, we also send D-register copies down the NEON pipeline by
translating them to vorr instructions.
This patch promotes even S-register copies to D-register copies when
possible so they can also go down the NEON pipeline. Example:
vldr.32 s0, LCPI0_0
loop:
vorr d1, d0, d0
loop2:
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vadd.f32 d1, d1, d16
The vorr instruction looked like this after regalloc:
%S2<def> = COPY %S0, %D1<imp-def>
Copies involving odd S-registers, and copies that don't define the full
D-register are left alone.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137182 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:41:44 +00:00
Owen Anderson
de317f40f7
Tighten operand checking of register-shifted-register operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137180 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:33:27 +00:00
Bruno Cardoso Lopes
d40aa24ebf
Add 256-bit support for v8i32, v4i64 and v4f64 ISD::SELECT. Fix PR10556
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137179 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:27:13 +00:00
Owen Anderson
c36481c474
Tighten operand checking on memory barrier instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137176 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:25:42 +00:00
NAKAMURA Takumi
77c714027c
VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a non-PHInode Instruction in successors.
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Frontends(eg. clang) might pass incomplete form of IR, to step off the way beyond iterator end. In the case I had met, it took infinite loop due to meeting bogus PHInode.
Thanks to Jay Foad and John McCall.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137175 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:13:05 +00:00
NAKAMURA Takumi
8fc9b3db53
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137174 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:12:56 +00:00
Owen Anderson
35008c2f8d
Tighten operand checking on CPS instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137172 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:05:39 +00:00
Eli Friedman
21006d40ac
Representation of 'atomic load' and 'atomic store' in IR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137170 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 23:02:53 +00:00
Owen Anderson
51c9805c4b
Create a new register class for the set of all GPRs except the PC. Use it to tighten our decoding of BFI.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137168 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:48:45 +00:00
Bruno Cardoso Lopes
18deb04e9c
Add v16i16 and v32i8 store patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137166 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:39:53 +00:00
Chad Rosier
6ff9aa2aa7
Fix 80-column violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137163 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:23:40 +00:00
Bruno Cardoso Lopes
cde4a1abd5
Use fp unpack instructions to unpack int types. Until we have AVX2, this
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is the best we can do for these patterns. This fix PR10554.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137161 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:18:37 +00:00
Eli Friedman
fc430a662f
Fix a couple ridiculous copy-paste errors. rdar://9914773 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137160 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:17:39 +00:00
Rafael Espindola
69cb216009
Add a C interface to PassManagerBuilder. It is missing the addExtension
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functionality since in the C api a pass is created and added to a pass
manager in a single call.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137159 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:17:34 +00:00
Jim Grosbach
739b5576ad
Don't truncate MachO addresses.
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Assigned symbol addresses get truncated to 32-bits, even on 64-bit platforms.
That's obviously bogus.
For example,
.globl _foo
.equ _foo, 0x987654321ULL
rdar://9922863
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137158 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:12:37 +00:00
Benjamin Kramer
793b811c50
ARM Disassembler: sign extend branch immediates.
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Not sure about BLXi, but this is what the old disassembler did.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137156 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 22:02:50 +00:00
Owen Anderson
51157d2234
Silence an false-positive warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137154 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:38:14 +00:00
Owen Anderson
65e95d950d
Don't generate the old-style disassembler in CMake builds either.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137153 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:36:11 +00:00
Benjamin Kramer
9bd7c2836e
The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137151 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:34:19 +00:00
Owen Anderson
ad0d36b79f
Don't continue generating the old-style decoder file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137150 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:30:29 +00:00
Jim Grosbach
6cd5716f61
ARM fix typo in pre-indexed store lowering.
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rdar://9915869
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137148 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:22:41 +00:00
Owen Anderson
e6afbabb63
Attempt to fix CMake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137147 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:09:59 +00:00
Owen Anderson
bd9091c18d
Tighten Thumb1 branch predicate decoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137146 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 21:07:45 +00:00
Owen Anderson
8d7d2e1238
Replace the existing ARM disassembler with a new one based on the FixedLenDecoderEmitter.
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This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137144 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 20:55:18 +00:00
Bob Wilson
0dc8b42987
Put Darwin-specific code inside an __APPLE__ ifdef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137137 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 19:54:32 +00:00
Bill Wendling
c6fbe5636d
Revert r137134. It breaks some code as Eli pointed out.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137135 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 18:56:35 +00:00
Bill Wendling
a0f596c1fc
Print out the variable declaration only if it is a declaration. Otherwise, a
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'static' variable will be emitted twice.
PR10081
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137134 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 18:31:50 +00:00
Jakob Stoklund Olesen
4a74b3b933
Inflate register classes after coalescing.
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Coalescing can remove copy-like instructions with sub-register operands
that constrained the register class. Examples are:
x86: GR32_ABCD:sub_8bit_hi -> GR32
arm: DPR_VFP2:ssub0 -> DPR
Recompute the register class of any virtual registers that are used by
less instructions after coalescing.
This affects code generation for the Cortex-A8 where we use NEON
instructions for f32 operations, c.f. fp_convert.ll:
vadd.f32 d16, d1, d0
vcvt.s32.f32 d0, d16
The register allocator is now free to use d16 for the temporary, and
that comes first in the allocation order because it doesn't interfere
with any s-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137133 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 18:19:41 +00:00
Bruno Cardoso Lopes
e2406dfd89
Reapply a more appropriate solution than in r137114. AVX supports
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v4f64 = sitofp v4i32. This fix PR10559.
Also add support for v4i32 = fptosi v4f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137128 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 17:39:13 +00:00
Bruno Cardoso Lopes
a511b8e519
Revert r137114
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137127 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 17:39:01 +00:00
Justin Holewinski
4bdd4ed564
PTX: Add initial support for device function calls
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- Calls are supported on SM 2.0+ for function with no return values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 17:36:31 +00:00
Jakob Stoklund Olesen
6d1fd0b979
Move CalculateRegClass to MRI::recomputeRegClass.
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This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 16:46:27 +00:00
Renato Golin
719927a68f
Emitting ARM build attributes and values as ULEB, rather than char.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 09:50:10 +00:00
Bruno Cardoso Lopes
e321d7ffc5
Handle sitofp between v4f64 <- v4i32. Fix PR10559
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 05:48:01 +00:00
Bob Wilson
f5b757642d
Recognize the UNAME_RELEASE environment variable to match Darwin's uname.
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When this variable is set, "uname -r" will return its value instead of the
real OS version. Make this affect LLVM's triple for consistency.
<rdar://problem/9919167>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 05:13:36 +00:00
Andrew Trick
70d0ca999c
LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 03:11:29 +00:00
Bruno Cardoso Lopes
2f613c5fff
Add support for avx vector fextend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 03:04:29 +00:00
Bruno Cardoso Lopes
a1dfb63b78
Add AVX versions of 128-bit sitofp and fptosi
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 03:04:25 +00:00
Bruno Cardoso Lopes
e5118ab7bb
Add two patterns to match special vmovss and vmovsd cases. Also fix
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the patterns already there to be more strict regarding the predicate.
This fixes PR10558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 01:43:09 +00:00
Bill Wendling
8d676c2199
There is only one instance of this placeholder being created. Just use that
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instead of a vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 01:17:10 +00:00
Bill Wendling
4fa93b7ce1
Remove an instance where the 'unwind' instruction was created.
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The 'unwind' instruction was acting essentially as a placeholder, because it
would be replaced at the end of this function by a branch to the "unwind
handler". The 'unwind' instruction is going away, so use 'unreachable' instead,
which serves the same purpose as a placeholder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137098 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 01:09:21 +00:00
Devang Patel
a2b552d0ae
Print variable's inline location in debug output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 01:03:35 +00:00
Devang Patel
48d726fbce
Provide method to print variable's extended name which includes inline location.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 01:03:14 +00:00
Jakob Stoklund Olesen
c19e6dd64f
Rename member variables to follow coding standards.
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No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 01:01:27 +00:00
Bill Wendling
54f1536927
Add missing attributes to the C++ backend's output.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 00:47:30 +00:00
Bruno Cardoso Lopes
0f0e0a0e58
Make LowerVSETCC aware of AVX types and add patterns to match them.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 00:46:57 +00:00
Jakob Stoklund Olesen
8e0cca6945
Move the RegisterCoalescer private to its implementation file.
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RegisterCoalescer.h still has the CoalescerPair class interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 00:43:37 +00:00
Jakob Stoklund Olesen
27215676c7
Refer to the RegisterCoalescer pass by ID.
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A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-09 00:29:53 +00:00