Jason W Kim
13534672de
Move the ARM reloc constants to Support/ELF.h
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120035 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:40:36 +00:00
Bob Wilson
626613d5e8
Recognize sign/zero-extended constant BUILD_VECTORs for VMULL operations.
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We need to check if the individual vector elements are sign/zero-extended
values. For now this only handles constants values. Radar 8687140.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 19:38:38 +00:00
Wesley Peck
bf17cfa3f9
Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 03:31:01 +00:00
Evan Cheng
ab5c703fdb
Fix epilogue codegen to avoid leaving the stack pointer in an invalid
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state. Previously Thumb2 would restore sp from fp like this:
mov sp, r7
sub, sp, #4
If an interrupt is taken after the 'mov' but before the 'sub', callee-saved
registers might be clobbered by the interrupt handler. Instead, try
restoring directly from sp:
add sp, #4
Or, if necessary (with VLA, etc.) use a scratch register to compute sp and
then restore it:
sub.w r4, r7, #8
mov sp, r7
rdar://8465407
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 18:12:04 +00:00
Duncan Sands
3d93893895
Fix a compiler warning about Kind being used uninitialized
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when assertions are disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-22 09:38:00 +00:00
Eric Christopher
9d89311df8
Pseudos default to 4byte size, let the instruction size field notice
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that branch tables are special.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119954 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 23:38:19 +00:00
Bill Wendling
dcf0a47b76
More Thumb encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119940 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:49:36 +00:00
Bill Wendling
af2b573614
Add encoding for ARM "trap" instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119938 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 11:05:29 +00:00
Bill Wendling
9717fa9f29
The "trap" instruction is one of this which doesn't have a condition code. Hack
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the code to not add a "condition code" if it's trap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119937 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:56:05 +00:00
Bill Wendling
7d0affdf02
- Give "trap" the correct encoding, at least according to Darwin's assembler.
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- Add comments saying where the encodings for other instructions came from.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119936 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 10:55:23 +00:00
Owen Anderson
aa54524a44
Use by-name rather than by-order operand matching for some NEON encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119923 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 06:47:06 +00:00
Jim Grosbach
0eb49c57f0
BR_JTadd is ARM-only, so use the proper pseudo class to get the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119918 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 01:26:01 +00:00
Bill Wendling
5cc88a205d
A few more thumb instruction MC encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119913 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:52:33 +00:00
Eric Christopher
827656dab4
Rewrite address handling to use a structure with all the possible address
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mode variables. Handle frame indexes in load/store and allocas again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:38:27 +00:00
Eric Christopher
13df1a0bac
STRH only needs the additional operand, not t2STRH. Also invert conditional
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to match the one from the load emitter above.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119911 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 22:01:38 +00:00
Anton Korobeynikov
82f58740c7
Move some more hooks to TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119904 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 15:59:32 +00:00
Bill Wendling
a09cc2b429
Add more Thumb add instruction encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119883 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:18:47 +00:00
Bill Wendling
95a6d1759d
Add Thumb encodings for some add instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119882 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 01:00:29 +00:00
Bill Wendling
6179c31e07
Add more encodings for Thumb instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119881 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:53:35 +00:00
Bill Wendling
20272a7c5a
Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the same
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value that the one in ARMMCCodeEmitter.cpp does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119878 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 00:26:37 +00:00
Jim Grosbach
078e239f69
Fix ARM LDR* post-indexed operand encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119869 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:43 +00:00
Bill Wendling
1228038ed9
Encodings for the compare instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119868 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:14:32 +00:00
Owen Anderson
b16926940e
The Vm and Vn register fields must be the same for a register-register vmov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:12:43 +00:00
Evan Cheng
ff96b63d6f
Fix a cut-n-paste-error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119866 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 23:01:16 +00:00
Jim Grosbach
7b6ab402fe
Operand names
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119864 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:43:08 +00:00
Jim Grosbach
a30a51b16a
trailing whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119863 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:42:55 +00:00
Eric Christopher
b371658083
Don't need to save piecemeal now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:39:56 +00:00
Eric Christopher
2d630d7bc9
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119861 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:58 +00:00
Bill Wendling
0ae28e4447
Add encodings for some of the thumb ADD instructions. Tests will come once the
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asm parser can handle them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119860 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:37:33 +00:00
Eric Christopher
88de86b550
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119859 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:36:41 +00:00
Jim Grosbach
efaeb41aec
Clarify operand names.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:36:02 +00:00
Eric Christopher
0d58122e12
Refactor address mode handling into a single struct (ala x86), this
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should give allow a wider range of addressing modes.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119856 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:30:02 +00:00
Jim Grosbach
6571101cb7
Fix encoding for ARM MLS instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:22:37 +00:00
Jim Grosbach
2aeb6121a1
Add ARM encoding information for STRD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119852 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:14:31 +00:00
Jim Grosbach
a1b4175b8e
Shuffle things around a bit to keep like things together. Tidy up formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119851 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:06:57 +00:00
Bill Wendling
ba46dc06e6
Revert accidental commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119850 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:06:18 +00:00
Bill Wendling
a898166d38
Change long binary encodings to use hex instead. It's more readable. Also
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initialize missing bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119849 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 22:02:18 +00:00
Jim Grosbach
953557f445
Factor out operand encoding bits for ARM addressing mode 2 store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:35:06 +00:00
Jim Grosbach
e2d54af47f
Delete another dead class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119844 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:16:08 +00:00
Jim Grosbach
fc0cb4b906
whitespace tweak.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119843 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:14:37 +00:00
Jim Grosbach
9ef65cbbc6
Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119841 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:14:02 +00:00
Jim Grosbach
9558b4cdc4
Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 21:07:51 +00:00
Jim Grosbach
9cb15b5be5
Add ARM binary encoding information for the rest of the indexed loads.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119821 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 19:41:26 +00:00
Jim Grosbach
0c2283a910
Remove dead code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:18:37 +00:00
Jim Grosbach
f1ce7cc1d1
ARM LDRD binary encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119812 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:16:46 +00:00
Jim Grosbach
3ea4daaf50
Remove hard tabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119810 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 18:01:37 +00:00
Jim Grosbach
7a08864860
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119806 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 17:11:02 +00:00
Benjamin Kramer
7920d96964
Avoid release build warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 16:36:02 +00:00
Owen Anderson
8b8640a964
Fix decoding ambiguities of stdrex and ldrex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119801 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 13:11:50 +00:00
Evan Cheng
1f190c8bdf
These instructions are thumb2 only.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119793 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 06:28:11 +00:00
Evan Cheng
e8e67e13d4
Fix an obvious oversight.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119792 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 06:15:10 +00:00
Bill Wendling
602890dd8e
Add MC encodings for some Thumb instructions. Test for a few of them. The "bx
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lr" instruction cannot be tested just yet. It requires matching a "condition
code", but adding one of those makes things go south quickly...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 01:33:10 +00:00
Bill Wendling
cb21d1c9fd
Use array_pod_sort because the list is contiguous.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:38:19 +00:00
Owen Anderson
91a7c59134
Provide Thumb2 encodings for strex and ldrex.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119768 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:28:38 +00:00
Jim Grosbach
817c1a6ddd
Minor cleanups to a few llvm_unreachable() calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119767 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:27:09 +00:00
Bill Wendling
d1fadd8c5d
An 'unreachable' shouldn't have a '0 &&' prefix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-19 00:05:15 +00:00
Bill Wendling
50d0f58944
Add support for parsing the writeback ("!") token.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:43:05 +00:00
Jason W Kim
837caa9313
Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the .o path now works for ARM.
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Note: lo16AllZero remains in ARMInstrInfo.td - It can be factored out when Thumb movt is repaired.
Existing tests cover this update.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119760 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:37:15 +00:00
Owen Anderson
71c11825bf
Fix encodings for pkhbt, and fix some tests where I accidentally tested ARM mode instead of Thumb2.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:29:56 +00:00
Jim Grosbach
75b7b879c0
ARM Encoding information for UXTAH and friends.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 23:24:22 +00:00
Tanya Lattner
9684a7c128
Fix bug in DAGCombiner for ARM that was trying to do a ShiftCombine on illegal types (vector should be split first).
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Added test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119749 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 22:06:46 +00:00
Bill Wendling
24d22d2764
Don't allocate the SmallVector of Registers. It gets messy figuring out who
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should delete what when the object gets copied around. It's also making valgrind
upset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:50:54 +00:00
Owen Anderson
8ee9779658
Provide Thumb2 encodings for mov's that come from MOVCC SDNodes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119744 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:46:31 +00:00
Jim Grosbach
c884aff5f4
Add ARM encoding information for LDRH post-increment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119743 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:43:37 +00:00
Anton Korobeynikov
d0c3817669
Move hasFP() and few related hooks to TargetFrameInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:19:35 +00:00
Bob Wilson
d5448bb6e8
Split up ARM LowerShift function.
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This function was being called from two different places for completely
unrelated reasons. During type legalization, it was called to expand 64-bit
shift operations. During operation legalization, it was called to handle
Neon vector shifts. The vector shift code was not written to check for
illegal types, since it was assumed to be only called after type legalization.
Fixed this by splitting off the 64-bit shift expansion into a separate
function. I don't have a particular testcase for this; I just noticed it
by inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119738 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:16:28 +00:00
Owen Anderson
612fb5b9a6
More Thumb2 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 21:15:19 +00:00
Owen Anderson
821752e2e6
Fill out the set of Thumb2 multiplication operator encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119733 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 20:32:18 +00:00
Bill Wendling
707120047e
Missed the _RET versions of LDMIA.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119726 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 19:44:29 +00:00
Eric Christopher
8b3ca6216d
Rewrite stack callee saved spills and restores to use push/pop instructions.
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Remove movePastCSLoadStoreOps and associated code for simple pointer
increments. Update routines that depended upon other opcodes for save/restore.
Adjust all testcases accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 19:40:05 +00:00
Jim Grosbach
056ab107ff
ARMPseudoInst instructions should default to being considered a single 4-byte
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instruction. Any that may be expanded otherwise by MC lowering should
override this value. rdar://8683274
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119713 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 18:01:40 +00:00
Evan Cheng
5c71c7a137
Silence compiler warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119610 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:43:23 +00:00
Jim Grosbach
1251e1a8df
Remove trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119608 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:39:50 +00:00
Jim Grosbach
99594eb1de
ARM PseudoInst instructions don't need or use an assembler string. Get rid of
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the operand to the pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119607 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:38:26 +00:00
Evan Cheng
1b4886dd00
Code clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119604 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:28:51 +00:00
Jim Grosbach
c6961f140a
Add FIXME.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119603 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:20:48 +00:00
Jim Grosbach
53694265a9
Refactor the ARM PICADD and PICLDR* instructions to really be pseudos and not
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just pretend to be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119602 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:15:56 +00:00
Owen Anderson
35141a9ba3
Try again at providing Thumb2 encodings for basic multiplication operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119601 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 01:08:42 +00:00
Jim Grosbach
160f8f0e67
Refactor a few ARM load instructions to better parameterize things and re-use
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common encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119598 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:46:58 +00:00
Owen Anderson
424216453f
Revert r119593 while I figure out my testing disagrees with the buildbot.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119597 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:42:51 +00:00
Owen Anderson
18333616cd
Provide correct Thumb2 encodings for basic multiplication operators.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 00:19:10 +00:00
Jim Grosbach
85eb54cf0c
Clean up LEApcrel instuction(s) a bit. It's not really a Pseudo, so don't mark
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it as such. Add some encoding information.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 23:33:14 +00:00
Owen Anderson
2f7aed39a3
Second attempt at correct encodings for Thumb2 bitfield instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119575 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 22:16:31 +00:00
Jim Grosbach
0129be281e
Fix comment typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119573 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:57:51 +00:00
Bob Wilson
05646099a0
Change ARMGlobalMerge to keep BSS globals in separate pools.
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This completes the fixes for Radar 8673120.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119566 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:39 +00:00
Bob Wilson
619a372617
Fix ARMGlobalMerge pass to check if globals are entirely within range.
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It is generally not sufficient to check if the starting offset is in range
of the maximum offset that can be efficiently used for the target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119565 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:36 +00:00
Bob Wilson
72831dc905
Change the symbol for merged globals from "merged" to "_MergedGlobals".
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This makes it more clear that the symbol is an internal, compiler-generated
name and gives a little more description about its contents.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119564 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:33 +00:00
Bob Wilson
edf046716c
Fix the ARMGlobalMerge pass to look at variable sizes instead of pointer sizes.
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It was mistakenly looking at the pointer type when checking for the size of
global variables. This is a partial fix for Radar 8673120.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119563 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:25:27 +00:00
Jim Grosbach
f8dabac604
Make the ARM BR_JTadd instruction an explicit pseudo and lower it properly
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in the MC lowering process.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119559 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 21:05:55 +00:00
Evan Cheng
6b19491468
Avoid isel movcc of large immediates when the large immediate is available in a register. These immediates aren't free.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119558 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:56:30 +00:00
Owen Anderson
5aba9f694f
Revert r119551, which broke buildbots.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119555 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:48:51 +00:00
Owen Anderson
23465a06f4
Provide Thumb2 encodings for bitfield instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119551 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:35:29 +00:00
Evan Cheng
c4af4638df
Remove ARM isel hacks that fold large immediates into a pair of add, sub, and,
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and xor. The 32-bit move immediates can be hoisted out of loops by machine
LICM but the isel hacks were preventing them.
Instead, let peephole optimization pass recognize registers that are defined by
immediates and the ARM target hook will fold the immediates in.
Other changes include 1) do not fold and / xor into cmp to isel TST / TEQ
instructions if there are multiple uses. This happens when the 'and' is live
out, machine sink would have sinked the computation and that ends up pessimizing
code. The peephole pass would recognize situations where the 'and' can be
toggled to define CPSR and eliminate the comparison anyway.
2) Move peephole pass to after machine LICM, sink, and CSE to avoid blocking
important optimizations.
rdar://8663787, rdar://8241368
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:13:28 +00:00
Rafael Espindola
f2dc4aa562
make isVirtualSection a virtual method on MCSection. Chris' suggestion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 20:03:54 +00:00
Owen Anderson
46c478e802
More miscellaneous Thumb2 encodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119546 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 19:57:38 +00:00
Bill Wendling
df8d94da01
Add missing opcodes now that this function's used in more than one place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119539 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 19:16:20 +00:00
Jim Grosbach
89e14c7579
More ARM encoding bits. LDRH now encodes properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 18:11:11 +00:00
Evan Cheng
baa45f7298
Revert r119109 for now. It's breaking 176.gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119492 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 09:31:04 +00:00
Evan Cheng
3642e64c11
Simplify code that toggle optional operand to ARM::CPSR.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119484 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 08:06:50 +00:00
Chris Lattner
b75c651e22
tidy up
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 05:41:32 +00:00