Bruno Cardoso Lopes
147b7cad2f
Add AVX ld/st XCSR register.
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Add VEX encoding bits for MRMXm x86 form
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107204 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 20:35:48 +00:00
Bruno Cardoso Lopes
721ef73d88
Add AVX non-temporal stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107178 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 18:22:01 +00:00
Bruno Cardoso Lopes
de173ca1fb
Move non-temporal movs to their own section
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 17:42:37 +00:00
Bruno Cardoso Lopes
ea86423cbd
Add sqrt, rsqrt and rcp AVX instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107166 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 17:26:30 +00:00
Duncan Sands
78337b4d4d
Remove pointless and unused variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107130 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 12:48:49 +00:00
Bruno Cardoso Lopes
b22dc70a5c
Refactoring of arithmetic instruction classes with unary operator
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107116 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 01:33:09 +00:00
Bruno Cardoso Lopes
4548260ab5
Described the missing AVX forms of SSE2 convert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-29 00:36:02 +00:00
Bill Wendling
c25ccf85e5
Reduce indentation via early exit. NFC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107067 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-28 21:08:32 +00:00
Gabor Greif
1cfe44a460
use ArgOperand API
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106944 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26 11:51:52 +00:00
Jakob Stoklund Olesen
4f5d84e4ad
When creating X86 MUL8 and DIV8 instructions, make sure we don't produce
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CopyFromReg nodes for aliasing registers (AX and AL). This confuses the fast
register allocator.
Instead of CopyFromReg(AL), use ExtractSubReg(CopyFromReg(AX), sub_8bit).
This fixes PR7312.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106934 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-26 00:39:23 +00:00
Bruno Cardoso Lopes
bdffc16d65
Add AVX convert CVTSS2SI{rr,rm} and CVTDQ2PS{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:47:23 +00:00
Bruno Cardoso Lopes
161476ec34
Reapply r106896:
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Add several AVX MOV flavors
Support VEX encoding for MRMDestReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106912 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:33:42 +00:00
Bruno Cardoso Lopes
95325b08a3
revert this now, it's using avx instead of sse :)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106906 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 23:04:29 +00:00
Bruno Cardoso Lopes
544a95d716
Add several AVX MOV flavors
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Support VEX encoding for MRMDestReg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106896 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 22:27:51 +00:00
Dale Johannesen
1784d160e4
The hasMemory argument is irrelevant to how the argument
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for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 21:55:36 +00:00
Dan Gohman
ca5b8553ea
pcmpeqd and friends are Commutable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106886 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 21:05:35 +00:00
Bill Wendling
730c07e50d
- Reapply r106066 now that the bzip2 build regression has been fixed.
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- 2010-06-25-CoalescerSubRegDefDead.ll is the testcase for r106878.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:48:10 +00:00
Bruno Cardoso Lopes
39afa908de
Move the last piece of SSE2 convert instructions to the Convert Instructions section
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106877 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:29:27 +00:00
Bruno Cardoso Lopes
6560ed35b4
More SSE refactoring, this time with different types of MOVs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106876 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 20:22:12 +00:00
Bruno Cardoso Lopes
0491e132fc
Refactoring of more SSE conversion instructions. Also add some AVX instrinsics Int_V... placeholders
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 18:06:22 +00:00
Bruno Cardoso Lopes
a0ae87fd5d
Add some AVX convert instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-25 00:39:30 +00:00
Bruno Cardoso Lopes
8b94297727
Refactoring of SSE convert intrinsics
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106808 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 23:37:07 +00:00
Bruno Cardoso Lopes
f241b26792
Refactoring of SSE conversion instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106804 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:22:21 +00:00
Bruno Cardoso Lopes
e0c437333e
Refactor SSE cmp intrinsics and declare the same for AVX
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106796 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 22:04:40 +00:00
Bruno Cardoso Lopes
788184365a
- Add AVX COMI{SS,SD}{rr,rm} and UCOMI{SS,SD}{rr,rm}.
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- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:48:23 +00:00
Dale Johannesen
e5ff9ef195
Disallow matching "i" constraint to symbol addresses when
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address requires a register or secondary load to compute
(most PIC modes). This improves "g" constraint handling. 8015842.
The test from 2007 is attempting to test the fix for PR1761,
but since -relocation-model=static doesn't work on Darwin
x86-64, it was not testing what it was supposed to be testing
and was passing erroneously. Fixed to use Linux x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106779 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 20:14:51 +00:00
Dan Gohman
4e39e9da0f
Reapply r106634, now that the bug it exposed is fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 14:30:44 +00:00
Chris Lattner
645b209c4a
Teach the x86 mc assembler that %dr6 = %db6, this implements
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rdar://8013734
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106725 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:29:18 +00:00
Chris Lattner
adabe1a92c
more cleanups
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:18:14 +00:00
Chris Lattner
02758a44e4
reduce indentation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106723 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 07:16:25 +00:00
Dan Gohman
6b13cbca61
Fix a bug in the code which determines when it's safe to use the
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bt instruction, which was exposed by r106263.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 02:07:59 +00:00
Eric Christopher
37106afe02
Add a couple more quick comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106717 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 02:07:57 +00:00
Bruno Cardoso Lopes
6539dc6e6c
Add AVX CMP{SS,SD}{rr,rm} instructions and encoding testcases
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106705 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:32:06 +00:00
Bruno Cardoso Lopes
34a491bd8e
Move SSE and AVX shuffle, unpack and compare code to more appropriate places
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106702 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-24 00:15:50 +00:00
Bruno Cardoso Lopes
e93e300ad0
Add AVX MOVMSK{PS,PD}rr instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106683 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:30:27 +00:00
Bruno Cardoso Lopes
428256b818
Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106678 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 21:10:57 +00:00
Eric Christopher
749bb7e2d9
Update according to feedback.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106677 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:49:35 +00:00
Bruno Cardoso Lopes
7dbfd07e32
Add AVX SHUF{PS,PD}{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106672 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:07:15 +00:00
Nico Weber
50b9efc2a8
Add support for the x86 instructions "pusha" and "popa".
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106671 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 20:00:58 +00:00
Daniel Dunbar
cbe762b5d1
Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106634 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 17:09:26 +00:00
Jim Grosbach
f1ab49e83a
The generic DAG combiner can now fold atomic fences when needed, so switch
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to using that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106633 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 16:25:07 +00:00
Eric Christopher
18ebf74781
Update uses, defs, and comments for darwin tls patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106621 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 08:01:49 +00:00
Daniel Dunbar
d24c9d5f91
Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.
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Conflicts:
lib/CodeGen/MachineSink.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106614 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-23 00:48:25 +00:00
Bruno Cardoso Lopes
62a76c6401
Add AVX compare packed instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:37:59 +00:00
Bruno Cardoso Lopes
0caca3967b
Reapply support for AVX unpack and interleave instructions, with
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testcases this time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106593 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 23:02:38 +00:00
Bruno Cardoso Lopes
c3d57b179c
Add AVX MOV{SS,SD}{rr,rm} instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106588 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:38:56 +00:00
Bill Wendling
19d8597bca
Fix the formatting of the switch statement and add a missing break.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106586 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 22:16:17 +00:00
Jim Grosbach
dd11ee2273
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106574 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 20:52:02 +00:00
Bruno Cardoso Lopes
d3a067bbc2
Reorganize logical and arithmetic SSE 1 & 2 instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106557 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 18:17:40 +00:00
Bruno Cardoso Lopes
f23919b3e9
Reorganize SSE instructions, making easier to see oportunities for refactoring
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106556 91177308-0d34-0410-b5e6-96231b3b80d8
2010-06-22 18:09:32 +00:00