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2115 Commits

Author SHA1 Message Date
Brian Gaeke
215fb76865 Make -print-machineinstrs show us the code both before and after reg. alloc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12344 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-12 21:19:08 +00:00
Alkis Evlogimenos
a3f66842b2 Add support for a wider range of CMOV instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12336 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-12 17:59:56 +00:00
Chris Lattner
9f24a077bd ADd support for select instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12316 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-12 05:52:14 +00:00
Misha Brukman
b8bda13140 Move implementations of functions here, which avoids #including <cstdlib> in the 
header file and all those who #include it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12297 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-11 23:52:43 +00:00
Brian Gaeke
c760d647c6 Get rid of the abort in PhyRegAlloc::finishSavingState(). 
Make an explicit call to it from runOnFunction() if we know we're supposed to
write into the global. This is lame (esp. the const_cast), but it solves
the problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12291 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-11 19:46:30 +00:00
Brian Gaeke
c46f8a4f42 Give pass a name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12290 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-11 19:23:15 +00:00
Misha Brukman
db760d00c3 Fix compilation on Sparc: assert(0) => abort() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12289 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-11 19:08:24 +00:00
Brian Gaeke
cf68bd5fc1 In PhyRegAlloc::saveState(), dump Arguments' saved-state, and try to 
make the output more compact.

Divorce state-saving from the doFinalization method; for some reason it's not
getting called when I want it to, at Reoptimizer time. Put the guts in
PhyRegAlloc::finishSavingState(). Put an abort() in it so that I can be really
really sure that it's getting called.

Update comments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12286 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-11 06:45:52 +00:00
Brian Gaeke
36061dab06 Remove ghostly directory from the build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12285 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-11 04:42:41 +00:00
Brian Gaeke
d1b3679214 Move all the SaveState options and stuff inton one spot at the top of the file. 
De-constify SaveStateToModule; we have to set both it and SaveRegAllocState
explicitly in the reoptimizer.
Make SaveRegAllocState an 'external location' option.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12278 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-10 22:21:03 +00:00
Brian Gaeke
14068d9f97 Only call verifySavedState if SaveRegAllocState is set AND debugging flag is on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12277 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-10 22:01:59 +00:00
Alkis Evlogimenos
519f4e76b7 Check if printing of implicit uses is required for all types of shift 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12258 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-09 06:10:15 +00:00
Brian Gaeke
cf47198a49 Hmm, who left this sitting around in my tree 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12255 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-09 04:49:13 +00:00
Alkis Evlogimenos
cc2a2a530f Differentiate between extended precision floats (80-bit) and double precision floats (64-bit) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12254 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-09 03:37:54 +00:00
Alkis Evlogimenos
0309066f6c Use newly added API to emit bytes for instructions that gas misassembles 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12253 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-09 03:35:34 +00:00
Alkis Evlogimenos
39c2005b70 Add emitInstruction() API so that we can get the bytes of a simple instruction 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12252 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-09 03:34:53 +00:00
Alkis Evlogimenos
f6e8156008 Constify things a bit 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12251 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-09 03:30:12 +00:00
Brian Gaeke
8b16a16918 Change PhyRegAlloc::saveStateForValue()'s arg type to deal with 
AllocInfo.Instruction becoming an int.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12247 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 23:22:03 +00:00
Brian Gaeke
54a76b8808 Save argument list alloc state by recording it as the operands of Instruction 
#-1. Other minor changes to deal with AllocInfo.Instruction becoming an int.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12246 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 23:22:02 +00:00
Brian Gaeke
757ccd5149 Make AllocInfo's Instruction an int, so that we can overload it for arguments. 
(Instruction #-1's operands = argument list).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12245 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 23:22:01 +00:00
Chris Lattner
9b3c702614 Avoid allocating special registers a bit more robustly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12207 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 03:48:07 +00:00
Chris Lattner
7dee5daf85 Implement folding explicit load instructions into binary operations. For a 
testcase like this:

int %test(int* %P, int %A) {
        %Pv = load int* %P
        %B = add int %A, %Pv
        ret int %B
}

We now generate:
test:
        mov %ECX, DWORD PTR [%ESP + 4]
        mov %EAX, DWORD PTR [%ESP + 8]
        add %EAX, DWORD PTR [%ECX]
        ret

Instead of:
test:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EAX, DWORD PTR [%EAX]
        add %EAX, %ECX
        ret

... saving one instruction, and often a register.  Note that there are a lot
of other instructions that could use this, but they aren't handled.  I'm not
really interested in adding them, but mul/div and all of the FP instructions
could be supported as well if someone wanted to add them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12204 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 01:58:35 +00:00
Chris Lattner
721d2d4a6e Rearrange and refactor some code. No functionality changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12203 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-08 01:18:36 +00:00
Alkis Evlogimenos
13d362f310 Add memory operand version of conditional move. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12190 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-07 03:19:11 +00:00
Brian Gaeke
08f64c3321 Support return values of basic integer types. 
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12186 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:32:28 +00:00
Brian Gaeke
a8056fabeb Sort stanzas into Sparc V8 book page number order. 
Add RET, RETL.  Rename SAVE, RESTORE & JMPL for consistency.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12185 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:32:13 +00:00
Brian Gaeke
bda4a3c61a Hack it so we do not try to allocate values to G0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12184 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:31:32 +00:00
Brian Gaeke
d69b3c58d3 Make prolog align stack properly. Make epilog not touch any registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12183 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:31:21 +00:00
Brian Gaeke
a8b00cafc4 Emit register names in lowercase, as required by the assembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12182 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 05:30:21 +00:00
Brian Gaeke
a98e051417 Teach getRegClassForType where to find FP registers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12180 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-06 03:54:13 +00:00
Brian Gaeke
62aa28aef3 Asm output is looking a lot better; not correct for all operands yet though. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12143 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-05 08:39:09 +00:00
Brian Gaeke
7a3ae1fbad Support -print-machineinstrs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12124 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 19:22:16 +00:00
Brian Gaeke
323819e4e1 make -print-machineinstrs work for both SparcV9 and X86 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 19:16:23 +00:00
Alkis Evlogimenos
ce1e500e2f Add assertion for scale verification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12120 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 18:05:02 +00:00
Brian Gaeke
4acfd039f9 Asm printer support, based on x86 - only prints mnemonics for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12113 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 06:00:41 +00:00
Brian Gaeke
da69e7d9b3 Double-FP pseudo-registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12112 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 05:15:03 +00:00
Brian Gaeke
775158d62a Subtract instructions; minor cleanups 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12111 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 04:37:45 +00:00
Brian Gaeke
e7173b7e8e Floating point regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12110 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 04:37:22 +00:00
Brian Gaeke
e806173ab6 Simple copyConstantToReg support, SETHIi and ORri 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12107 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-04 00:56:25 +00:00
Brian Gaeke
bc1d27aa6e Support add - note, still missing important copyConstantToRegister stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12106 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-03 23:03:14 +00:00
Chris Lattner
b06f103d0c SPECIFY a target data to initialize the CBE target with. Until now we have 
been using the default target data layout object to lower malloc instructions,
causing us to allocate more memory than we needed!  This could improve the
performance of the CBE generated code substantially!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12088 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-03 02:14:15 +00:00
Chris Lattner
2bed9ecc4b Add a new constructor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12087 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-03 02:12:47 +00:00
Misha Brukman
538607fe45 Doxygenify some comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12064 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 23:53:11 +00:00
Chris Lattner
ec726a1a6e Add this back, as its absence introduces assertions, and it seems to work now 
that Instructions are annotable again


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12045 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 15:28:27 +00:00
Tanya Lattner
f048bfd97d fix bug in previous checkin 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12044 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 15:05:17 +00:00
Brian Gaeke
05b15fb075 TargetCacheInfo has been removed; its only uses were to propagate a constant 
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12043 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 06:43:29 +00:00
Tanya Lattner
9b3cbdbedb Adding new Modulo Scheduling graph files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12031 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:50:57 +00:00
Tanya Lattner
d14b83733e Removing old graph files with new graph files that I wrote. Updated ModuloScheduling pass, but still in progress. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12030 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:50:01 +00:00
Chris Lattner
21585221b6 Handle passing constant integers to functions much more efficiently. Instead 
of generating this code:

        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        call Y

we now generate:
        mov DWORD PTR [%ESP], 4
        mov DWORD PTR [%ESP + 4], 123
        call Y

Which hurts the eyes less.  :)

Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12028 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:42:43 +00:00
Chris Lattner
ce6096f49b Fix a minor code-quality issue. When passing 8 and 16-bit integer constants 
to function calls, we would emit dead code, like this:

int Y(int, short, double);
int X() {
  Y(4, 123, 4);
}

--- Old
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
***     mov %AX, 123
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Now we emit:
X:
        sub %ESP, 20
        mov %EAX, 4
        mov DWORD PTR [%ESP], %EAX
        mov %AX, 123
        movsx %EAX, %AX
        mov DWORD PTR [%ESP + 4], %EAX
        fld QWORD PTR [.CPIX_0]
        fstp QWORD PTR [%ESP + 8]
        call Y
        mov %EAX, 0
        # IMPLICIT_USE %EAX %ESP
        add %ESP, 20
        ret

Next up, eliminate the mov AX and movsx entirely!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12026 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-03-01 02:34:08 +00:00
Chris Lattner
08d4963d49 Move the private MachineInstrAnnot.h into a private directory. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12003 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 19:12:51 +00:00
Chris Lattner
e85f2348c9 Do not use explicit casts that hide the dependence on Instruction being 
annotable


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12000 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 19:02:26 +00:00
Alkis Evlogimenos
96c9b8b496 Add instruction name description. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11998 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 18:44:03 +00:00
Alkis Evlogimenos
7f6124cfc2 Use correct template for SHLD and SHRD instructions so that the memory 
operand size is correctly specified.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11997 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 09:19:40 +00:00
Alkis Evlogimenos
9c22aeb0b2 Improve allocation order: 
1) For 8-bit registers try to use first the ones that are parts of the
   same register (AL then AH). This way we only alias 2 16/32-bit
   registers after allocating 4 8-bit variables.

2) Move EBX as the last register to allocate. This will cause less
   spills to happen since we will have 8-bit registers available up to
   register excaustion (assuming we use the allocation order). It
   would be nice if we could push all of the 8-bit aliased registers
   towards the end but we much prefer to keep callee saved register to
   the end to avoid saving them on entry and exit of the function.

For example this gives a slight reduction of spills with linear scan
on 164.gzip.

Before:

11221 asm-printer           - Number of machine instrs printed
  975 spiller               - Number of loads added
  675 spiller               - Number of stores added
  398 spiller               - Number of register spills

After:

11182 asm-printer           - Number of machine instrs printed
  952 spiller               - Number of loads added
  652 spiller               - Number of stores added
  386 spiller               - Number of register spills


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11996 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 09:17:01 +00:00
Alkis Evlogimenos
8295f202d9 A big X86 instruction rename. The instructions are renamed to make 
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:

ADD8rr -> add, 8-bit register, 8-bit register

IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate

IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate

MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11995 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 08:50:03 +00:00
Brian Gaeke
6ac5300fbc Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11994 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 08:40:03 +00:00
Chris Lattner
ee352852e7 Eliminate the X86-specific BMI functions, using BuildMI instead. 
Replace uses of addZImm with addImm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11992 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 07:22:16 +00:00
Chris Lattner
168aa90bf6 Fix a miscompilation of 197.parser that occurs when you have single basic 
block loops.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11990 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 07:10:16 +00:00
Chris Lattner
dce363d5ec Adjust to change in TII ctor arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11987 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 06:31:44 +00:00
Chris Lattner
bceb68807f Eliminate the distinction between "real" and "unreal" instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11986 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 06:31:16 +00:00
Chris Lattner
1ddf475b6a These two virtual methods are never called. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11984 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:59:33 +00:00
Chris Lattner
0755912c38 Remove a TON of flags that noone cares about 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11983 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:58:30 +00:00
Chris Lattner
9a945277c0 Noone calls these virtual methods 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11982 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:58:16 +00:00
Chris Lattner
0723969e87 This is the only file in the system that uses this enum. eliminate it. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11981 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:57:59 +00:00
Chris Lattner
e1274de2c9 Implement initial prolog/epilog code insertion methods. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11979 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 05:18:30 +00:00
Alkis Evlogimenos
8777d241cf Use correct template for ADC instruction with memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11974 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 02:18:17 +00:00
Chris Lattner
1c809c594b Add an instruction selector capable of selecting 'ret void' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11973 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-29 00:27:00 +00:00
Alkis Evlogimenos
da474adb21 SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them 
to denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11972 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:46:44 +00:00
Alkis Evlogimenos
8e475b8cfd Floating point loads/stores act on memory operands. Rename them to 
denote this fact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11971 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:42:35 +00:00
Alkis Evlogimenos
91c4b52e7f Rename instruction templates to be easier to the human eye to 
parse. The name is now I (operand size)*. For example:

Im32 -> instruction with 32-bit memory operands.

Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
          operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11970 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 23:09:03 +00:00
Alkis Evlogimenos
f8da4d8839 Uncomment instructions that take both an immediate and a memory 
operand but their sizes differ.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 22:06:59 +00:00
Alkis Evlogimenos
5ab29b504d Each instruction now has both an ImmType and a MemType. This describes 
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11967 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 22:02:05 +00:00
Chris Lattner
9ff6ba1ea1 Change this so that LLC actually tries to run the code generator, though it will 
immediately abort due to lack of an instruction selector. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11963 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 20:21:45 +00:00
Chris Lattner
8a62384253 SparcV8 now builds. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11960 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:54:00 +00:00
Chris Lattner
9a89f37dc7 fine grainify namespacification 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11959 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:53:18 +00:00
Chris Lattner
8d8a6bc7a3 Finegrainify namespacification 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11958 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:52:49 +00:00
Chris Lattner
a85d46eea8 Tab completion is our friend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11957 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:45:39 +00:00
Chris Lattner
83ba99ac46 Clean up rules 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11956 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:43:40 +00:00
Chris Lattner
275f6459ab Bring this directory into "it actually compiles" land 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11955 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:37:18 +00:00
Chris Lattner
f13bd49d6a Fix multiple inclusion problem 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11954 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 19:31:32 +00:00
Alkis Evlogimenos
745502a04b Do not generate instructions with mismatched memory/immediate sized 
operands. The X86 backend doesn't handle them properly right now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11944 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 06:01:43 +00:00
Alkis Evlogimenos
84cda0f470 Further comment updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11933 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 03:20:31 +00:00
Alkis Evlogimenos
a643a1a528 Update comments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11932 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 03:12:31 +00:00
Alkis Evlogimenos
2eae379388 My previous commit broke the jit. The shift instructions always take 
an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.

A bug still exists:

def SHLDmri32  : I2A8 <"shld", 0xA4, MRMDestMem>, TB;           // [mem32] <<= [mem32],R32 imm8

The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11931 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-28 02:56:26 +00:00
Brian Gaeke
9f78bf2ff7 Turn off the SparcV9MachineCodeDestructionPass for now, because it's buggy 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11930 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 21:15:40 +00:00
Brian Gaeke
3d1fdee339 Correct DestroyMachineFunction's getPassName 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11929 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 21:01:14 +00:00
Alkis Evlogimenos
fa5229691f Fix argument size for SHL, SHR, SAR, SHLD and SHRD families of 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11923 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 19:46:30 +00:00
Alkis Evlogimenos
f9186e38d5 Fix encoding of ADD and SUB family of instructions. Also rearrange 
them so that they are consistent with AND, XOR, etc...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11922 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 18:57:00 +00:00
Alkis Evlogimenos
169584ed45 Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11921 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 18:55:12 +00:00
Alkis Evlogimenos
08388a4787 Add memory operand folding support for the SETcc family of 
instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11907 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 16:13:37 +00:00
Alkis Evlogimenos
e56508eb7e Add memory operand folding support for SHLD and SHRD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11905 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 15:03:18 +00:00
Alkis Evlogimenos
58ec60589b Add memory operand folding support for SHL, SHR and SAR, SHLD instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11903 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 09:28:43 +00:00
Alkis Evlogimenos
e35ba65b02 Rename SHL, SHR, SAR, SHLD and SHLR instructions to make them 
consistent with the rest and also pepare for the addition of their
memory operand variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11902 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-27 06:57:05 +00:00
John Criswell
3799eec3cf Fixes for PR258 and PR259. 
Functions with linkonce linkage are declared with weak linkage.
Global floating point constants used to represent unprintable values
(such as NaN and infinity) are declared static so that they don't interfere
with other CBE generated translation units.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11884 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 22:20:58 +00:00
Alkis Evlogimenos
71e353ed35 Uncomment assertions that register# != 0 on calls to 
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11882 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 22:00:20 +00:00
Chris Lattner
0e7ac16926 Use a map instead of annotations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11875 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 08:02:17 +00:00
Chris Lattner
8dd8d261a4 Fix some warnings, some of which were spurious, and some of which were real 
bugs.  Thanks Brian!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11859 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 01:20:02 +00:00
Misha Brukman
23e6c1ff45 Instructions to call and return from functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11858 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-26 00:37:12 +00:00
Brian Gaeke
367b91d1bd Great sparc renaming fallout IV: Sparc --> SparcV9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11844 91177308-0d34-0410-b5e6-96231b3b80d8
 2004-02-25 22:09:36 +00:00