Sirish Pande
3423132f2e
Remove iostream from New Value Jump.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154703 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 21:01:35 +00:00
Sirish Pande
8800cada20
Add support for Hexagon Architectural feature, New Value Jump.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 20:22:31 +00:00
Sirish Pande
05a2fea6a5
Pass to replace tranfer/copy instructions into combine instruction where possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154695 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 20:22:19 +00:00
Craig Topper
7a2e472d52
Silence various build warnings from Hexagon backend that show up in release builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154660 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-13 06:38:11 +00:00
Ted Kremenek
6bc572ce0e
Update CMake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154622 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 22:15:23 +00:00
Evandro Menezes
cc8002a129
Hexagon: fix CMake error.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154620 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 21:44:58 +00:00
Sirish Pande
d1a87a6806
HexagonPacketizer patch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 21:06:38 +00:00
Evandro Menezes
e5041e6fa8
Hexagon: enable assembler output through the MC layer.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-12 17:55:53 +00:00
Craig Topper
4e02f23de2
Prune some includes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153502 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27 07:54:11 +00:00
Craig Topper
63bd926a41
Remove some unnecessary forward declarations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153245 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-22 06:52:14 +00:00
Craig Topper
79aa3417eb
Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17 18:46:09 +00:00
Craig Topper
70de1e442d
Fix some copy and paste remnants of Cell and SPU in Hexagon files.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152981 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17 09:39:20 +00:00
Craig Topper
8aea2dd964
Fix typo in file header.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152980 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17 09:28:37 +00:00
Craig Topper
1e0c9ab0d1
Pass TargetOptions to HexagonTargetMachine constructor by reference to match other targets and the base class.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-17 09:24:09 +00:00
Craig Topper
c5eaae4e9b
Convert more static tables of registers used by calling convention to uint16_t to reduce space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152538 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-11 07:57:25 +00:00
Craig Topper
9ebfbf8b9f
Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152016 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-05 05:37:41 +00:00
Craig Topper
e4fd907e72
Use uint16_t to store register overlaps to reduce static data.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04 10:43:23 +00:00
Craig Topper
015f228861
Use uint16_t to store registers in callee saved register tables to reduce size of static data.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-04 03:33:22 +00:00
Evan Cheng
4bfcd4acbc
Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 18:51:51 +00:00
Daniel Dunbar
20bd5296ce
Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 15:36:07 +00:00
Evan Cheng
ec52aaa12f
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
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the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.
Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.
rdar://8979299
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-28 06:42:03 +00:00
Evandro Menezes
0cae72c47e
Delete incorrect reference to inexistent Hexagon architecture manuals.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151582 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27 23:00:52 +00:00
Craig Topper
a89cc7fec8
Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151514 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27 02:59:43 +00:00
Benjamin Kramer
120cfdf0e0
Remove unused cl::opt, make another opt static.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151398 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-24 22:09:25 +00:00
Brendon Cahoon
1854722327
Fix the numbering of some of the registers and reclassify a couple of them.
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Also, some basic clean up. Patch by Evandro Menezes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151266 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-23 18:17:17 +00:00
Sirish Pande
dfb4fe2862
Efficient pattern for store truncate. Patch by Evandro Menezes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-22 16:45:10 +00:00
Jia Liu
31d157ae1a
Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-18 12:03:15 +00:00
Sirish Pande
ab7955b9ce
Optimize redundant sign extends and negation of predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150606 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 18:52:27 +00:00
Eric Christopher
2a4bc1e703
Revert "Replacing HexagonOptimizeSZExtends with HexagonPeephole."
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This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150605 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 18:34:25 +00:00
Eric Christopher
eddd6abdde
Revert "Optimize redundant sign extends and negation of predicates"
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as it's breaking the build.
This reverts commit 11241abca5
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150604 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 18:32:25 +00:00
Sirish Pande
a997b3e51a
Replacing HexagonOptimizeSZExtends with HexagonPeephole.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150603 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 18:31:35 +00:00
Sirish Pande
11241abca5
Optimize redundant sign extends and negation of predicates
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150601 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-15 18:22:18 +00:00
Sirish Pande
b9f69a41fc
Test for commit access.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-09 15:20:33 +00:00
Andrew Trick
1dd8c8560d
Codegen pass definition cleanup. No functionality.
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Moving toward a uniform style of pass definition to allow easier target configuration.
Globally declare Pass ID.
Globally declare pass initializer.
Use INITIALIZE_PASS consistently.
Add a call to the initializer from CodeGen.cpp.
Remove redundant "createPass" functions and "getPassName" methods.
While cleaning up declarations, cleaned up comments (sorry for large diff).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150100 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 21:23:13 +00:00
Brendon Cahoon
c635ebdb1a
Use TSFlag bit to describe instruction properties.
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Creating the isPredicated TSFlag enables the code
to use the property defined in the instruction format
instead of using a large switch statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-08 18:25:47 +00:00
Craig Topper
bc2198133a
Convert assert(0) to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-07 02:50:20 +00:00
Benjamin Kramer
f3fd7ee415
Hexagon: Remove forbidden iostream includes (it introduces static initializers)
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Reorder includes while at it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149863 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-06 10:19:29 +00:00
Craig Topper
655b8de7b2
Convert assert(0) to llvm_unreachable
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-05 07:21:30 +00:00
Andrew Trick
061efcfb3e
TargetPassConfig: confine the MC configuration to TargetMachine.
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Passes prior to instructon selection are now split into separate configurable stages.
Header dependencies are simplified.
The bulk of this diff is simply removal of the silly DisableVerify flags.
Sorry for the target header churn. Attempting to stabilize them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149754 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-04 02:56:59 +00:00
Andrew Trick
843ee2e6a4
Added TargetPassConfig. The first little step toward configuring codegen passes.
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Allows command line overrides to be centralized in LLVMTargetMachine.cpp.
LLVMTargetMachine can intercept common passes and give precedence to command line overrides.
Allows adding "internal" target configuration options without touching TargetOptions.
Encapsulates the PassManager.
Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs.
Allows modifying the target configuration hooks without rebuilding the world.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149672 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-03 05:12:41 +00:00
Rafael Espindola
6ac40af2de
Fix the cmake build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 23:40:51 +00:00
Andrew Trick
ee498d3254
VLIW specific scheduler framework that utilizes deterministic finite automaton (DFA).
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This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling.
Patch by Sergei Larin!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149547 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-01 22:13:57 +00:00
David Blaikie
4d6ccb5f68
More dead code removal (using -Wunreachable-code)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 21:51:11 +00:00
Jakob Stoklund Olesen
31867660cb
Add a CoveredBySubRegs property to Register descriptions.
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When set, this bit indicates that a register is completely defined by
the value of its sub-registers.
Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers. For example, the
ARM registers D8-D15 are callee-saved. This now automatically implies
that Q4-Q7 are call-preserved.
Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148363 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18 00:16:39 +00:00
Chad Rosier
6da0ef9ca4
Initializing to false makes better sense. Thanks, David.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147679 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-06 20:11:59 +00:00
Chad Rosier
99eecd3676
Fix uninitialized variable warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147675 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-06 19:59:58 +00:00
Benjamin Kramer
27baab62e7
Clean up some Release build warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147289 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-27 11:41:05 +00:00
Benjamin Kramer
4c1ea552c5
Hexagon: Remove unused variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-18 12:00:09 +00:00
Benjamin Kramer
903456245b
Hexagon: Fix a nasty order-of-initialization bug.
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Reenable the tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146750 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 19:08:59 +00:00
NAKAMURA Takumi
46209476e7
Target/Hexagon: Fix CMake build.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-16 06:21:02 +00:00