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13104 Commits

Author SHA1 Message Date
Chris Lattner
2466472a2b Add support for target-specific dag combines 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26443 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:53:38 +00:00
Chris Lattner
00ffed0468 Add interfaces for targets to provide target-specific dag combiner optimizations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26442 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:52:55 +00:00
Chris Lattner
5750df9d69 Add a new AddToWorkList method, start using it 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26441 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 04:03:14 +00:00
Chris Lattner
0b1a85f110 Pull shifts by a constant through multiplies (a form of reassociation), 
implementing Regression/CodeGen/X86/mul-shift-reassoc.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26440 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 03:44:24 +00:00
Evan Cheng
d30bf01e90 Vector op lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26438 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 01:11:20 +00:00
Evan Cheng
860771d2d8 Vector ops lowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26436 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 01:09:54 +00:00
Evan Cheng
f338dd881f New type v2f32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26435 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 01:06:22 +00:00
Evan Cheng
1ab7d859cf - Added VConstant as an abstract version of ConstantVec. 
- All abstrct vector nodes must have # of elements and element type as their
first two operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26432 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-03-01 00:51:13 +00:00
Evan Cheng
aafc1412b1 Another entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26430 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 23:38:49 +00:00
Evan Cheng
8c03fe4aca Don't match x << 1 to LEAL. It's better to emit x + x. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26429 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 21:13:57 +00:00
Jim Laskey
45ccae5b7d Add const, volatile, restrict support. 
Add array of debug descriptor support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26428 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 20:15:07 +00:00
Chris Lattner
06e1e25368 Fix a regression in a patch from a couple of days ago. This fixes 
Transforms/InstCombine/2006-02-28-Crash.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26427 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 19:47:20 +00:00
Chris Lattner
bf751e2d6f Add a subtarget feature for the stfiwx instruction. I know the G5 has it, 
but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26421 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 07:08:22 +00:00
Chris Lattner
35a9f5a241 Compile: 
unsigned foo4(unsigned short *P) { return *P & 255; }
unsigned foo5(short *P) { return *P & 255; }

to:

_foo4:
        lbz r3,1(r3)
        blr
_foo5:
        lbz r3,1(r3)
        blr

not:

_foo4:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr
_foo5:
        lhz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26419 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:49:37 +00:00
Chris Lattner
f4c8575c27 remove implemented item 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26418 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:36:04 +00:00
Chris Lattner
15045b6973 Fold "and (LOAD P), 255" -> zextload. This allows us to compile: 
unsigned foo3(unsigned *P) { return *P & 255; }
as:
_foo3:
        lbz r3, 3(r3)
        blr

instead of:

_foo3:
        lwz r2, 0(r3)
        rlwinm r3, r2, 0, 24, 31
        blr

and:

unsigned short foo2(float a) { return a; }

as:
_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lhz r3, -2(r1)
        blr

instead of:

_foo2:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26417 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:35:35 +00:00
Chris Lattner
71d9ebcbc1 fold (sra (sra x, c1), c2) -> (sra x, c1+c2) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26416 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 06:23:04 +00:00
Chris Lattner
9794392781 Implement rem.ll:test[7-9] and PR712 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26415 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 05:49:21 +00:00
Chris Lattner
6c9951b0da Simplify some code now that the RHS of a rem can't be 0 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26413 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 05:40:55 +00:00
Chris Lattner
19ccd5c757 Rearrange some code, fold "rem X, 0", implementing rem.ll:test6 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26411 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-28 05:30:45 +00:00
Chris Lattner
22873462c9 Add support for output memory constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26410 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 23:45:39 +00:00
Jim Laskey
9a777a3a8e Qualify dwarf namespace inside llvm namespace. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26409 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 22:37:23 +00:00
Nate Begeman
6e53ceb0d4 readme updates 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26405 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 22:08:36 +00:00
Jim Laskey
8a8e9756c8 Partial enabling of functions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26404 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 20:37:42 +00:00
Chris Lattner
a34544d96c Don't print constant initializers, they may span lines now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26403 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 20:09:23 +00:00
Jim Laskey
bd76184e67 Supporting multiple compile units. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26402 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 17:27:12 +00:00
Jim Laskey
0d086af82b Re-orging file. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26401 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 12:43:29 +00:00
Jim Laskey
38a409c7ae Pretty print large struct constants. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26400 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 10:33:53 +00:00
Jim Laskey
dae29989cf Removed dependency on how operands are printed (want multi-line.) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26399 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 10:29:04 +00:00
Chris Lattner
3e88a4d700 Merge two almost-identical pieces of code. 
Make this code more powerful by using ComputeMaskedBits instead of looking
for an AND operand.  This lets us fold this:

int %test23(int %a) {
        %tmp.1 = and int %a, 1
        %tmp.2 = seteq int %tmp.1, 0
        %tmp.3 = cast bool %tmp.2 to int  ;; xor tmp1, 1
        ret int %tmp.3
}

into: xor (and a, 1), 1


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26396 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 02:38:23 +00:00
Chris Lattner
26ab9a9218 Fold (A^B) == A -> B == 0 
and  (A-B) == A  ->  B == 0


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26394 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 01:44:11 +00:00
Chris Lattner
a6bc5a4d21 Implement bit propagation through sub nodes, this (re)implements 
PowerPC/div-2.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26392 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 01:00:42 +00:00
Chris Lattner
2d2536c9d7 remove some completed notes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26390 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 00:39:31 +00:00
Chris Lattner
81cd35586f Check RHS simplification before LHS simplification to avoid infinitely looping 
on PowerPC/small-arguments.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26389 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 00:36:27 +00:00
Chris Lattner
5f0c658aa4 Just like we use the RHS of an AND to simplify the LHS, use the LHS to 
simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26388 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-27 00:22:28 +00:00
Chris Lattner
ec665151b8 Add a bunch of missed cases. Perhaps the most significant of which is that 
assertzext produces zero bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26386 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 23:36:02 +00:00
Chris Lattner
02bd1b3e94 Fold (X|C1)^C2 -> X^(C1|C2) when possible. This implements 
InstCombine/or.ll:test23.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26385 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 19:57:54 +00:00
Jim Laskey
c13a72c329 Reverting. Didn't realize some developers were embedding constants in their 
target assembler code gen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26383 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 10:16:05 +00:00
Evan Cheng
140a4c4868 ConstantPoolIndex is now the displacement portion of the address (rather 
than base).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26382 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 09:12:34 +00:00
Evan Cheng
38b7327ec0 Print ConstantPoolSDNode offset field. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26381 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 08:36:57 +00:00
Evan Cheng
a09bd8190c Fixed ConstantPoolIndex operand asm print bug. This fixed 2005-07-17-INT-To-FP 
and 2005-05-12-Int64ToFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26380 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-26 08:28:12 +00:00
Jim Laskey
a3f332bdc3 Format large struct constants for readability. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26379 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 12:27:03 +00:00
Evan Cheng
51a9ed9b41 * Cleaned up addressing mode matching code. 
* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26376 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 10:09:08 +00:00
Evan Cheng
53f280a30e Updates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26375 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 10:04:07 +00:00
Evan Cheng
71fb834b50 * Allow mul, shl nodes to be codegen'd as LEA (if appropriate). 
* Add patterns to handle GlobalAddress, ConstantPool, etc.
  MOV32ri to materialize these nodes in registers.
  ADD32ri to handle %reg + GA, etc.
  MOV32mi to handle store GA, etc. to memory.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26374 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 10:02:21 +00:00
Evan Cheng
c4ee50c6b9 ConstantPoolIndex is now the displacement field of addressing mode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26373 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 09:56:50 +00:00
Evan Cheng
bbbb2fbbde Added a common about the need for X86ISD::Wrapper. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26372 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 09:55:19 +00:00
Evan Cheng
404cb4f9fa Added an offset field to ConstantPoolSDNode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26371 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 09:54:52 +00:00
Chris Lattner
28bad08411 Fix a bug that Evan exposed with some changes he's making, and that was 
exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26369 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 02:17:31 +00:00
Chris Lattner
47cb7173ea Remove debugging printout :) 
Add a minor compile time win, no codegen change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 02:03:40 +00:00
Chris Lattner
540fec6b38 Refactor some code from being inline to being out in a new class with methods. 
This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26367 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 01:51:33 +00:00
Evan Cheng
cb4a38e75d Fix an obvious bug exposed when we are doing 
ADD X, 4
==>
MOV32ri $X+4, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26366 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-25 01:37:02 +00:00
Chris Lattner
2c003e26e5 Add memory printing support for PPC. Input memory operands now work with 
inline asms! :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26365 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 20:27:40 +00:00
Chris Lattner
dd26033002 Use the PrintAsmMemoryOperand to print addressing modes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26364 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 20:21:58 +00:00
Chris Lattner
daf6bc6347 Pass all the flags to the asm printer, not just the # operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26362 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 19:50:58 +00:00
Chris Lattner
fd6d282a71 rename NumOps -> NumVals to avoid shadowing a NumOps var in an outer scope. 
Add support for addressing modes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26361 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 19:18:20 +00:00
Chris Lattner
ed18b6896e Refactor operand adding out to a new AddOperand method 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26358 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 18:54:03 +00:00
Chris Lattner
97f37a439c Fix a problem that Nate noticed that boils down to an over conservative check 
in the code that does "select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y)))".
We now compile this loop:

LBB1_1: ; no_exit
        add r6, r2, r3
        subf r3, r2, r3
        cmpwi cr0, r2, 0
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        blt cr0, LBB1_4 ; no_exit
LBB1_3: ; no_exit
        mr r3, r6
LBB1_4: ; no_exit
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

into this instead:

LBB1_1: ; no_exit
        srawi r6, r2, 31
        add r2, r2, r6
        xor r6, r2, r6
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        add r3, r3, r6
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26356 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 18:05:58 +00:00
Jim Laskey
6990600f93 Add pointer and reference types. Added short-term code to ignore NULL types 
(to allow llvm-gcc4 to build.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26355 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 16:46:40 +00:00
Jeff Cohen
7e88103cde Get VC++ building again. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26351 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:52:40 +00:00
Chris Lattner
0e43f2ba11 Implement (most of) selection of inline asm memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26350 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:13:54 +00:00
Chris Lattner
e5d8861126 Implement selection of inline asm memory operands 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26348 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 02:13:12 +00:00
Chris Lattner
87bc3bd121 Lower C_Memory operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 01:11:24 +00:00
Chris Lattner
2b7401e28e Recognize memory operand codes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26345 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-24 01:10:46 +00:00
Chris Lattner
fe3db46fe0 Parse the %*# constraint modifiers 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26341 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 23:36:53 +00:00
Jim Laskey
434b40b42f Added basic support for typedefs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26339 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 22:37:30 +00:00
Evan Cheng
d0839f3071 PPC JIT relocation model should be DynamicNoPIC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26338 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 22:18:07 +00:00
Evan Cheng
020d2e8e7a - Clean up the lowering and selection code of ConstantPool, GlobalAddress, 
and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26335 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 20:41:18 +00:00
Chris Lattner
9f6637db10 Fix an endianness problem on big-endian targets with expanded operands 
to inline asms.  Mark some methods const.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26334 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 20:06:57 +00:00
Chris Lattner
e3f01570c1 Implement the PPC inline asm "L" modifier. This allows us to compile: 
long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26333 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 19:31:10 +00:00
Chris Lattner
c3a9f8d31c Record all of the expanded registers in the DAG and machine instr, fixing 
several bugs in inline asm expanded operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26332 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 19:21:04 +00:00
Jim Laskey
f4afdd9f41 DwarfWriter reading basic type information from llvm-gcc4 code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26331 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 16:58:18 +00:00
Chris Lattner
ffab42263a Code cleanups, no functionality change 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26328 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 06:44:17 +00:00
Chris Lattner
e650a6b3f4 "." isn't enough to get a private label on linux, use ".L". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26327 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 05:25:02 +00:00
Chris Lattner
205065ae0c add a small and simple case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26326 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 05:17:43 +00:00
Evan Cheng
3032410f9b A couple of new entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26325 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 02:50:21 +00:00
Evan Cheng
a0ea0539e3 PIC related bug fixes. 
1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 02:43:52 +00:00
Evan Cheng
224ec39cab X86 codegen tweak to use lea in another case: 
Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26323 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-23 00:13:58 +00:00
Evan Cheng
f1616dadad Missing .globl for weak / link-once .text symbols. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26321 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:59:57 +00:00
Chris Lattner
f8bf116f80 Fix Regression/Transforms/LoopUnswitch/2006-02-22-UnswitchCrash.ll, which 
caused SPASS to fail building last night.

We can't trivially unswitch a loop if the exit block has phi nodes in it,
because we don't know which predecessor to use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26320 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:55:00 +00:00
Chris Lattner
9b6fb5de49 This fixes a couple of problems with expansion 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26318 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:09:03 +00:00
Chris Lattner
b3befd41b4 Don't return registers from register classes that aren't legal. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26317 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 23:00:51 +00:00
Chris Lattner
864635ad7b Change a whole bunch of code to be built around RegsForValue instead of 
a single register number.  This fully implements promotion for inline asms,
expand is close but not quite right yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26316 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 22:37:12 +00:00
Evan Cheng
4c1aa86657 - Added option -relocation-model to set relocation model. Valid values include static, pic, 
dynamic-no-pic, and default.
PPC and x86 default is dynamic-no-pic for Darwin, pic for others.
- Removed options -enable-pic and -ppc-static.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26315 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 20:19:42 +00:00
Jim Laskey
0420f2aaf9 Coordinate activities with llvm-gcc4 and dwarf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26314 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 19:02:11 +00:00
Chris Lattner
bd28e3f8ef Add some comments, simplify some code, and fix a bug that caused rewriting 
to rewrite with the wrong value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26311 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 06:37:14 +00:00
Evan Cheng
470a6adc78 Added MMX, SSE1, and SSE2 vector instructions and some simple patterns. 
Fixed some existing bugs (wrong predicates, prefixes) at the same time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26310 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 02:26:30 +00:00
Chris Lattner
1efa40f6a4 split register class handling from explicit physreg handling. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26308 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-22 00:56:39 +00:00
Chris Lattner
0f0b7d4927 Adjust to changes in getRegForInlineAsmConstraint prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26306 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:12:12 +00:00
Chris Lattner
4217ca8dc1 Updates to match change of getRegForInlineAsmConstraint prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26305 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 23:11:00 +00:00
Evan Cheng
4e4c71e423 One more round of reorg so sabre doesn't freak out. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26303 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 20:00:20 +00:00
Evan Cheng
beb07e117d A big more cleaning up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26302 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 19:30:30 +00:00
Evan Cheng
bf156d1ae6 Moving things to their proper places. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26301 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 19:26:52 +00:00
Evan Cheng
ffcb95beab Split instruction info into multiple files, one for each of x87, MMX, and SSE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26300 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 19:13:53 +00:00
Chris Lattner
a1532bc283 missed optzn 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26299 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 18:29:44 +00:00
Chris Lattner
2deb87f201 The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter 
instructions are expensive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26298 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 18:04:32 +00:00
Evan Cheng
747a90d887 Added separate alias instructions for SSE logical ops that operate on non-packed types. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26297 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 02:24:38 +00:00
Evan Cheng
7dbc0a3351 Added MMX and XMM packed integer move instructions, movd and movq. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26296 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 01:39:57 +00:00
Evan Cheng
933be3318b Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. 
Added generic vector types: VR64 and VR128.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26295 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-21 01:38:21 +00:00
Evan Cheng
aea20f50e5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit 
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26294 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-20 22:34:53 +00:00