Jim Grosbach
72f39f8436
Thumb parsing and encoding support for ADD SP instructions.
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Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:22:15 +00:00
Eli Friedman
4317fe1fc6
Fix whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138487 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:17:30 +00:00
Bill Wendling
a4c86ab073
Skip the landingpad instruction when determining the insertion point.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138481 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 21:06:46 +00:00
Eli Friedman
327236cd6c
Basic x86 code generation for atomic load and store instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138478 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 20:50:09 +00:00
Bill Wendling
b05fdd6bab
Use getFirstInsertionPt instead of getFirstNonPHI so that it skips to the proper
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insertion place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138473 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 20:28:43 +00:00
Nadav Rotem
4c7c0f2353
Implement Constant::isAllOnesValue(). Fix ConstantFolding to use the new api.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138469 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 20:18:38 +00:00
Jim Grosbach
df9ce6bbc5
When printing Thumb1 NOP ('mov r8, r8'), make sure to print the predicate.
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rdar://10015134
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138467 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 20:06:14 +00:00
Bruno Cardoso Lopes
356e988110
Mark VZEROALL as clobbering all YMM registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138461 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:48:33 +00:00
Jim Grosbach
f95aaf951b
Add missing explicit writeback operand to tSTMIA_UPD.
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rdar://10014745
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138457 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:19:42 +00:00
Evan Cheng
3e74d6fdd2
Move TargetRegistry and TargetSelect from Target to Support where they belong.
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These are strictly utilities for registering targets and components.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138450 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:08:43 +00:00
Rafael Espindola
605e2b5184
Fix a crashing bug in SplitBlock when it is called on a block with no
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dominator information even though dominators were previously computed.
Patch by Nick Sumner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138449 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:07:01 +00:00
Jim Grosbach
c7e0bb2325
Thumb add SP assembly syntax fix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138448 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 18:04:27 +00:00
Jim Grosbach
5b81584f74
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
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Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138445 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 17:46:13 +00:00
Owen Anderson
e234d02204
Be stricter in enforcing IT instruction predicate values, so that we don't end up trying to print out an illegal predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 17:21:43 +00:00
Jim Grosbach
ee61d67c2f
Tidy up. Trailing whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138437 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 16:44:17 +00:00
Richard Osborne
8f9c5cca4f
Add Uses=[SP] to call instructions. This fixes a miscompilation with a
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variable sized alloca.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138433 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 13:32:43 +00:00
Craig Topper
13894fa135
Break 256-bit vector int add/sub/mul into two 128-bit operations to avoid costly scalarization. Fixes PR10711.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138427 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 06:14:18 +00:00
Bill Wendling
3ae96d69ef
Add the sentinal "no handle" value to the ResumeInst.
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A value of -1 at a call site tells the personality function that this call isn't
handled by the current function. Since the ResumeInsts are converted to calls to
_Unwind_SjLj_Resume, add a (volatile) store of -1 to its 'call site'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138416 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 00:00:23 +00:00
Bill Wendling
fc8713ff74
Don't replace *all* uses with the new stuff.
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This is not necessarily the first or dominating use of the EH values. The IR
breaks if it's not. So replace the specific value in the instruction with the
new value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138406 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 22:55:03 +00:00
Bill Wendling
cfcccef926
Look at the end of the entry block for an invoke.
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The invoke could be at the end of the entry block. If it's the only one, then we
won't process all of the landingpad instructions correctly. This code is
currently ugly, but should be made much nicer once the new EH switch is thrown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 22:20:16 +00:00
Bruno Cardoso Lopes
d8b7dd5252
Fix a nasty bug where a v4i64 was being wrong emitted with 32-bit
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permutations. Also tidy up some patterns and make them close to their
instruction definition!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138392 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 22:06:37 +00:00
Bill Wendling
4477d691ed
A landingpad instruction is neither folded nor dead.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 21:33:05 +00:00
Jim Grosbach
5aa29a0cff
Move ARM frame-unwinding EHABI handling a touch earlier.
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It should go before AsmPrinter MC pseudo expansion since it's based on
MachineInstr, not MCInst. Otherwise any frame related pseudo instructions
may be missed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 21:32:34 +00:00
Jim Grosbach
d04f6a581c
[SU]XT[BH] are only available on ARMv6 and up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138373 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 20:53:08 +00:00
Nate Begeman
7ced7763ca
Add some useful accessors to c++ api that appear to be missing from the c api
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138371 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 20:27:46 +00:00
Evan Cheng
7801136b95
Some refactoring so TargetRegistry.h no longer has to include any files
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from MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138367 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 20:15:21 +00:00
Eric Christopher
acc8f2d938
Revert "Address Duncan's CR request:"
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This reverts commit 20a05be15e
. (svn rev 138340)
Conflicts:
test/Transforms/InstCombine/bitcast.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 20:11:10 +00:00
Jim Grosbach
ec8b866434
Thumb parsing and encoding for SVC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138360 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:49:10 +00:00
Evan Cheng
1dafa70585
Fix 80 col violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:17:21 +00:00
Nick Lewycky
726ebd6ff3
PerformSubCombine to work on integers larger than i128. Fixes a crasher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 19:01:24 +00:00
Jim Grosbach
803b1aa8ef
Thumb parsing and encoding for tSTRspi.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:39:41 +00:00
Jim Grosbach
1e84f19337
Thumb parsing and encoding for STM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138345 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:15:37 +00:00
Jim Grosbach
aa875f8c6f
Factor low reg checking into a helper function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138344 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 18:13:04 +00:00
Owen Anderson
82265a2c72
Fix decoding of Thumb2 prefetch instructions, which account for all the remaining Thumb2 decoding failures found by randomized testing so far.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 17:51:38 +00:00
Nadav Rotem
20a05be15e
Address Duncan's CR request:
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1. Cleanup the tests in ConstantFolding.cpp
2. Implement isAllOnes for Constant, ConstantFP, ConstantVector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138340 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 17:48:43 +00:00
Owen Anderson
6153a036f5
Fix Thumb2 decoding of CPS instructions to mirror ARM decoding of the same instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138339 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 17:45:18 +00:00
Jim Grosbach
cefe4c9c48
Clean up Thumb load/store multiple definitions.
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There is no non-writeback store multiple instruction in Thumb1, so
don't define one. As a result load multiple is the only instantiation of
the multiclass, so refactor that away entirely.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138338 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 17:41:15 +00:00
Owen Anderson
e732cb0043
Fix two more instances of mis-matched operand names breaking disassembly. Found by randomized testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 17:37:32 +00:00
Ivan Krasin
38fb2db6c9
This patch adds support of le32 pseudo-cpu that stands for generic
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32-bit little-endian CPU. Used by PNaCl and Emscripten.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138335 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 16:59:00 +00:00
Craig Topper
a534780da0
Add support for breaking 256-bit v16i16 and v32i8 VSETCC into two 128-bit ones, avoiding sclarization. Add vex form of pcmpeqq and pcmpgtq. Fixes more cases for PR10712.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138321 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 04:36:33 +00:00
NAKAMURA Takumi
07097ddbc0
lib/Support/Windows/Windows.h: Update required IE ver. 0x0600 should be enough for Windows XP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 03:49:11 +00:00
Bruno Cardoso Lopes
3bde6fe0df
Introduce a pass to insert vzeroupper instructions to avoid AVX to
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SSE transition penalty. The pass is enabled through the "x86-use-vzeroupper"
llc command line option. This is only the first step (very naive and
conservative one) to sketch out the idea, but proper DFA is coming next
to allow smarter decisions. Comments and ideas now and in further commits
will be very appreciated.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138317 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23 01:14:17 +00:00
Jim Grosbach
04d55f1905
Thumb parsing and encoding for SBC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138311 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:55:58 +00:00
Jim Grosbach
934755ac04
Thumb parsing and encoding for RSB.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:47:13 +00:00
Owen Anderson
8e1e60b5f8
Reject invalid imod values in t2CPS instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138306 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:44:04 +00:00
Bill Wendling
aef508dfc1
Split the landing pad's edge. Then for all uses of a landingpad instruction's
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value, we insert a load of the exception object and selector object from memory,
which is where it actually resides. If it's used by a PHI node, we follow that
to where it is being used. Eventually, all landingpad instructions should have
no uses. Any PHI nodes that were associated with those landingpads should be
removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138302 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:38:40 +00:00
Owen Anderson
c6788c83b4
t2SMLAD is a four-register instruction, not a three-register one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:31:45 +00:00
Owen Anderson
22d35086fe
Correct operand naming of t2USAT16 to allow proper decoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:27:47 +00:00
Jim Grosbach
86b5d2b02d
Revert r138278 now that r138289 has fixed the root issue.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:25:48 +00:00
Owen Anderson
2379fc235f
Match operand naming to allow correct decoding of t2LDRSH_POST.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22 23:22:05 +00:00