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1463 Commits

Author SHA1 Message Date
Chris Lattner
ef95710583 Correct returns of 64-bit values, though they seemed to work before... 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28892 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-21 00:34:03 +00:00
Chris Lattner
7f7b346e3d Make these predicates correct in 64-bit mode too. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28890 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:21:20 +00:00
Chris Lattner
b410dc9977 Rename OR4 -> OR. Move some PPC64-specific stuff to the 64-bit file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28889 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:18:58 +00:00
Chris Lattner
96dc5e5f6d remove unused flag 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28888 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:15:07 +00:00
Chris Lattner
f2c5bca165 add some logical ops 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28887 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:11:59 +00:00
Chris Lattner
4b25b40486 remove some unused patterns 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28886 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:11:36 +00:00
Chris Lattner
3ae5eef027 Add some more immediate patterns. This allows us to compile: 
void test6() {
  Y = 0xABCD0123BCDE4567;
}

into:

_test6:
        lis r2, -21555
        lis r3, ha16(_Y)
        ori r2, r2, 291
        rldicr r2, r2, 32, 31
        oris r2, r2, 48350
        ori r2, r2, 17767
        std r2, lo16(_Y)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28885 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 23:03:01 +00:00
Chris Lattner
eded521a17 Instead of li/xoris use li/oris. Note that this doesn't work if bit 15 is 
set, so disable the pattern in that case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28884 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:38:59 +00:00
Chris Lattner
0ea70b219a Add some 64-bit logical ops. 
Split imm16Shifted into a sext/zext form for 64-bit support.
Add some patterns for immediate formation.  For example, we now compile this:

static unsigned long long Y;
void test3() {
  Y = 0xF0F00F00;
}

into:

_test3:
        li r2, 3840
        lis r3, ha16(_Y)
        xoris r2, r2, 61680
        std r2, lo16(_Y)(r3)
        blr

GCC produces:

_test3:
        li r0,0
        lis r2,ha16(_Y)
        ori r0,r0,61680
        sldi r0,r0,16
        ori r0,r0,3840
        std r0,lo16(_Y)(r2)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28883 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 22:34:10 +00:00
Chris Lattner
dd58343857 64-bit bugfix: 0xFFFF0000 cannot be formed with a single lis. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28880 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 21:39:30 +00:00
Chris Lattner
f27bb6de10 Add some patterns for globals, so we can now compile this: 
static unsigned long long X, Y;
void test1() {
  X = Y;
}

into:

_test1:
        lis r2, ha16(_Y)
        lis r3, ha16(_X)
        ld r2, lo16(_Y)(r2)
        std r2, lo16(_X)(r3)
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 21:23:06 +00:00
Chris Lattner
4e85e64007 Remove some now-unneeded casts from instruction patterns. With the casts 
removed, tblgen produces identical output to with them in.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28867 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:39:56 +00:00
Chris Lattner
047854f2b7 Add some patterns for ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:38:36 +00:00
Chris Lattner
b1d26f6665 Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:01:04 +00:00
Chris Lattner
a24b7618f8 Upgrade some load/store instructions to use the proper addressing mode stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777 In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7 fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310 Split 64-bit instructions out into a separate .td file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:22:52 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951 First baby step towards ppc64 support. This adds a new -march=ppc64 backend 
that is currently just like ppc32 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 01:37:27 +00:00
Jim Laskey
f8a01a9661 1. Support standard dwarf format (was bootstrapping in Apple format.) 
2. Add vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 20:51:43 +00:00
Evan Cheng
a7dc4a59cb Type of extract_element index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:18:06 +00:00
Jim Laskey
014f98c7e5 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 11:35:03 +00:00
Chris Lattner
e67304fb78 Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0 Fix spilling and reloading of CR regs to reload the right values. This fixes 
Olden/power (and probably others) with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 21:50:57 +00:00
Chris Lattner
cf00631719 Work around a nasty tblgen bug where it doesn't add operands for varargs 
nodes correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:15:02 +00:00
Chris Lattner
4a45abf66e Fix a problem exposed by the local allocator. CALL instructions are not marked 
as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:14:28 +00:00
Chris Lattner
001db453f5 Add PowerPC intrinsics to support dcbz[l] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:29:23 +00:00
Chris Lattner
08a9a985dc Silence -pedantic warning 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28633 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-01 17:17:06 +00:00
Chris Lattner
7b05350906 Always reserve space for 8 spilled GPRs. GCC apparently assumes that this 
space will be available, even if the callee isn't varargs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28571 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-30 21:21:04 +00:00
Evan Cheng
6848be1a27 Change RET node to include signness information of the return values. i.e. 
RET chain, value1, sign1, value2, sign2, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-26 23:10:12 +00:00
Chris Lattner
8e2a04e21d Fix build failure of povray 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28473 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 18:06:16 +00:00
Chris Lattner
5d634ce466 Fix Benchmarks/MallocBench/cfrac 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28471 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 16:54:16 +00:00
Evan Cheng
4360bdcf1f CALL node change (arg / sign pairs instead of just arguments). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28462 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:57:32 +00:00
Evan Cheng
6a3d5a62f0 Assert if InflightSet is not cleared after instruction selecting a BB. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28459 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-25 00:24:28 +00:00
Evan Cheng
afe358e7d4 Clear HandleMap and ReplaceMap after instruction selection. Or it may cause 
non-deterministic behavior.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28454 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 20:46:25 +00:00
Chris Lattner
d74ea2bbd8 Patches to make the LLVM sources more -pedantic clean. Patch provided 
by Anton Korobeynikov!  This is a step towards closing PR786.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28447 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 17:04:05 +00:00
Chris Lattner
2ef5e89dc9 Fix CodeGen/Generic/vector.ll:test_div with altivec. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28445 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 00:15:25 +00:00
Chris Lattner
5734012375 Handle SETO* like we handle SET*, restoring behavior after Evan's setcc 
change.  This fixes PowerPC/fnegsel.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28443 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-24 00:06:44 +00:00
Owen Anderson
bcd8a8264e Make TargetData strings less redundant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28423 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-20 23:28:54 +00:00
Owen Anderson
d988b32aba Make all of the TargetMachine subclasses use the new string TargetData methods. 
This is part of the on-going work on PR 761.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28414 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-20 00:24:56 +00:00
Evan Cheng
0f3ac8d8d4 getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28378 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-18 00:12:58 +00:00
Evan Cheng
c01d497255 Remove PointerType from class Target 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 21:20:27 +00:00
Chris Lattner
9d62fa4d16 Add a note about a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28355 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 19:02:25 +00:00
Chris Lattner
c703a8fbf8 Make PPC call lowering more aggressive, making the isel matching code simple 
enough to be autogenerated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28354 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 19:00:46 +00:00
Chris Lattner
9a2a497284 Switch PPC over to a call-selection model where the lowering code creates 
the copyto/fromregs instead of making the PPCISD::CALL selection code create
them.  This vastly simplifies the selection code, and moves the ABI handling
parts into one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28346 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-05-17 06:01:33 +00:00