Commit Graph

3483 Commits

Author SHA1 Message Date
Chris Lattner
08d5e1f718 Add #include for older GCC's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6670 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-08 06:43:57 +00:00
Chris Lattner
e32487ebff Fix bug: LevelRaise/2003-06-07-EmptyArrayTest.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6669 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-07 21:45:42 +00:00
Chris Lattner
4432d8f3b5 Fix compilation problem on GCC 2.9x
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6667 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-07 20:29:58 +00:00
Misha Brukman
6fe6905df2 Do not hastily change the Opcode from 'r' to 'i' type if we're not actually
SETTING the operand to be an immediate or have verified that one of the operands
is really a SignExtended or Unextended immediate value already, which warrants
an 'i' opcode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6662 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-07 02:34:43 +00:00
Chris Lattner
903c2d11e2 Fix compilation problem with some versions of G++
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6660 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 22:13:01 +00:00
Chris Lattner
b8c8829a4a Fix problem with perror
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6659 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 21:09:29 +00:00
Chris Lattner
30d002bd66 Fix warnings on Sparc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6658 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 18:25:33 +00:00
Misha Brukman
8631ac4b76 Print address out as hex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6657 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:53:28 +00:00
Misha Brukman
f75bab7756 Added 'r' and 'i' versions to WRCCR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6656 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:52:58 +00:00
Misha Brukman
d36e30e623 * Changed Bcc instructions to behave like BPcc instructions
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6655 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 09:52:23 +00:00
Misha Brukman
a51245036e * Removed PreSelection pass because that is now done in the JIT
* Removed instruction scheduling as it is too slow to run in a JIT environment
* Removed other passes because they aren't necessary and can slow JIT down


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6652 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 07:11:16 +00:00
Chris Lattner
940b08dd1e Don't output explicit initializers for globals that are zero initialized
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6651 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 07:10:24 +00:00
Misha Brukman
4e8c999518 ::: HACK ALERT ::: HACK ALERT ::: HACK ALERT ::: HACK ALERT ::: HACK ALERT :::
The JIT is designed to code-generate a function at-a-time. That means that any
pass can only make local changes to its function. Period.

Because the Sparc PreSelection pass claims to be a BasicBlock pass while adding
globals to the Module, it cannot be run with the other passes, because by this
time, the globals have been output already by the JIT, and the addresses of any
globals appearing AFTER this point are not recognized.

However, the PreSelection pass is a requirement for correctness in the Sparc
codegen path, so it MUST be run.

::: HACK ALERT ::: HACK ALERT ::: HACK ALERT ::: HACK ALERT ::: HACK ALERT :::


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6650 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 06:59:55 +00:00
Misha Brukman
1d4408506b Output function address as hex.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6649 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 06:52:35 +00:00
Misha Brukman
de07be3b78 Fixed a bunch of test cases in test/Regression/Jello which could not get the
address of a floating-point (allocated via ConstantPool) correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6647 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 04:41:22 +00:00
Chris Lattner
302de59001 Add statistic for # machine instrs emitted
Add GROSS HACK to get CompilationCallback to work when compiled in release mode


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6646 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 04:00:05 +00:00
Misha Brukman
3339459e48 * If a global is not a function, just ask the MachineCodeEmitter for the addr
* Do not block a print statement with a DEBUG() guard if we're going to abort()


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6645 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 03:35:37 +00:00
Misha Brukman
82c9e55913 The SUB*i instructions belong to a different class than their SUB*r brethren.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6644 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 03:34:47 +00:00
Misha Brukman
8f1222245e Put all debug print statements under the DEBUG() guard to make output clean so
that tests can automatically diff the output.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6642 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 00:26:11 +00:00
Misha Brukman
cf614a32d5 Removed debug print statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6641 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-06 00:00:54 +00:00
Misha Brukman
6994dab12a Fixed confusion between register classes and register types.
Now %fcc registers are recognized correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6640 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:51:10 +00:00
Misha Brukman
432fba5572 Added missing directive to store the instruction name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6639 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:35:11 +00:00
Misha Brukman
ce50542179 Moved predict and annul fields to the end of each individual instruction
class, because they are currently unused.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6638 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:33:15 +00:00
Misha Brukman
d4ad1d10bc Do not preset the cc register, the instructions actually use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6637 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 23:30:27 +00:00
Vikram S. Adve
cf819454e4 Minor tuning -- avoid a non-inlinable function call on every operand.
Also, reorder a couple of functions for inlining.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6635 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 21:12:56 +00:00
Chris Lattner
9783301b9d Fix (bogus) possibly uninitialized warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6634 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 21:01:26 +00:00
Misha Brukman
f47d9c28d9 Added lazy function resolution to the JIT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6633 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 20:52:06 +00:00
Misha Brukman
e77d65a8ed * The textual output of (non-)predicted FP branches is the same.
* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6632 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 20:51:37 +00:00
Chris Lattner
9b5fd22bd9 Fix bug: InstCombine/2003-06-05-BranchInvertInfLoop.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6630 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 20:12:51 +00:00
Chris Lattner
333864d81b Implement generation of cmp R, C to not use an extra register
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6627 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 19:30:30 +00:00
Chris Lattner
35333e16ee Special case simple binary operator X op C
This avoid generating a register to hold C, which in turn speeds up the
  register allocator by a lot: ~9% on 164.gzip and ~17% on 256.bzip2.  This
  also speeds up other passes.  This also speeds up execution of the program
  marginally, and makes the asm much easier to read. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6626 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 18:28:55 +00:00
Chris Lattner
76594014f2 Add instructions for (add|sub|and|or|xor)ri(8|16|32)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6625 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 18:25:08 +00:00
Chris Lattner
08d2e4e09a Fix bug: Jello/2003-06-04-bzip2-bug.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6624 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 17:15:04 +00:00
Anand Shukla
cd0cc61329 Fixed a bug so initialization code is always inserted in main
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6622 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 06:02:46 +00:00
Chris Lattner
d3646f1586 Use a constant expr GEP instead of an actual instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6620 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 04:48:18 +00:00
Misha Brukman
406d9abc9e All store instructions really want 'rd' in the first field.
Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6619 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 01:06:10 +00:00
Misha Brukman
2e7e8fadf8 Added missing 'rs1' field to F3_rdrs1imm13, 'rd' to F3_rdrs1rs2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6618 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-05 00:39:45 +00:00
Brian Gaeke
aeab1e163f lib/CodeGen/Mapping/MappingInfo.cpp:
Update file comment to contain a bunch of the overview mapping-info
  documentation previously buried within the file.
 Remove some unnecessary include/using stmts.
 Rename pass to MappingInfoCollector.
 Rewrite a lot of it so it doesn't use global instance variables and so
  it outputs into MappingInfo objects and then dumps those out, instead of going
  straight to an assembly file.
 Change name of factory to getMappingInfoCollector.
 Fold prologue & epilogue writers into MappingInfo methods.

lib/Target/Sparc/FInfo.cpp:
 Correct file comment to reflect above change

lib/Target/Sparc/Sparc.cpp:
 Change name of factory to getMappingInfoCollector.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6617 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 22:07:12 +00:00
Brian Gaeke
c86b8d5c46 Add file comment. Include <vector> and <string>. Update include guards
to reflect file's current location.  Add definition of class
MappingInfo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6616 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 22:02:47 +00:00
Chris Lattner
e5d4293cba Revert brians patch to get mapping info working again
sorry dude


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6615 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 21:01:12 +00:00
Tanya Lattner
758578e158 Had to comment out a line in outByte() to get it to compile because Out and tmp were
undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6614 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 20:53:46 +00:00
Chris Lattner
fa9ee73a7d Make this work with counter > 127
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6613 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 20:08:47 +00:00
Misha Brukman
a2196c1aae * Instead of re-inventing the MachineConstantPool emitter that's already given
in Emitter.cpp, just convert the Sparc version of the constant pool into
  what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
  required adding a SparcV9CodeEmitter pointer to simplify generating
  bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
  sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
  lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
  Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
  SparcV9CodeEmitter, which now works for already-generated functions (JITted or
  library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
  SparcV9CodeEmitter.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6612 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 20:01:13 +00:00
Misha Brukman
3a55e8aae4 * Institute a hack for the Sparc call to mmap() to get our generated code to be
laid out closer to the VM so that calls to library functions (e.g. puts()) and
  callback (e.g.  JITResolver::CompilationCallback) fit into 30 bits of the call
  instruction.
* Abort if architecture is not yet supported (not X86 or Sparc) because it
  likely requires a different set of parameters to mmap() .
* Stop using hard-coded values for page size; use sysconf(_SC_PAGESIZE) instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6610 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 19:45:25 +00:00
Brian Gaeke
e961d9614a Make writeNumber() void. Get ready to decouple it from .byte directive output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6609 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 18:17:22 +00:00
Sumant Kowshik
9271ade15b Made changes suggested by Chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6606 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 08:03:57 +00:00
Chris Lattner
40f5d70db4 Clean up previous code.
Add new combination to turn seteq X, 0 -> not(cast X to bool)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6604 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 05:10:11 +00:00
Misha Brukman
d15cd2752f I have finally seen the light. The code to change the opcode must live higher in
the loop, and in both cases. In the first case, it is a VReg that is a constant
so it may be actually converted to a constant. In the second case, it is already
a constant, but then if it doesn't change its type (e.g. to become a register
and have the value loaded from memory if it is too large to live in its
instruction field), we must change the opcode BEFORE the 'continue', otherwise
we miss the opportunity.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6602 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 04:54:06 +00:00
Misha Brukman
d22807a43e Added the 4.7 instruction class and all the FMOVcc instructions in them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6601 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 04:48:31 +00:00
Chris Lattner
c4d10ebcd7 Implement combination of boolean not with branch
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6599 91177308-0d34-0410-b5e6-96231b3b80d8
2003-06-04 04:46:00 +00:00